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Subversion Repositories uart2bus

[/] [uart2bus/] [trunk/] [verilog/] [sim/] [icarus/] [block_txt.cfg] - Rev 5

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+incdir+../../bench
../../rtl/baud_gen.v
../../rtl/uart_tx.v
../../rtl/uart_rx.v
../../rtl/uart_top.v
../../rtl/uart_parser.v
../../rtl/uart2bus_top.v
../../bench/reg_file_model.v
../../bench/tb_txt_uart2bus_top.v

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