OpenCores
URL https://opencores.org/ocsvn/uart2bus/uart2bus/trunk

Subversion Repositories uart2bus

[/] [uart2bus/] [trunk/] [verilog/] [sim/] [icarus/] [test.txt] - Rev 3

Go to most recent revision | Compare with Previous | Blame | View Log

w de 1a;
r 1a;
r 0a;
w 12 0a;
r 1a;
r 0a;

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.