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https://opencores.org/ocsvn/uart2bus_testbench/uart2bus_testbench/trunk
Subversion Repositories uart2bus_testbench
[/] [uart2bus_testbench/] [further_enhancement] - Rev 12
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Add general test that includes the all sequences and do general coverage driven verificationAdd uvm command line parser to define the type of the simulation either coverage driven or simulation basedAdd python script to run the simulation