Subversion Repositories uart2bus_testbench

//
//----------------------------------------------------------------------
//   Copyright 2007-2011 Mentor Graphics Corporation
//   Copyright 2007-2010 Cadence Design Systems, Inc.
//   Copyright 2010 Synopsys, Inc.
//   All Rights Reserved Worldwide
//
//   Licensed under the Apache License, Version 2.0 (the
//   "License"); you may not use this file except in
//   compliance with the License.  You may obtain a copy of
//   the License at
//
//       http://www.apache.org/licenses/LICENSE-2.0
//
//   Unless required by applicable law or agreed to in
//   writing, software distributed under the License is
//   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
//   CONDITIONS OF ANY KIND, either express or implied.  See
//   the License for the specific language governing
//   permissions and limitations under the License.
//----------------------------------------------------------------------

`include "tlm1/uvm_tlm_ifs.svh"
`include "tlm1/uvm_sqr_ifs.svh"
`include "base/uvm_port_base.svh"

`include "tlm1/uvm_tlm_imps.svh"

`include "tlm1/uvm_imps.svh"
`include "tlm1/uvm_ports.svh"
`include "tlm1/uvm_exports.svh"
`include "tlm1/uvm_analysis_port.svh"

`include "tlm1/uvm_tlm_fifo_base.svh"
`include "tlm1/uvm_tlm_fifos.svh"
`include "tlm1/uvm_tlm_req_rsp.svh"

`include "tlm1/uvm_sqr_connections.svh"