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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> <html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> <meta http-equiv="X-UA-Compatible" content="IE=9"/> <title>Uart wishbone slave Documentation: E:/uart_block/hdl/iseProject/testBaud_generator.vhd Source File</title> <link href="tabs.css" rel="stylesheet" type="text/css"/> <link href="doxygen.css" rel="stylesheet" type="text/css" /> <link href="navtree.css" rel="stylesheet" type="text/css"/> <script type="text/javascript" src="jquery.js"></script> <script type="text/javascript" src="resize.js"></script> <script type="text/javascript" src="navtree.js"></script> <script type="text/javascript"> $(document).ready(initResizable); </script> <link href="search/search.css" rel="stylesheet" type="text/css"/> <script type="text/javascript" src="search/search.js"></script> <script type="text/javascript"> $(document).ready(function() { searchBox.OnSelectItem(0); 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<a name="l00006"></a>00006 <span class="vhdlkeyword">use </span>ieee.std_logic_1164.<span class="vhdlkeyword">all</span>; <a name="l00007"></a>00007 <span class="vhdlkeyword">use </span>ieee.std_logic_unsigned.<span class="vhdlkeyword">all</span>; <a name="l00008"></a>00008 <span class="vhdlkeyword">use </span>ieee.std_logic_arith.<span class="vhdlkeyword">all</span>; <a name="l00009"></a>00009 <a name="l00011"></a><a class="code" href="classtest_baud__generator.html#ac442dca664056131bdaf5c92e4351e01">00011</a> <span class="vhdlkeyword">use </span>work.pkgDefinitions.<span class="vhdlkeyword">all</span>; <a name="l00012"></a>00012 <a name="l00013"></a><a class="code" href="classtest_baud__generator.html">00013</a> <span class="keywordflow">ENTITY </span><a class="code" href="classtest_baud__generator.html">testBaud_generator</a> <span class="vhdlkeyword">IS</span> <a name="l00014"></a>00014 <span class="vhdlkeyword">END</span> <span class="vhdlchar">testBaud_generator</span>; <a name="l00015"></a>00015 <a name="l00018"></a><a class="code" href="classtest_baud__generator_1_1behavior.html">00018</a> <span class="vhdlkeyword">ARCHITECTURE</span> behavior <span class="vhdlkeyword">OF</span> <a class="code" href="classtest_baud__generator.html">testBaud_generator</a> IS <a name="l00019"></a>00019 <a name="l00020"></a><a class="code" href="classtest_baud__generator_1_1behavior.html#a28592cfd89ceaf4e659c0f51beddd258">00020</a> <span class="vhdlkeyword">COMPONENT</span> <a class="code" href="classbaud__generator.html">baud_generator</a> <a name="l00021"></a>00021 <span class="vhdlkeyword">Port</span> ( <a class="code" href="classbaud__generator.html#ab6aed4f6f0ae3df108d9e29e513e3ad2" title="Reset Input.">rst</a> : <span class="vhdlkeyword">in</span> <span class="comment">STD_LOGIC</span>; <a name="l00022"></a>00022 <a class="code" href="classbaud__generator.html#a86b40337b1eabc8f0e5ef6f0747d0048" title="Clock input.">clk</a> : <span class="vhdlkeyword">in</span> <span class="comment">STD_LOGIC</span>; <a name="l00023"></a>00023 <a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a> : <span class="vhdlkeyword">in</span> <span class="comment">STD_LOGIC_VECTOR</span> ((nBitsLarge<span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span>) <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span>); <a name="l00024"></a>00024 <a class="code" href="classbaud__generator.html#ac451ec554e394c65d78e94f9aa1a2365" title="Oversample(8x) version of baud (Used on serial_receiver)">baud_oversample</a> : <span class="vhdlkeyword">out</span> <span class="comment">std_logic</span>; <a name="l00025"></a>00025 <a class="code" href="classbaud__generator.html#ab3c0013cf4a2db5d1f3473d97bda35a4" title="Baud generation output (Used on serial_transmitter)">baud</a> : <span class="vhdlkeyword">out</span> <span class="comment">STD_LOGIC</span>); <a name="l00026"></a>00026 <span class="vhdlkeyword">END</span> <span class="vhdlkeyword">COMPONENT</span>; <a name="l00027"></a>00027 <a name="l00028"></a>00028 <span class="keyword"></span> <a name="l00029"></a>00029 <span class="keyword"> --Inputs</span> <a name="l00030"></a><a class="code" href="classtest_baud__generator_1_1behavior.html#a4ad19b09fd701414daa953d2e84cb994">00030</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a4ad19b09fd701414daa953d2e84cb994" title="Signal to connect with UUT.">rst</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>; <a name="l00031"></a><a class="code" href="classtest_baud__generator_1_1behavior.html#aefbce29afe42d366da5d2568c651a848">00031</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#aefbce29afe42d366da5d2568c651a848" title="Signal to connect with UUT.">clk</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>; <a name="l00032"></a><a class="code" href="classtest_baud__generator_1_1behavior.html#a24127a443faf9414dd7ce6d1c04a77a3">00032</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a24127a443faf9414dd7ce6d1c04a77a3" title="Signal to connect with UUT.">cycle_wait</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">(</span><span class="vhdlkeyword">others</span> <span class="vhdlchar">=</span><span class="vhdlchar">></span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span><span class="vhdlchar">)</span>; <a name="l00033"></a>00033 <span class="keyword"></span> <a name="l00034"></a>00034 <span class="keyword"> --Outputs</span> <a name="l00035"></a><a class="code" href="classtest_baud__generator_1_1behavior.html#a651731352ede98b937241d8cffe9a407">00035</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a651731352ede98b937241d8cffe9a407" title="Signal to connect with UUT.">baud</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span>; <a name="l00036"></a><a class="code" href="classtest_baud__generator_1_1behavior.html#a148b72e3227bca47e0a8cbaec91be764">00036</a> <span class="vhdlkeyword">signal</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a148b72e3227bca47e0a8cbaec91be764" title="Signal to connect with UUT.">baud_oversample</a></span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span>; <a name="l00037"></a>00037 <span class="keyword"></span> <a name="l00038"></a>00038 <span class="keyword"> -- Clock period definitions (</span><span class="vhdllogic">1</span>.8432MHz) <a name="l00039"></a>00039 <span class="vhdlkeyword">constant</span> <span class="vhdlchar">clk_period</span> <span class="vhdlchar">:</span> <span class="comment">time</span> <span class="vhdlchar">:=</span> <span class="vhdllogic"></span><span class="vhdllogic">20</span> <span class="vhdlchar">ns</span>;<span class="keyword"> -- </span><span class="vhdllogic">0</span>.543us (<span class="vhdllogic">1</span>.8432Mhz) 20ns (50Mhz) <a name="l00040"></a>00040 <a name="l00041"></a>00041 <span class="vhdlkeyword">BEGIN</span> <a name="l00042"></a>00042 <a name="l00044"></a>00044 <a class="code" href="dummy.html#a1619316ad715601eb5d3559db829ac05" title="Instantiate the Unit Under Test (UUT)">uut</a>: <a class="code" href="classbaud__generator.html">baud_generator</a> <span class="vhdlkeyword">PORT</span> <span class="vhdlkeyword">MAP</span> ( <a name="l00045"></a>00045 <a class="code" href="classbaud__generator.html#ab6aed4f6f0ae3df108d9e29e513e3ad2" title="Reset Input.">rst</a> => <a class="code" href="classtest_baud__generator_1_1behavior.html#a4ad19b09fd701414daa953d2e84cb994" title="Signal to connect with UUT.">rst</a>, <a name="l00046"></a>00046 <a class="code" href="classbaud__generator.html#a86b40337b1eabc8f0e5ef6f0747d0048" title="Clock input.">clk</a> => <a class="code" href="classtest_baud__generator_1_1behavior.html#aefbce29afe42d366da5d2568c651a848" title="Signal to connect with UUT.">clk</a>, <a name="l00047"></a>00047 <a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a> => <a class="code" href="classtest_baud__generator_1_1behavior.html#a24127a443faf9414dd7ce6d1c04a77a3" title="Signal to connect with UUT.">cycle_wait</a>, <a name="l00048"></a>00048 <a class="code" href="classbaud__generator.html#ac451ec554e394c65d78e94f9aa1a2365" title="Oversample(8x) version of baud (Used on serial_receiver)">baud_oversample</a> => <a class="code" href="classtest_baud__generator_1_1behavior.html#a148b72e3227bca47e0a8cbaec91be764" title="Signal to connect with UUT.">baud_oversample</a>, <a name="l00049"></a>00049 <a class="code" href="classbaud__generator.html#ab3c0013cf4a2db5d1f3473d97bda35a4" title="Baud generation output (Used on serial_transmitter)">baud</a> => <a class="code" href="classtest_baud__generator_1_1behavior.html#a651731352ede98b937241d8cffe9a407" title="Signal to connect with UUT.">baud</a> <a name="l00050"></a>00050 <span class="vhdlchar">)</span>; <a name="l00051"></a>00051 <span class="keyword"></span> <a name="l00052"></a>00052 <span class="keyword"> -- Clock <span class="vhdlkeyword">process</span> definitions</span> <a name="l00053"></a>00053 clk_process :<span class="vhdlkeyword">process</span> <a name="l00054"></a>00054 <span class="vhdlkeyword">begin</span> <a name="l00055"></a>00055 <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#aefbce29afe42d366da5d2568c651a848" title="Signal to connect with UUT.">clk</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>; <a name="l00056"></a>00056 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span><span class="vhdlchar">/</span><span class="vhdllogic"></span><span class="vhdllogic">2</span>; <a name="l00057"></a>00057 <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#aefbce29afe42d366da5d2568c651a848" title="Signal to connect with UUT.">clk</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>; <a name="l00058"></a>00058 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span><span class="vhdlchar">/</span><span class="vhdllogic"></span><span class="vhdllogic">2</span>; <a name="l00059"></a>00059 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">process</span>; <a name="l00060"></a>00060 <a name="l00061"></a>00061 <span class="keyword"></span> <a name="l00062"></a>00062 <span class="keyword"> -- Stimulus <span class="vhdlkeyword">process</span></span> <a name="l00063"></a>00063 stim_proc: <span class="vhdlkeyword">process</span> <a name="l00064"></a>00064 <span class="vhdlkeyword">variable</span> <span class="vhdlchar">t1</span> <span class="vhdlchar">:</span> <span class="comment">time</span>; <a name="l00065"></a>00065 <span class="vhdlkeyword">variable</span> <span class="vhdlchar">t2</span> <span class="vhdlchar">:</span> <span class="comment">time</span>; <a name="l00066"></a>00066 <span class="vhdlkeyword">variable</span> <span class="vhdlchar">period</span> <span class="vhdlchar">:</span> <span class="comment">time</span>;<span class="keyword"> -- 1/115200 = </span><span class="vhdllogic">8</span>.<span class="vhdllogic">68</span> us <a name="l00067"></a>00067 <span class="vhdlkeyword"> begin</span> <span class="keyword"></span> <a name="l00068"></a>00068 <span class="keyword"> -- Test the baud generator waiting <span class="vhdlkeyword">for</span> </span><span class="vhdllogic">434</span> clock cycles from 50MHz clock <a name="l00069"></a>00069 <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a4ad19b09fd701414daa953d2e84cb994" title="Signal to connect with UUT.">rst</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>; <a name="l00070"></a>00070 <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a24127a443faf9414dd7ce6d1c04a77a3" title="Signal to connect with UUT.">cycle_wait</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">conv_std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdllogic"></span><span class="vhdllogic">434</span><span class="vhdlchar">,</span> <span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span>;<span class="keyword"> -- 50000000/115200</span> <a name="l00071"></a>00071 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">for</span> <span class="vhdlchar">clk_period</span>; <a name="l00072"></a>00072 <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a4ad19b09fd701414daa953d2e84cb994" title="Signal to connect with UUT.">rst</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>; <a name="l00073"></a>00073 <a name="l00074"></a>00074 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a651731352ede98b937241d8cffe9a407" title="Signal to connect with UUT.">baud</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>; <a name="l00075"></a>00075 <span class="vhdlchar">t1</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">now</span>;<span class="keyword"> -- Get current simulation <span class="comment">time</span></span> <a name="l00076"></a>00076 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a651731352ede98b937241d8cffe9a407" title="Signal to connect with UUT.">baud</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>; <a name="l00077"></a>00077 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a651731352ede98b937241d8cffe9a407" title="Signal to connect with UUT.">baud</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>; <a name="l00078"></a>00078 <span class="vhdlchar">t2</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">now</span>;<span class="keyword"> -- Get current simulation <span class="comment">time</span></span> <a name="l00079"></a>00079 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a651731352ede98b937241d8cffe9a407" title="Signal to connect with UUT.">baud</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>; <a name="l00080"></a>00080 <span class="vhdlkeyword">wait</span> <span class="vhdlkeyword">until</span> <span class="vhdlchar"><a class="code" href="classtest_baud__generator_1_1behavior.html#a651731352ede98b937241d8cffe9a407" title="Signal to connect with UUT.">baud</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>; <a name="l00081"></a>00081 <span class="vhdlkeyword">report</span> <span class="keyword">"Current sim time="</span> <span class="vhdlchar">&</span> <span class="comment">time</span><span class="vhdlchar">'</span><span class="vhdlchar">image</span><span class="vhdlchar">(</span><span class="vhdlchar">now</span><span class="vhdlchar">)</span>; <a name="l00082"></a>00082 period := t2 - t1; <a name="l00083"></a>00083 <span class="keyword"></span> <a name="l00084"></a>00084 <span class="keyword"> -- Verify <span class="vhdlkeyword">if</span> we have the right period 1/115200 = </span><span class="vhdllogic">8</span>.<span class="vhdllogic">68</span> us <a name="l00085"></a>00085 <span class="vhdlkeyword">assert</span> <span class="vhdlchar">period</span> <span class="vhdlchar">=</span> <span class="vhdllogic"></span><span class="vhdllogic">8</span>.<span class="vhdllogic">68</span> <span class="vhdlchar">us</span> <span class="vhdlkeyword">report</span> <span class="keyword">"Wrong period expecter 8.68 us. got: "</span><span class="vhdlchar">&</span> <span class="comment">time</span><span class="vhdlchar">'</span><span class="vhdlchar">image</span><span class="vhdlchar">(</span><span class="vhdlchar">period</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">severity</span> <span class="vhdlchar">failure</span>; <a name="l00086"></a>00086 <span class="keyword"></span> <a name="l00087"></a>00087 <span class="keyword"> -- Stop Simulation</span> <a name="l00088"></a>00088 <span class="vhdlkeyword">assert</span> <span class="vhdlchar">false</span> <span class="vhdlkeyword">report</span> <span class="keyword">"NONE. End of simulation."</span> <span class="vhdlkeyword">severity</span> <span class="vhdlchar">failure</span>; <a name="l00089"></a>00089 <a name="l00090"></a>00090 <span class="vhdlkeyword">wait</span>; <a name="l00091"></a>00091 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">process</span>; <a name="l00092"></a>00092 <a name="l00093"></a>00093 <span class="vhdlkeyword">END</span>; </pre></div></div><!-- contents --> </div> <div id="nav-path" class="navpath"> <ul> <li class="navelem"><a class="el" href="test_baud__generator_8vhd.html">testBaud_generator.vhd</a> </li> <li class="footer">Generated on Sat May 12 2012 22:28:05 for Uart wishbone slave Documentation by <a href="http://www.doxygen.org/index.html"> <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.0 </li> </ul> </div> </body> </html>