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[/] [uart_fpga_slow_control/] [trunk/] [documents/] [HardwareDescription.txt] - Rev 34

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Remember to add a voltage translator buffer:
!! none of the FPGAs on the market are 12V tolerant !!

~ use a MAX3224 chip for example
Timing      

In case an external clock is needed to drive the UART:

~ use a 29.4912 MHz Oscillator like ASV-29.4912MHZ-EJ-T

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