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[/] [uart_fpga_slow_control/] [trunk/] [documents/] [HardwareDescription_html.txt] - Rev 34
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<h3>Buffering</h3>
<p>Remember to add a voltage translator buffer:</p>
<b>!! none of the FPGAs on the market are 12V tolerant !!</b>
<p>~ use a MAX3224 chip for example</p>
<h3>Timing</h3>
<p>In case an external clock is needed to drive the UART:</p>
<p>~ use a 29.4912 MHz Oscillator like ASV-29.4912MHZ-EJ-T</p>
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