URL
https://opencores.org/ocsvn/usb_fpga_1_11/usb_fpga_1_11/trunk
Subversion Repositories usb_fpga_1_11
[/] [usb_fpga_1_11/] [trunk/] [examples/] [usb-fpga-1.15y/] [ucecho/] [fpga/] [ucecho.ucf] - Rev 7
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NET "CLK" TNM_NET = "CLK";
TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %;
NET "CLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ;
NET "CS" LOC = "AB11" | IOSTANDARD = LVCMOS33 ;
NET "pb<0>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ;
NET "pb<1>" LOC = "V13" | IOSTANDARD = LVCMOS33 ;
NET "pb<2>" LOC = "W13" | IOSTANDARD = LVCMOS33 ;
NET "pb<3>" LOC = "AA8" | IOSTANDARD = LVCMOS33 ;
NET "pb<4>" LOC = "AB8" | IOSTANDARD = LVCMOS33 ;
NET "pb<5>" LOC = "W6" | IOSTANDARD = LVCMOS33 ;
NET "pb<6>" LOC = "Y6" | IOSTANDARD = LVCMOS33 ;
NET "pb<7>" LOC = "Y9" | IOSTANDARD = LVCMOS33 ;
NET "pc<0>" LOC = "G20" | IOSTANDARD = LVCMOS33 ;
NET "pc<1>" LOC = "T20" | IOSTANDARD = LVCMOS33 ;
NET "pc<2>" LOC = "Y5" | IOSTANDARD = LVCMOS33 ;
NET "pc<3>" LOC = "AB9" | IOSTANDARD = LVCMOS33 ;
NET "pc<4>" LOC = "G19" | IOSTANDARD = LVCMOS33 ;
NET "pc<5>" LOC = "H20" | IOSTANDARD = LVCMOS33 ;
NET "pc<6>" LOC = "H19" | IOSTANDARD = LVCMOS33 ;
NET "pc<7>" LOC = "H18" | IOSTANDARD = LVCMOS33 ;
# NET "SCL" LOC = "F22" | IOSTANDARD = LVCMOS33 ;
# NET "SDA" LOC = "E22" | IOSTANDARD = LVCMOS33 ;
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