Subversion Repositories usb_fpga_1_15

NET "CLK" TNM_NET = "CLK";
TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %;
# NET "CLK"  LOC = "K14" | IOSTANDARD = LVCMOS33 ;      # EZ-USB clock
NET "CLK"  LOC = "N8" | IOSTANDARD = LVCMOS33 ;         # xmega clock

# NET "pe<0>"  LOC = "A13" | IOSTANDARD = LVCMOS33 ;
# NET "pe<1>"  LOC = "C11" | IOSTANDARD = LVCMOS33 ;
# NET "pe<2>"  LOC = "A11" | IOSTANDARD = LVCMOS33 ;
# NET "pe<3>"  LOC = "B10" | IOSTANDARD = LVCMOS33 ;
# NET "pe<4>"  LOC = "D11" | IOSTANDARD = LVCMOS33 ;
# NET "pe<5>"  LOC = "F10" | IOSTANDARD = LVCMOS33 ;
# NET "pe<6>"  LOC = "A12" | IOSTANDARD = LVCMOS33 ;
# NET "pe<7>"  LOC = "E10" | IOSTANDARD = LVCMOS33 ;

NET "led<0>"  LOC = "C9" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;          # ph<0>
NET "led<1>"  LOC = "D8" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # ph<1>
NET "led<2>"  LOC = "C7" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # ph<2>
NET "led<3>"  LOC = "F7" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # ph<3>
NET "led<4>"  LOC = "D6" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # ph<4>
NET "led<5>"  LOC = "B6" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # ph<5>
NET "led<6>"  LOC = "D5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # ph<6>
NET "led<7>"  LOC = "B5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # ph<7>
NET "led<8>"  LOC = "P4" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # pj<0>
NET "led<9>"  LOC = "M6" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;         # pj<1>
NET "led<10>"  LOC = "P6" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;        # pj<2>
NET "led<11>"  LOC = "N6" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;        # pj<3>

# NET "pj<4>"  LOC = "M7" | IOSTANDARD = LVCMOS33 ;
# NET "pj<5>"  LOC = "T7" | IOSTANDARD = LVCMOS33 ;
# NET "pj<6>"  LOC = "M9" | IOSTANDARD = LVCMOS33 ;
# NET "pj<7>"  LOC = "P8" | IOSTANDARD = LVCMOS33 ;

# NET "pk<0>"  LOC = "R12" | IOSTANDARD = LVCMOS33 ;
# NET "pk<1>"  LOC = "L12" | IOSTANDARD = LVCMOS33 ;
# NET "pk<2>"  LOC = "L13" | IOSTANDARD = LVCMOS33 ;
# NET "pk<3>"  LOC = "N14" | IOSTANDARD = LVCMOS33 ;
# NET "pk<4>"  LOC = "L14" | IOSTANDARD = LVCMOS33 ;
# NET "pk<5>"  LOC = "R15" | IOSTANDARD = LVCMOS33 ;
# NET "pk<6>"  LOC = "M15" | IOSTANDARD = LVCMOS33 ;
# NET "pk<7>"  LOC = "N16" | IOSTANDARD = LVCMOS33 ;