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https://opencores.org/ocsvn/usb_fpga_1_15/usb_fpga_1_15/trunk
Subversion Repositories usb_fpga_1_15
[/] [usb_fpga_1_15/] [trunk/] [examples/] [usb-fpga-1.15/] [1.15d/] [lightshow/] [fpga/] [lightshow.ucf] - Rev 2
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NET "CLK" TNM_NET = "CLK";TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %;# NET "CLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ; # EZ-USB clockNET "CLK" LOC = "AB12" | IOSTANDARD = LVCMOS33 ; # xmega clockNET "led<0>" LOC = "D11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<0>NET "led<1>" LOC = "F10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<1>NET "led<2>" LOC = "D10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<2>NET "led<3>" LOC = "D9" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<3>NET "led<4>" LOC = "B8" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<4>NET "led<5>" LOC = "D7" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<5>NET "led<6>" LOC = "D6" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<6>NET "led<7>" LOC = "C5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<7>NET "led<8>" LOC = "W12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # pj<0>NET "led<9>" LOC = "W9" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # pj<1>NET "led<10>" LOC = "T14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # pj<2>NET "led<11>" LOC = "Y13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # pj<3>