URL
https://opencores.org/ocsvn/usb_fpga_2_14/usb_fpga_2_14/trunk
Subversion Repositories usb_fpga_2_14
[/] [usb_fpga_2_14/] [trunk/] [default/] [fpga-fx3/] [ezusb_io.cydsn/] [projectfiles/] [gpif2view.xml] - Rev 2
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<?xml version="1.0" encoding="UTF-8"?>
<Root version="4">
<CyStates>
<CyNormalState>
<Left>363</Left>
<Top>96.4466666666667</Top>
<Width>83</Width>
<Height>70</Height>
<Name>STATE1</Name>
<DisplayName>IDLE</DisplayName>
<zIndex>1</zIndex>
<IsGroup>False</IsGroup>
<ParentID>00000000-0000-0000-0000-000000000000</ParentID>
</CyNormalState>
<CyNormalState>
<Left>105</Left>
<Top>366.446666666667</Top>
<Width>83</Width>
<Height>70</Height>
<Name>STATE2</Name>
<DisplayName>READ</DisplayName>
<zIndex>1</zIndex>
<IsGroup>False</IsGroup>
<ParentID>00000000-0000-0000-0000-000000000000</ParentID>
</CyNormalState>
<CyNormalState>
<Left>524</Left>
<Top>370.487206485292</Top>
<Width>83</Width>
<Height>70</Height>
<Name>STATE3</Name>
<DisplayName>WRITE</DisplayName>
<zIndex>1</zIndex>
<IsGroup>False</IsGroup>
<ParentID>00000000-0000-0000-0000-000000000000</ParentID>
</CyNormalState>
<CyNormalState>
<Left>728</Left>
<Top>109.446666666667</Top>
<Width>83</Width>
<Height>70</Height>
<Name>STATE4</Name>
<DisplayName>SHORT_PKT</DisplayName>
<zIndex>1</zIndex>
<IsGroup>False</IsGroup>
<ParentID>00000000-0000-0000-0000-000000000000</ParentID>
</CyNormalState>
<CyNormalState>
<Left>13</Left>
<Top>91.446666666667</Top>
<Width>83</Width>
<Height>70</Height>
<Name>STATE5</Name>
<DisplayName>ZLP</DisplayName>
<zIndex>1</zIndex>
<IsGroup>False</IsGroup>
<ParentID>00000000-0000-0000-0000-000000000000</ParentID>
</CyNormalState>
<CyStartState>
<Left>370</Left>
<Top>0</Top>
<Width>83</Width>
<Height>70</Height>
<Name>STARTSTATE1</Name>
<DisplayName>RESET</DisplayName>
<zIndex>1</zIndex>
<IsGroup>False</IsGroup>
<ParentID>00000000-0000-0000-0000-000000000000</ParentID>
</CyStartState>
</CyStates>
<CyTransitions>
<CyTransition>
<Name>TRANSITION1</Name>
<TransitionEquation>LOGIC_ONE</TransitionEquation>
<SourceName>STARTSTATE1</SourceName>
<SinkName>STATE1</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION2</Name>
<TransitionEquation>SLWR&PKEND&!SLRD</TransitionEquation>
<SourceName>STATE1</SourceName>
<SinkName>STATE2</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION3</Name>
<TransitionEquation>!SLWR&PKEND&SLRD</TransitionEquation>
<SourceName>STATE1</SourceName>
<SinkName>STATE3</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION4</Name>
<TransitionEquation>!SLWR&!PKEND&SLRD</TransitionEquation>
<SourceName>STATE1</SourceName>
<SinkName>STATE4</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION5</Name>
<TransitionEquation>SLWR&!PKEND&SLRD</TransitionEquation>
<SourceName>STATE1</SourceName>
<SinkName>STATE5</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION6</Name>
<TransitionEquation>PKEND</TransitionEquation>
<SourceName>STATE5</SourceName>
<SinkName>STATE1</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION7</Name>
<TransitionEquation>SLRD</TransitionEquation>
<SourceName>STATE2</SourceName>
<SinkName>STATE1</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION8</Name>
<TransitionEquation>PKEND&SLWR</TransitionEquation>
<SourceName>STATE3</SourceName>
<SinkName>STATE1</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION9</Name>
<TransitionEquation>!SLWR&!PKEND</TransitionEquation>
<SourceName>STATE3</SourceName>
<SinkName>STATE4</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
<CyTransition>
<Name>TRANSITION10</Name>
<TransitionEquation>PKEND|SLWR</TransitionEquation>
<SourceName>STATE4</SourceName>
<SinkName>STATE1</SinkName>
<SourceConnectorName>Connector</SourceConnectorName>
<SinkConnectorName>Connector</SinkConnectorName>
<SourceArrowSymbol>None</SourceArrowSymbol>
<SinkArrowSymbol>Arrow</SinkArrowSymbol>
<zIndex>0</zIndex>
</CyTransition>
</CyTransitions>
</Root>