Subversion Repositories usb_nand_reader

_cmd_chip_read_page:
;CMD_ReadPage.c,5 ::            void cmd_chip_read_page(unsigned char* inBuffer, unsigned char* outBuffer, int len, int addressCycles)
ADDIU   SP, SP, -24
SW      RA, 0(SP)
;CMD_ReadPage.c,7 ::            nand_send_command(NC_READ_MODE);
SW      R25, 4(SP)
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R0, R0
JAL     _nand_send_command+0
NOP     
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,8 ::            nand_send_address(inBuffer + 1, addressCycles);
ADDIU   R2, R25, 1
SH      R27, 8(SP)
SW      R26, 12(SP)
SEH     R26, R28
MOVZ    R25, R2, R0
JAL     _nand_send_address+0
NOP     
;CMD_ReadPage.c,9 ::            nand_send_command(NC_READ_PAGE);
ORI     R25, R0, 48
JAL     _nand_send_command+0
NOP     
;CMD_ReadPage.c,10 ::           do_delay(5);
ORI     R25, R0, 5
JAL     _do_delay+0
NOP     
LW      R26, 12(SP)
LH      R27, 8(SP)
;CMD_ReadPage.c,11 ::           while(!nand_is_ready());
L_cmd_chip_read_page0:
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
JAL     _nand_is_ready+0
NOP     
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
BEQ     R2, R0, L__cmd_chip_read_page17
NOP     
J       L_cmd_chip_read_page1
NOP     
L__cmd_chip_read_page17:
J       L_cmd_chip_read_page0
NOP     
L_cmd_chip_read_page1:
;CMD_ReadPage.c,16 ::           for(i = 0; i < len; i += 64)
SH      R0, 20(SP)
L_cmd_chip_read_page2:
SEH     R3, R27
LH      R2, 20(SP)
SLT     R2, R2, R3
BNE     R2, R0, L__cmd_chip_read_page18
NOP     
J       L_cmd_chip_read_page3
NOP     
L__cmd_chip_read_page18:
;CMD_ReadPage.c,18 ::           nand_read(outBuffer, 64);
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R26, R0
ORI     R26, R0, 64
JAL     _nand_read+0
NOP     
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,20 ::           while(0 == HID_Write(outBuffer, 64))
L_cmd_chip_read_page5:
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R26, R0
ORI     R26, R0, 64
JAL     _HID_Write+0
NOP     
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
ANDI    R2, R2, 255
BEQ     R2, R0, L__cmd_chip_read_page19
NOP     
J       L_cmd_chip_read_page6
NOP     
L__cmd_chip_read_page19:
;CMD_ReadPage.c,21 ::           USB_Break();
JAL     _USB_Break+0
NOP     
J       L_cmd_chip_read_page5
NOP     
L_cmd_chip_read_page6:
;CMD_ReadPage.c,16 ::           for(i = 0; i < len; i += 64)
LH      R2, 20(SP)
ADDIU   R2, R2, 64
SH      R2, 20(SP)
;CMD_ReadPage.c,22 ::           }
J       L_cmd_chip_read_page2
NOP     
L_cmd_chip_read_page3:
;CMD_ReadPage.c,24 ::           }
L_end_cmd_chip_read_page:
LW      R25, 4(SP)
LW      RA, 0(SP)
ADDIU   SP, SP, 24
JR      RA
NOP     
; end of _cmd_chip_read_page
_cmd_chip_read_page_cache_sequential:
;CMD_ReadPage.c,32 ::           void cmd_chip_read_page_cache_sequential(unsigned char* inBuffer, unsigned char* outBuffer, int len, int addressCycles)
ADDIU   SP, SP, -24
SW      RA, 0(SP)
;CMD_ReadPage.c,34 ::           int i = 0;
SW      R25, 4(SP)
;CMD_ReadPage.c,35 ::           int j = *(int*)(inBuffer + 6);
ADDIU   R2, R25, 6
LH      R2, 0(R2)
SH      R2, 20(SP)
;CMD_ReadPage.c,37 ::           nand_send_command(NC_READ_MODE);
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R0, R0
JAL     _nand_send_command+0
NOP     
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,38 ::           nand_send_address(inBuffer + 1, addressCycles);
ADDIU   R2, R25, 1
SH      R27, 8(SP)
SW      R26, 12(SP)
SEH     R26, R28
MOVZ    R25, R2, R0
JAL     _nand_send_address+0
NOP     
;CMD_ReadPage.c,39 ::           nand_send_command(NC_READ_PAGE);
ORI     R25, R0, 48
JAL     _nand_send_command+0
NOP     
;CMD_ReadPage.c,40 ::           do_delay(5);
ORI     R25, R0, 5
JAL     _do_delay+0
NOP     
;CMD_ReadPage.c,41 ::           nand_wait_ready();
JAL     _nand_wait_ready+0
NOP     
LW      R26, 12(SP)
LH      R27, 8(SP)
;CMD_ReadPage.c,42 ::           while(j > 0)
L_cmd_chip_read_page_cache_sequential7:
LH      R2, 20(SP)
SLTI    R2, R2, 1
BEQ     R2, R0, L__cmd_chip_read_page_cache_sequential21
NOP     
J       L_cmd_chip_read_page_cache_sequential8
NOP     
L__cmd_chip_read_page_cache_sequential21:
;CMD_ReadPage.c,44 ::           nand_send_command( (j > 1)? NC_READ_PAGE_CACHE_SEQ : NC_READ_PAGE_CACHE_LAST);
LH      R2, 20(SP)
SLTI    R2, R2, 2
BEQ     R2, R0, L__cmd_chip_read_page_cache_sequential22
NOP     
J       L_cmd_chip_read_page_cache_sequential9
NOP     
L__cmd_chip_read_page_cache_sequential22:
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)
ORI     R2, R0, 49
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)
J       L_cmd_chip_read_page_cache_sequential10
NOP     
L_cmd_chip_read_page_cache_sequential9:
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)
ORI     R2, R0, 63
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)
L_cmd_chip_read_page_cache_sequential10:
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)
SH      R28, 8(SP)
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
SEB     R25, R2
JAL     _nand_send_command+0
NOP     
;CMD_ReadPage.c,45 ::           j--;
LH      R2, 20(SP)
ADDIU   R2, R2, -1
SH      R2, 20(SP)
;CMD_ReadPage.c,47 ::           nand_wait_ready();
JAL     _nand_wait_ready+0
NOP     
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,49 ::           for(i = 0; i < len; i += 64)
SH      R0, 22(SP)
L_cmd_chip_read_page_cache_sequential11:
SEH     R3, R27
LH      R2, 22(SP)
SLT     R2, R2, R3
BNE     R2, R0, L__cmd_chip_read_page_cache_sequential23
NOP     
J       L_cmd_chip_read_page_cache_sequential12
NOP     
L__cmd_chip_read_page_cache_sequential23:
;CMD_ReadPage.c,51 ::           nand_read(outBuffer, 64);
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R26, R0
ORI     R26, R0, 64
JAL     _nand_read+0
NOP     
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,52 ::           while(!HID_Write(outBuffer, 64));
L_cmd_chip_read_page_cache_sequential14:
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R26, R0
ORI     R26, R0, 64
JAL     _HID_Write+0
NOP     
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
BEQ     R2, R0, L__cmd_chip_read_page_cache_sequential24
NOP     
J       L_cmd_chip_read_page_cache_sequential15
NOP     
L__cmd_chip_read_page_cache_sequential24:
J       L_cmd_chip_read_page_cache_sequential14
NOP     
L_cmd_chip_read_page_cache_sequential15:
;CMD_ReadPage.c,53 ::           USB_Break();
JAL     _USB_Break+0
NOP     
;CMD_ReadPage.c,49 ::           for(i = 0; i < len; i += 64)
LH      R2, 22(SP)
ADDIU   R2, R2, 64
SH      R2, 22(SP)
;CMD_ReadPage.c,55 ::           }
J       L_cmd_chip_read_page_cache_sequential11
NOP     
L_cmd_chip_read_page_cache_sequential12:
;CMD_ReadPage.c,56 ::           }
J       L_cmd_chip_read_page_cache_sequential7
NOP     
L_cmd_chip_read_page_cache_sequential8:
;CMD_ReadPage.c,57 ::           }
L_end_cmd_chip_read_page_cache_sequential:
LW      R25, 4(SP)
LW      RA, 0(SP)
ADDIU   SP, SP, 24
JR      RA
NOP     
; end of _cmd_chip_read_page_cache_sequential