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https://opencores.org/ocsvn/usb_nand_reader/usb_nand_reader/trunk
Subversion Repositories usb_nand_reader
[/] [usb_nand_reader/] [trunk/] [mini32/] [CMD_Reset.asm] - Rev 7
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_do_delay:
;CMD_Reset.c,5 :: void do_delay(int cycles)
;CMD_Reset.c,8 :: for(i = 0; i < cycles; i++)
; i start address is: 16 (R4)
MOVZ R4, R0, R0
; i end address is: 16 (R4)
L_do_delay0:
; i start address is: 16 (R4)
SEH R3, R4
SEH R2, R25
SLT R2, R3, R2
BNE R2, R0, L__do_delay6
NOP
J L_do_delay1
NOP
L__do_delay6:
;CMD_Reset.c,10 :: asm NOP;
NOP
;CMD_Reset.c,8 :: for(i = 0; i < cycles; i++)
ADDIU R2, R4, 1
SEH R4, R2
;CMD_Reset.c,11 :: }
; i end address is: 16 (R4)
J L_do_delay0
NOP
L_do_delay1:
;CMD_Reset.c,12 :: }
L_end_do_delay:
JR RA
NOP
; end of _do_delay
_cmd_chip_reset:
;CMD_Reset.c,14 :: void cmd_chip_reset()
ADDIU SP, SP, -8
SW RA, 0(SP)
;CMD_Reset.c,16 :: nand_send_command(NC_RESET);
SW R25, 4(SP)
ORI R25, R0, 255
JAL _nand_send_command+0
NOP
;CMD_Reset.c,17 :: do_delay(10);
ORI R25, R0, 10
JAL _do_delay+0
NOP
;CMD_Reset.c,18 :: while(!nand_is_ready());
L_cmd_chip_reset3:
JAL _nand_is_ready+0
NOP
BEQ R2, R0, L__cmd_chip_reset8
NOP
J L_cmd_chip_reset4
NOP
L__cmd_chip_reset8:
J L_cmd_chip_reset3
NOP
L_cmd_chip_reset4:
;CMD_Reset.c,19 :: }
L_end_cmd_chip_reset:
LW R25, 4(SP)
LW RA, 0(SP)
ADDIU SP, SP, 8
JR RA
NOP
; end of _cmd_chip_reset