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https://opencores.org/ocsvn/usb_nand_reader/usb_nand_reader/trunk
Subversion Repositories usb_nand_reader
[/] [usb_nand_reader/] [trunk/] [mini32/] [NandControl.c] - Rev 7
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#include "NandControl.h" #include "NandDataLine.h" #include "CMD.h" /* NAND Control Line */ // Ready/Busy# lines sbit ctrl_rnb3 at PORTB.B0;//LATB0_bit; sbit ctrl_rnb2 at PORTD.B11;//LATD11_bit; sbit ctrl_rnb1 at PORTB.B9;//LATB9_bit; sbit ctrl_rnb0 at PORTD.B5;//LATD5_bit; // Chip enable lines sbit ctrl_nce3 at LATB14_bit; sbit ctrl_nce2 at LATF0_bit; sbit ctrl_nce1 at LATF1_bit; sbit ctrl_nce0 at LATB8_bit; // Other control lines sbit ctrl_nre at LATD4_bit; sbit ctrl_cle at LATB15_bit; sbit ctrl_ale at LATD0_bit; sbit ctrl_nwe at LATE0_bit; sbit ctrl_nwp at LATE1_bit; void init_nand_control_line() { TRISB0_bit = 1; TRISD11_bit = 1; TRISB9_bit = 1; TRISD5_bit = 1; TRISB14_bit = 0; TRISF0_bit = 0; TRISF1_bit = 0; TRISB8_bit = 0; TRISD4_bit = 0; TRISB15_bit = 0; TRISD0_bit = 0; TRISE0_bit = 0; TRISE1_bit = 0; ctrl_nce0 = 1; ctrl_nce1 = 1; ctrl_nce2 = 1; ctrl_nce3 = 1; ctrl_nre = 1; ctrl_cle = 0; ctrl_ale = 0; ctrl_nwe = 1; ctrl_nwp = 0; } int nand_is_ready() { int r = (int)(ctrl_rnb0 & ctrl_rnb1 & ctrl_rnb2 & ctrl_rnb3); if(0 == r) LATG6_bit = 0; else LATG6_bit = 1; return r; } void nand_wait_ready() { while(0 == nand_is_ready()); } void nand_chip_select(int idx) { switch(idx) { case 0: ctrl_nce1 = ctrl_nce2 = ctrl_nce3 = 1; ctrl_nce0 = 0; break; case 1: ctrl_nce0 = ctrl_nce2 = ctrl_nce3 = 1; ctrl_nce1 = 0; break; case 2: ctrl_nce0 = ctrl_nce1 = ctrl_nce3 = 1; ctrl_nce2 = 0; break; case 3: ctrl_nce0 = ctrl_nce1 = ctrl_nce2 = 1; ctrl_nce3 = 0; break; default: break; } } void nand_chip_unselect() { ctrl_nce0 = 1; ctrl_nce1 = 1; ctrl_nce2 = 1; ctrl_nce3 = 1; } void nand_send_command(unsigned char cmd) { data_line_write_byte(cmd); ctrl_ale = 0; ctrl_nre = 1; ctrl_nwe = 0; ctrl_cle = 1; ctrl_nwe = 1; ctrl_cle = 0; } void nand_send_address(unsigned char* addr, int len) { int i; ctrl_cle = 0; ctrl_nre = 1; ctrl_ale = 1; if(0 == addr) { data_line_write_byte(0); ctrl_nwe = 0; ctrl_nwe = 1; } else { for(i = 0; i < len; i++) { data_line_write_byte(*(addr + i)); ctrl_nwe = 0; ctrl_nwe = 1; } } ctrl_ale = 0; } void nand_write(unsigned char* buffer, int len) { int i; ctrl_cle = 0; ctrl_ale = 0; ctrl_nre = 1; for(i = 0; i < len; i++) { data_line_write_byte(*(buffer + i)); ctrl_nwe = 0; ctrl_nwe = 1; } } void nand_read(unsigned char* buffer, int len) { int i; ctrl_cle = 0; ctrl_ale = 0; ctrl_nwe = 1; for(i = 0; i < len; i++) { ctrl_nre = 0; while(PORTD.B4 != 0); *(buffer + i) = data_line_read_byte(); ctrl_nre = 1; while(PORTD.B4 != 1); } } void nand_toggle_wp() { ctrl_nwp = ~ctrl_nwp; Delay_us(2); } /* void blink(int i) { int j; for(j = 0; j < i; j++) { LATD6_bit = ~LATD6_bit; Delay_ms(50); LATD6_bit = ~LATD6_bit; Delay_ms(50); } } */