Subversion Repositories usb_nand_reader

/*
 * Project name:
     HID_Read_Write_Polling (USB HID Read & Write Test)
 * Copyright:
     (c) Mikroelektronika, 2011.
 * Revision History:
     20110615:
       - initial release (FJ);
 * Description:
     This example establishes connection with the HID terminal that is active
     on the PC. Upon connection establishment, the HID Device Name will appear
     in the respective window. The character that user sends to PIC from the HID
     terminal will be re-sent back to user.
 * Test configuration:
     MCU:             P32MX534F064H
                      http://ww1.microchip.com/downloads/en/DeviceDoc/61156G.pdf
     Dev.Board:       MINI-32 Board
                      http://www.mikroe.com/eng/products/view/711/mini-32-board/
     Oscillator:      XT-PLL10x, 80.000MHz
     Ext. Modules:    None.
     SW:              mikroC PRO for PIC32
                      http://www.mikroe.com/eng/categories/view/89/pic32-compilers/
 * NOTES:
     - None.
*/
 
#include "NandDataLine.h"
#include "NandControl.h"
#include "CMD.h"
 
 
sbit CE_ON at LATG6_bit;
sbit DAT_ON at LATD6_bit;
 
char cnt;
char kk;
char readbuff[64];
//char writebuff[64];
char writebuff[1024*3];
 
unsigned char* onfiParamPage = (unsigned char*)0;
int pageSize = 0;
int addressCycles = 0;
int busWidth = 8;
char isOnfi = 0;
unsigned char nandId[5];
 
void main(void)
{
  char   hasId = 0;
  char   hasOnfiParameterPage = 0;
 
  AD1PCFG = 0xFFFF;
  TRISG6_bit = 0;
  LATG6_bit = 0;
  TRISD6_bit = 0;
  LATD6_bit = 0;
 
  init_nand_data_line();
  init_nand_control_line();
 
  MM_Init();
 
  HID_Enable(&readbuff,&writebuff);
  if(U1CON.JSTATE == 0)
  {
     LATG6_bit = 1;
     Delay_ms(1000);
     LATG6_bit = 0;
  }
  else
  {
     LATD6_bit = 1;
     Delay_ms(1000);
     LATD6_bit = 0;
  }
 
 
  while(1)
  {
    USB_Polling_Proc();
 
    kk = HID_Read();
    if(kk != 0)
    {
        switch(readbuff[0])
        {
            case NAND_CHIP_ENABLE:
                cmd_chip_enable(readbuff);
                CE_ON = 1;
                break;
 
            case NAND_CHIP_DISABLE:
                cmd_chip_disable();
                CE_ON = 0;
                break;
 
            case NAND_CHIP_RESET:
                DAT_ON = 1;
                cmd_chip_reset();
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_READ_ID:
                DAT_ON = 1;
                cmd_chip_read_id(writebuff, 0);
                nandId[0] = writebuff[0];
                nandId[1] = writebuff[1];
                nandId[2] = writebuff[2];
                nandId[3] = writebuff[3];
                nandId[4] = writebuff[4];
                HID_Write(&writebuff, 64);
                hasId = 1;
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_READ_ID_ONFI:
                DAT_ON = 1;
                cmd_chip_read_id(writebuff, 0x20);
                if('O' == writebuff[0] && 'N' == writebuff[1] && 'F' == writebuff[2] && 'I' == writebuff[3])
                {
                    isOnfi = 1;
                    onfiParamPage = Malloc(0x100);
                    if(0 == onfiParamPage)
                        isOnfi = 0;
                }
                HID_Write(&writebuff, 64);
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_READ_PARAM_PAGE:
                DAT_ON = 1;
                if(0 != onfiParamPage)
                {
                    int i, j;
                    cmd_chip_read_param_page(onfiParamPage);
                    for(i = 0; i < 4; i++)
                    {
                        for(j = 0; j < 64; j++)
                        {
                            writebuff[j] = onfiParamPage[i * 64 + j];
                        }
                        HID_Write(&writebuff, 64);
                    }
                    hasOnfiParameterPage = 1;
                    busWidth = 8 << (onfiParamPage[6] & 1);
                }
                else
                {
                    writebuff[0] = 0;
                    HID_Write(&writebuff, 64);
                }
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_READ_PAGE:
                /*  Check whether we have all the needed information (e.g. ID or ONFI parameter page) */
                if(0 == hasId && 0 == hasOnfiParameterPage)
                {
                    DAT_ON = 0;
                    break;
                }
 
                if(hasOnfiParameterPage)
                {
                    pageSize = *(unsigned int*)(onfiParamPage + 80) + *(unsigned short*)(onfiParamPage + 84);
                    addressCycles = (*(onfiParamPage + 101) & 0x0f) + (*(onfiParamPage + 101) >> 4);
                }
                DAT_ON = 1;
                cmd_chip_read_page(readbuff, /*pageBuffer*/ writebuff, pageSize, addressCycles);
                DAT_ON = 0;
                break;
 
            case NAND_SET_CONFIG_DATA:
                DAT_ON = 1;
                pageSize = *(int*)(readbuff + 1);
                addressCycles = *(readbuff + 5);
                busWidth = *(readbuff + 6);
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_READ_CACHE_SEQ:
                /*  Check whether we have all the needed information (e.g. ID or ONFI parameter page) */
                if(0 == hasId && 0 == hasOnfiParameterPage)
                {
                    DAT_ON = 0;
                    break;
                }
 
                if(hasOnfiParameterPage)
                {
                    pageSize = *(unsigned int*)(onfiParamPage + 80) + *(unsigned short*)(onfiParamPage + 84);
                    addressCycles = (*(onfiParamPage + 101) & 0x0f) + (*(onfiParamPage + 101) >> 4);
                }
                DAT_ON = 1;
                if(0 != pageSize)
                {
                    USB_Polling_Proc();
                    cmd_chip_read_page_cache_sequential(readbuff, /*pageBuffer*/ writebuff, pageSize, addressCycles);
                }
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_READ_STATUS:
                writebuff[0] = cmd_chip_read_status();
                HID_Write(&writebuff, 64);
                break;
 
            case NAND_CHIP_READ_UNIQUE_ID:
                DAT_ON = 1;
                cmd_chip_read_unique_id(writebuff);
                HID_Write(&writebuff, 64);
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_BLOCK_ERASE:
                DAT_ON = 1;
                cmd_chip_block_erase(readbuff);
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_TOGGLE_WP:
                nand_toggle_wp();
                break;
 
            case NAND_CHIP_PAGE_PROGRAM:
                DAT_ON = 1;
                if(0 != pageSize)
                    cmd_chip_page_program(readbuff, addressCycles, pageSize);
                DAT_ON = 0;
                break;
 
            case NAND_CHIP_READ_STATUS_ENHANCED:
                writebuff[0] = cmd_chip_read_status_enhanced(readbuff, addressCycles);
                HID_Write(&writebuff, 64);
                break;
 
            default:
                break;
        }
    }
  }
  /*
  while(1){
    USB_Polling_Proc();               // Call this routine periodically
    kk = HID_Read();
    if(kk != 0){
      PIN = ~PIN;
      STAT = 1;
      for(cnt=0;cnt<64;cnt++)
        writebuff[cnt]=readbuff[cnt];
      STAT = 0;
      DATA = 1;
      HID_Write(&writebuff,64);
      DATA = 0;
    }
  }
  */
}