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URL https://opencores.org/ocsvn/vhdl_cpu_emulator/vhdl_cpu_emulator/trunk

Subversion Repositories vhdl_cpu_emulator

[/] [vhdl_cpu_emulator/] [trunk/] [ctc.txt] - Rev 3

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PARAMETERS vector8 counter vector8 index
WAIT 2 us
CLEAR ctcout.txt
vector8 tmp = 00000000
vector8 cnt_orig = counter
vector8 loop_count = 00000000
WHILE

IF loop_count > 00000100
   WHILE_EXIT
IF_END

loop_count += 00000001

counter = cnt_orig

if index == 00000000
vector8 wavail = 00000000
while
        if counter == 00010000
                while_exit
        if_end
        read 00001001 wavail
        while
                if counter == 00010000
                        while_exit
                if_end
                if wavail > 00000000
                   WRITE 00001101 counter
                   #increment counter for transmit
                counter += 00000001
                if_else
                        while_exit
                if_end
                wavail -= 00000001
        while_end
while_end
if_end

WAIT 2 us

if index == 00000001
vector8 ravail = 00000000
while
        if counter == 00010000
                while_exit
        if_end
        read 00001010 ravail
        counter += ravail
        if ravail > 00000000
           READ_DMA 00001110 ravail 00000000 ctcout.txt
        if_end
while_end
if_end

WHILE_END

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