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--  structure file generated by ttb_gen
architecture struct of example_dut_ttb is
 
component example_dut
  port (
        ex_reset_n : in      std_logic;
        ex_clk_in  : in      std_logic;
        ex_data1   : out     std_logic_vector(31 downto 0);
        ex_data2   : out     std_logic_vector(31 downto 0);
        stm_add    : in      std_logic_vector(31 downto 0);
        stm_dat    : inout   std_logic_vector(31 downto 0);
        stm_rwn    : in      std_logic;
        stm_req_n  : in      std_logic;
        stm_ack_n  : out     std_logic
       );
end component;
 
component example_dut_tb
  generic (
           stimulus_file: in string
          );
  port (
        ex_reset_n : buffer  std_logic;
        ex_clk_in  : buffer  std_logic;
        ex_data1   : in      std_logic_vector(31 downto 0);
        ex_data2   : in      std_logic_vector(31 downto 0);
        stm_add    : buffer  std_logic_vector(31 downto 0);
        stm_dat    : inout   std_logic_vector(31 downto 0);
        stm_rwn    : buffer  std_logic;
        stm_req_n  : buffer  std_logic;
        stm_ack_n  : in      std_logic
       );
end component;
 
--for all: example_dut    use entity dut_lib.example_dut(str);
--for all: example_dut_tb    use entity work.example_dut_tb(bhv);
 
  signal temp_ex_reset_n : std_logic;
  signal temp_ex_clk_in  : std_logic;
  signal temp_ex_data1   : std_logic_vector(31 downto 0);
  signal temp_ex_data2   : std_logic_vector(31 downto 0);
  signal temp_stm_add    : std_logic_vector(31 downto 0);
  signal temp_stm_dat    : std_logic_vector(31 downto 0);
  signal temp_stm_rwn    : std_logic;
  signal temp_stm_req_n  : std_logic;
  signal temp_stm_ack_n  : std_logic;
 
begin
 
dut: example_dut
  port map(
           ex_reset_n =>  temp_ex_reset_n,
           ex_clk_in  =>  temp_ex_clk_in,
           ex_data1   =>  temp_ex_data1,
           ex_data2   =>  temp_ex_data2,
           stm_add    =>  temp_stm_add,
           stm_dat    =>  temp_stm_dat,
           stm_rwn    =>  temp_stm_rwn,
           stm_req_n  =>  temp_stm_req_n,
           stm_ack_n  =>  temp_stm_ack_n
          );
 
tb: example_dut_tb
  generic map(
               stimulus_file => stimulus_file
             )
  port map(
           ex_reset_n =>  temp_ex_reset_n,
           ex_clk_in  =>  temp_ex_clk_in,
           ex_data1   =>  temp_ex_data1,
           ex_data2   =>  temp_ex_data2,
           stm_add    =>  temp_stm_add,
           stm_dat    =>  temp_stm_dat,
           stm_rwn    =>  temp_stm_rwn,
           stm_req_n  =>  temp_stm_req_n,
           stm_ack_n  =>  temp_stm_ack_n
          );
 
end struct;