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[/] [vspi/] [trunk/] [projnav/] [xps/] [system.mhs] - Rev 14

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# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 13.2 Build EDK_O.61xd
# Tue Feb 28 10:59:35 2012
# Target Board:  Digilent Atlys Rev C
# Family:    spartan6
# Device:    xc6slx45
# Package:   csg324
# Speed Grade:  -2
# Processor number: 1
# Processor 1: microblaze_0
# System clock frequency: 66.7
# Debug Interface: On-Chip HW Debug Module
# ##############################################################################
 PARAMETER VERSION = 2.1.0


 PORT fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin = fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin, DIR = I, VEC = [0:7]
 PORT fpga_0_LEDs_8Bits_GPIO_IO_O_pin = fpga_0_LEDs_8Bits_GPIO_IO_O_pin, DIR = O, VEC = [0:7]
 PORT fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin = fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin, DIR = I, VEC = [0:4]
 PORT fpga_0_clk_1_sys_clk_pin = CLK_S, DIR = I, SIGIS = CLK, CLK_FREQ = 100000000
 PORT fpga_0_rst_1_sys_rst_pin = sys_rst_s, DIR = I, SIGIS = RST, RST_POLARITY = 0
 PORT spiifc_0_SPI_CLK_pin = spiifc_0_SPI_CLK, DIR = I, SIGIS = CLK, CLK_FREQ = 50000000
 PORT spiifc_0_SPI_MISO_pin = spiifc_0_SPI_MISO, DIR = O
 PORT spiifc_0_SPI_MOSI_pin = spiifc_0_SPI_MOSI, DIR = I
 PORT spiifc_0_SPI_SS_pin = spiifc_0_SPI_SS, DIR = I


BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER C_USE_BARREL = 1
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER HW_VER = 8.20.a
 BUS_INTERFACE DLMB = dlmb
 BUS_INTERFACE ILMB = ilmb
 BUS_INTERFACE DPLB = mb_plb
 BUS_INTERFACE IPLB = mb_plb
 BUS_INTERFACE DEBUG = microblaze_0_mdm_bus
 PORT MB_RESET = mb_reset
END

BEGIN plb_v46
 PARAMETER INSTANCE = mb_plb
 PARAMETER HW_VER = 1.05.a
 PORT PLB_Clk = clk_66_6667MHz
 PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_v10
 PARAMETER INSTANCE = ilmb
 PARAMETER HW_VER = 2.00.b
 PORT LMB_Clk = clk_66_6667MHz
 PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_v10
 PARAMETER INSTANCE = dlmb
 PARAMETER HW_VER = 2.00.b
 PORT LMB_Clk = clk_66_6667MHz
 PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = dlmb_cntlr
 PARAMETER HW_VER = 3.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x0000ffff
 BUS_INTERFACE SLMB = dlmb
 BUS_INTERFACE BRAM_PORT = dlmb_port
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = ilmb_cntlr
 PARAMETER HW_VER = 3.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x0000ffff
 BUS_INTERFACE SLMB = ilmb
 BUS_INTERFACE BRAM_PORT = ilmb_port
END

BEGIN bram_block
 PARAMETER INSTANCE = lmb_bram
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = ilmb_port
 BUS_INTERFACE PORTB = dlmb_port
END

BEGIN xps_gpio
 PARAMETER INSTANCE = DIP_Switches_8Bits
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_BASEADDR = 0x81440000
 PARAMETER C_HIGHADDR = 0x8144ffff
 BUS_INTERFACE SPLB = mb_plb
 PORT GPIO_IO_I = fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin
END

BEGIN xps_gpio
 PARAMETER INSTANCE = LEDs_8Bits
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_BASEADDR = 0x81420000
 PARAMETER C_HIGHADDR = 0x8142ffff
 BUS_INTERFACE SPLB = mb_plb
 PORT GPIO_IO_O = fpga_0_LEDs_8Bits_GPIO_IO_O_pin
END

BEGIN xps_gpio
 PARAMETER INSTANCE = Push_Buttons_5Bits
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_GPIO_WIDTH = 5
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_BASEADDR = 0x81400000
 PARAMETER C_HIGHADDR = 0x8140ffff
 BUS_INTERFACE SPLB = mb_plb
 PORT GPIO_IO_I = fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin
END

BEGIN clock_generator
 PARAMETER INSTANCE = clock_generator_0
 PARAMETER C_CLKIN_FREQ = 100000000
 PARAMETER C_CLKOUT0_FREQ = 66666666
 PARAMETER C_CLKOUT0_PHASE = 0
 PARAMETER C_CLKOUT0_GROUP = NONE
 PARAMETER C_CLKOUT0_BUF = TRUE
 PARAMETER C_EXT_RESET_HIGH = 0
 PARAMETER HW_VER = 4.02.a
 PORT CLKIN = CLK_S
 PORT CLKOUT0 = clk_66_6667MHz
 PORT RST = sys_rst_s
 PORT LOCKED = Dcm_all_locked
END

BEGIN mdm
 PARAMETER INSTANCE = mdm_0
 PARAMETER C_MB_DBG_PORTS = 1
 PARAMETER C_USE_UART = 1
 PARAMETER HW_VER = 2.00.b
 PARAMETER C_BASEADDR = 0x84400000
 PARAMETER C_HIGHADDR = 0x8440ffff
 BUS_INTERFACE SPLB = mb_plb
 BUS_INTERFACE MBDEBUG_0 = microblaze_0_mdm_bus
 PORT Debug_SYS_Rst = Debug_SYS_Rst
END

BEGIN proc_sys_reset
 PARAMETER INSTANCE = proc_sys_reset_0
 PARAMETER C_EXT_RESET_HIGH = 0
 PARAMETER HW_VER = 3.00.a
 PORT Slowest_sync_clk = clk_66_6667MHz
 PORT Ext_Reset_In = sys_rst_s
 PORT MB_Debug_Sys_Rst = Debug_SYS_Rst
 PORT Dcm_locked = Dcm_all_locked
 PORT MB_Reset = mb_reset
 PORT Bus_Struct_Reset = sys_bus_reset
 PORT Peripheral_Reset = sys_periph_reset
END

BEGIN spiifc
 PARAMETER INSTANCE = spiifc_0
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_BASEADDR = 0x85000000
 PARAMETER C_HIGHADDR = 0x8500FFFF
 PARAMETER C_MEM0_BASEADDR = 0x85010000
 PARAMETER C_MEM0_HIGHADDR = 0x85010FFF
 PARAMETER C_MEM1_BASEADDR = 0x85011000
 PARAMETER C_MEM1_HIGHADDR = 0x85011FFF
 BUS_INTERFACE SPLB = mb_plb
 PORT SPI_CLK = spiifc_0_SPI_CLK
 PORT SPI_MOSI = spiifc_0_SPI_MOSI
 PORT SPI_MISO = spiifc_0_SPI_MISO
 PORT SPI_SS = spiifc_0_SPI_SS
END

BEGIN xps_central_dma
 PARAMETER INSTANCE = xps_central_dma_0
 PARAMETER HW_VER = 2.03.a
 PARAMETER C_BASEADDR = 0x86000000
 PARAMETER C_HIGHADDR = 0x8600FFFF
 BUS_INTERFACE MPLB = mb_plb
 BUS_INTERFACE SPLB = mb_plb
END

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