Subversion Repositories vtach

<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
     by the Xilinx ISE software.  Any direct editing or
     changes made to this file may result in unpredictable
     behavior or data corruption.  It is strongly advised that
     users do not edit the contents of this file. -->
<messages>
<msg type="warning" file="HDLCompiler" num="189" delta="unknown" >"/home/alw/projects/vtachspartan/bcdadd.v" Line 5: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">a</arg>&gt;. Formal port size is <arg fmt="%d" index="2">17</arg>-bit while actual signal size is <arg fmt="%d" index="1">16</arg>-bit.
</msg>

<msg type="warning" file="HDLCompiler" num="189" delta="unknown" >"/home/alw/projects/vtachspartan/bcdadd.v" Line 12: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">a</arg>&gt;. Formal port size is <arg fmt="%d" index="2">17</arg>-bit while actual signal size is <arg fmt="%d" index="1">12</arg>-bit.
</msg>

</messages>