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Release 13.2 Drc O.61xd (lin64)
Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.

Sat May 25 07:43:46 2013

drc -z top.ncd top.pcf

INFO:PhysDesignRules:772 - To achieve optimal frequency synthesis performance
   with the CLKFX and CLKFX180 outputs of the DCM comp clockdll/DCM_INST,
   consult the device Interactive Data Sheet.
DRC detected 0 errors and 51 warnings.  Please see the previously displayed
individual error or warning messages for more details.