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# $Id: tb_rri_stim.dat 311 2010-06-30 17:52:37Z mueller $
#
#  Revision History: 
# Date         Rev Version  Comment
# 2010-06-06   302   2.0    use sop/eop framing instead of soc+chaining
# 2007-11-24    98   1.2    adapt to new internal init handling
# 2007-11-04    95   1.1    add .iowt's in Test 15 to get serport timing right
# 2007-06-17    58   1.0    Initial version
#
.wait 5
C some non frame data first
.tx8  00000000
.wait 5
.tx8  00000001
.wait 5
.tx8  00000010
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 1: wreg
C wreg: tx: sop - cmd(10000,010) addr(0000) dl dh ccrc - eop
C       rx: sop - cmd(010) stat crc - eop
#
.rxsop
.rxcs  10000010 00000000
.rxeop
#
.txsop
.txcad 10000010 00000000 0011001111001100
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 2: rreg
C rreg: tx: sop - cmd(10010,000) addr(0000) ccrc - eop
C       rx: sop - cmd(000) dl dh stat crc - eop
#
.rxsop
.rxcds 10010000          0011001111001100 00000000
.rxeop
#
.txsop
.txca  10010000 00000000
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 3: chained wreg - wreg - rreg
C wreg: tx: sop - cmd(11001,010) addr(0001) dl dh ccrc
C wreg: tx:     - cmd(11011,010) addr(0010) dl dh ccrc
C rreg: tx:     - cmd(11100,000) addr(0001) ccrc
C       tx:     - eop
C       rx: sop - cmd(010) stat crc
C       rx:     - cmd(010) stat crc
C       rx:     - cmd(000) dl dh stat crc
C       rx:     - eop
#
.rxsop
.rxcs  11001010 00000000
.rxcs  11001010 00000000
.rxcds 11100000          1111111100000001 00000000
.rxeop
#
.txsop
.txcad 11001010 00000001 1111111100000001
.txcad 11001010 00000010 1111111100000010
.txca  11100000 00000001 
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 4: wblk - rblk
C wblk: rx: sop - cmd(10100,011) addr(10000000) cnt(8->111) ccrc dl dh .. dcrc
C       rx:     - eop
C       rx: sop - cmd(011) stat crc
C       rx:     - eop
#
.rxsop
.rxcs  10100011 00000000
.rxeop
#
.txsop
.txcac 10100011 10000000 00000111
.tx16  0000000001000000
.tx16  0000000001000001
.tx16  0000000001000010
.tx16  0000000001000011
.tx16  0000000001000100
.tx16  0000000001000101
.tx16  0000000001000110
.tx16  0000000001000111
.txcrc
.txeop
#
.iowt 10
C
C now check, that register 16 holds 8, clear it to prepare reread:
C rreg: tx: sop - cmd(10011,000) addr(10000) ccrc
C wreg: tx:     - cmd(10000,010) addr(10000) dl dh ccrc
C       tx:     - eop
C       rx: sop - cmd(000) dl dh stat crc
C       rx:     - cmd(010) stat crc
C       rx:     - eop
#
.rxsop
.rxcds 10011000 0000000000001000 00000000
.rxcs  10000010 00000000
.rxeop
#
.txsop
.txca  10011000 00010000
.txcad 10000010 00010000 00000000000000000
.txeop
#
.iowt 10
C rblk: rx: sop - cmd(10110,001) addr(10000000) cnt(8->111) ccrc - eop
C       rx: sop - cmd(001) cnt dl dh ... stat crc - eop
#
.rxsop
.rx8  10110001
.rx8  00000111
.rx16 0000000001000000
.rx16 0000000001000001
.rx16 0000000001000010
.rx16 0000000001000011
.rx16 0000000001000100
.rx16 0000000001000101
.rx16 0000000001000110
.rx16 0000000001000111
.rx8  00000000
.rxcrc
.rxeop
#
.txsop
.txcac 10110001 10000000 00000111
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 5: stat (in non-error case) re-read last cmd twice, shouldn't change
C wreg: tx: sop - cmd(00001,010) addr(0010) dl dh ccrc
C wreg: tx:     - cmd(00011,010) addr(0011) dl dh ccrc
C rreg: tx:     - cmd(00101,000) addr(0010) ccrc
C rreg: tx:     - cmd(00111,000) addr(0011) ccrc
C stat: tx:     - cmd(01001,100) ccrc
C stat: tx:     - cmd(01010,100) ccrc
C       tx:     - eop
C       rx: sop - cmd(010) stat crc
C       rx:     - cmd(010) stat crc
C       rx:     - cmd(000) dl dh stat crc
C       rx:     - cmd(000) dl dh stat crc
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
C       rx:     - eop
#
.rxsop
.rxcs  00001010 00000000
.rxcs  00011010 00000000
.rxcds 00101000          1000000000000010 00000000
.rxcds 00111000          1000000100000011 00000000
.rxccd 01001100 00111000 1000000100000011 00000000
.rxccd 01010100 00111000 1000000100000011 00000000
.rxeop
#
.txsop
.txcad 00001010 00000010 1000000000000010
.txcad 00011010 00000011 1000000100000011
.txca  00101000 00000010
.txca  00111000 00000011
.txc   01001100
.txc   01010100
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 6: ccrc error abort
C wreg: tx: sop - cmd(01001,010) addr(0010) dl dh ccrc
C wreg: tx:     - cmd(01011,010) addr(0011) dl dh ccrc
C rreg: tx:     - cmd(01101,000) addr(0010) ccrc
C rreg: tx:     - cmd(01110,000) addr(0011) *BAD CRC*
C       tx:     - eop
C       rx: sop - cmd(010) stat crc
C       rx:     - cmd(010) stat crc
C       rx:     - cmd(000) dl dh stat crc
C       rx:     - nak  *ABORT*
C       rx:     - eop
#
.rxsop
.rxcs  01001010 00000000
.rxcs  01011010 00000000
.rxcds 01101000          1000000100001010 00000000
.rxnak
.rxeop
#
.txsop
.txcad 01001010 00000010 1000000100001010
.txcad 01011010 00000011 1000000100001011
.txca  01101000 00000010
.tx8   01110000 
.tx8   00000011
.tx8   00000000
.txeop
#
.iowt 10
C
C now check that stat reflects last successfull rreg; re-read ccrc=1 sticks !
C stat: tx: sop - cmd(10001,100) ccrc
C stat: tx:     - cmd(10010,100) ccrc
C       tx:     - eop
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
C       rx:     - eop
C     stat: stat(000),attn(0),ccrc(1),dcrc(0),ioto(0),ioerr(0) -> 00001000
.rxsop
.rxccd 10001100 01101000 1000000100001010 00001000
.rxccd 10010100 01101000 1000000100001010 00001000
.rxeop
#
.txsop
.txc   10001100
.txc   10010100
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 7: dcrc error condition
C wreg: tx: sop - cmd(00001,010) addr(10000) dl dh ccrc
C wblk: rx:     - cmd(00011,011) addr(10000000) cnt(4->011) ccrc dl dh .. 
C                                                                   *BAD CRC*
C       rx:     - eop
C       rx: sop - cmd(010) stat crc
C       rx:     - cmd(011) stat crc
C       rx:     - eop
C     stat: stat(000),attn(0),ccrc(0),dcrc(1),ioto(0),ioerr(0) -> 00000100
#
.rxsop
.rxcs  00001010 00000000
.rxcs  00010011 00000100
.rxeop
#
.txsop
.txcad 00001010 00010000 00000000000000000
.txcac 00010011 10000000 00000011
.tx16  0001000001000000
.tx16  0001000001000001
.tx16  0001000001000010
.tx16  0001000001000011
.tx8   00000000
.txeop
#
.iowt 10
C
C now check that stat reflects bad dcrc: re-read dcrc=1 sticks !
C stat: tx: sop - cmd(00101,100) ccrc
C stat: tx:     - cmd(00110,100) ccrc
C       tx:     - eop
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
C       rx:     - cmd(100) ccmd (000) dl dh stat crc
C       rx:     - eop
C     stat: stat(000),attn(0),ccrc(0),dcrc(1),ioto(0),ioerr(0) -> 00000100
C     Note: dl,dh still the last read of Test 6 !!
.rxsop
.rxccd 00101100 00010011 1000000100001010 00000100
.rxccd 00110100 00010011 1000000100001010 00000100
.rxeop
#
.txsop
.txc   00101100
.txc   00110100
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 8: err(bad address) condition; 11000000 is an address returning err=1
C rreg: tx: sop - cmd(00001,000) addr(00010000) ccrc
C rreg: tx:     - cmd(00011,000) addr(11000000) ccrc
C wreg: tx:     - cmd(00101,010) addr(00010000) dl dh ccrc
C wreg: tx:     - cmd(00110,010) addr(11000000) dl dh ccrc
C       tx:     - eop
C     Note: the rreg(10000) will return 4, the prt after the last wblk !
C     Note: tb returns 1010101010101010 for access to bad addresses
C     stat: stat(000),attn(0),ccrc(0),dcrc(0),ioto(0),ioerr(1) -> 00000001
#
.rxsop
.rxcds 00001000          0000000000000100 00000000
.rxcds 00011000          1010101010101010 00000001
.rxcs  00101010 00000000
.rxcs  00110010 00000001
.rxeop
#
.txsop
.txca  00001000 00010000
.txca  00011000 11000000
.txcad 00101010 00010000 0000000000000000
.txcad 00110010 11000000 1000111110001111
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 9: to(time out) condition; 01bbbbbb addressed take n+1 hold states
C wreg: tx: sop - cmd(00001,010) addr(01000000) dl dh ccrc  (nh=1)
C wreg: tx:     - cmd(00011,010) addr(01001111) dl dh ccrc  (nh=16)
C wreg: tx:     - cmd(00101,010) addr(01011101) dl dh ccrc  (nh=30)
C wreg: tx:     - cmd(00111,010) addr(01011110) dl dh ccrc  (nh=31)
C wreg: tx:     - cmd(01001,010) addr(01011111) dl dh ccrc  (nh=32) TO
C wreg: tx:     - cmd(01011,010) addr(01100000) dl dh ccrc  (nh=33) TO
C wreg: tx:     - cmd(01101,010) addr(01111111) dl dh ccrc  (nh=64) TO
C wreg: tx:     - cmd(01110,010) addr(01000001) dl dh ccrc  (nh=2)
C       tx:     - eop
C     stat: stat(000),attn(0),ccrc(0),dcrc(0),ioto(1),ioerr(0) -> 00000010
#
.rxsop
.rxcs  00001010 00000000
.rxcs  00011010 00000000
.rxcs  00101010 00000000
.rxcs  00111010 00000000
.rxcs  01001010 00000010
.rxcs  01011010 00000010
.rxcs  01101010 00000010
.rxcs  01110010 00000000
.rxeop
#
.txsop
.txcad 00001010 01000000 0000000001000000
.txcad 00011010 01001111 0000000001001111
.txcad 00101010 01011101 0000000001011101
.txcad 00111010 01011110 0000000001011110
.txcad 01001010 01011111 0000000001011111
.txcad 01011010 01100000 0000000001100000
.txcad 01101010 01111110 0000000001111111
.txcad 01110010 01000001 0000000001000001
.txeop
.iowt 10
C
C now same with rreg
C rreg: tx: sop - cmd(00001,000) addr(01000000) ccrc  (nh=1)
C rreg: tx:     - cmd(00011,000) addr(01001111) ccrc  (nh=16)
C rreg: tx:     - cmd(00101,000) addr(01011101) ccrc  (nh=30)
C rreg: tx:     - cmd(00111,000) addr(01011110) ccrc  (nh=31)
C rreg: tx:     - cmd(01001,000) addr(01011111) ccrc  (nh=32) TO
C rreg: tx:     - cmd(01011,000) addr(01100000) ccrc  (nh=33) TO
C rreg: tx:     - cmd(01101,000) addr(01111111) ccrc  (nh=64) TO
C rreg: tx:     - cmd(01110,000) addr(01000001) ccrc  (nh=2)
C       tx:     - eop
C     Note: tb returns 0101010101010101 for timeout
#
.rxsop
.rxcds 00001000          0000000001000000 00000000
.rxcds 00011000          0000000001001111 00000000
.rxcds 00101000          0000000001011101 00000000
.rxcds 00111000          0000000001011110 00000000
.rxcds 01001000          0101010101010101 00000010
.rxcds 01011000          0101010101010101 00000010
.rxcds 01101000          0101010101010101 00000010
.rxcds 01110000          0000000001000001 00000000
.rxeop
#
.txsop
.txca  00001000 01000000
.txca  00011000 01001111
.txca  00101000 01011101
.txca  00111000 01011110
.txca  01001000 01011111
.txca  01011000 01100000
.txca  01101000 01111110
.txca  01110000 01000001
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 10: external init command
C rreg: tx: sop - cmd(00001,000) addr(00010010) ccrc 
C init: tx:     - cmd(00011,110) addr(10000111) dl dh ccrc
C rreg: tx:     - cmd(00100,000) addr(00010010) ccrc 
C       tx:     - eop
C       rx: sop - cmd(000) dl dh stat crc
C       rx:     - cmd(110) stat crc
C       rx:     - cmd(000) dl dh stat crc
C       rx:     - eop
#
.rxsop
.rxcds 00001000 0000000000000000 00000000
.rxcs  00011110 00000000
.rxcds 00100000 0000000000000001 00000000 
.rxeop
#
.txsop
.txca  00001000 00010010
.txcad 00011110 10000111 0000111000111000
.txca  00100000 00010010
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 11: external status bit (RP_STAT)
C Note: stat bits are not latched for stat command !
C stat <= "001"
C rreg: tx: sop - cmd(00000,000) addr(00010010) ccrc - eop
C       rx: sop - cmd(000) dl dh stat crc - eop
#
.rxsop
.rxcds 00000000          0000000000000001 00100000 
.rxeop
#
.stat 001
.txsop
.txca  00000000 00010010
.txeop
#
.iowt 10
C stat <= "010"
C stat: tx: sop - cmd(00011,100) ccrc
C rreg: tx:     - cmd(00100,000) addr(00010010) ccrc 
C       tx:     - eop
C       rx: sop - cmd(100) ccmd (000) dl dh stat crc
C       rx:     - cmd(000) dl dh stat crc
C       rx:     - eop
C Note: stat command returns old 001 status
C       rreg command returns new 010 status
.rxsop
.rxccd 00011100 00000000 0000000000000001 00100000
.rxcds 00010000          0000000000000001 01000000 
.rxeop
#
.stat 010
.txsop
.txc   00011100
.txca  00010000 00010010
.txeop
#
C stat <= "100"
C rreg: tx: sop - cmd(00110,000) addr(00010010) ccrc - eop
C       rx: sop - cmd(000) dl dh stat crc - eop
C stat <= '000'
.iowt 10
#
.rxsop
.rxcds 00110000          0000000000000001 10000000 
.rxeop
#
.stat 100
.txsop
.txca  00110000 00010010
.txeop
#
.iowt 10
.stat 000
C -----------------------------------------------------------------------------
C Test 12: attention logic
C attn <= "0000000000000100"  (async case)
C rreg: tx: sop - cmd(01001,000) addr(00010010) ccrc
C attn: tx:     - cmd(01011,101) ccrc
C attn: tx:     - cmd(01101,101) ccrc
C rreg: tx:     - cmd(01110,000) addr(00010010) ccrc
C       tx:     - eop
C Note: the rreg command returns attn=1
C       the attn has attn=0, because stat is evaluated after read+clear !!
C     stat: stat(000),attn(1),ccrc(0),dcrc(0),ioto(0),ioerr(0) -> 00010000
#
.rxsop
.rxcds 01001000          0000000000000001 00010000 
.rxcds 01011101          0000000000000100 00000000 
.rxcds 01101101          0000000000000000 00000000 
.rxcds 01110000          0000000000000001 00000000 
.rxeop
#
.wait 5
.attn 00000100
.wait 5
.txsop
.txca  01001000 00010010
.txc   01011101
.txc   01101101
.txca  01110000 00010010
.txeop
#
.iowt 10
C
C now test sync case, the transaction causes the attention
C a write to 10000010 causes AP_LAM(15 downto 8) be pinged with RP_DO data
C wreg: tx: sob - cmd(10001,010) addr(10000010) dl dh ccrc
C rreg: tx:     - cmd(10011,000) addr(00010010) ccrc
C attn: tx:     - cmd(10101,101) ccrc
C attn: tx:     - cmd(10111,101) ccrc
C rreg: tx:     - cmd(11000,000) addr(00010010) ccrc
C       tx:     - eop
.rxsop
.rxcs  10001010 00010000
.rxcds 10011000          0000000000000001 00010000 
.rxcds 10101101          0000000100000000 00000000 
.rxcds 10111101          0000000000000000 00000000 
.rxcds 11000000          0000000000000001 00000000 
.rxeop
#
.txsop
.txcad 10001010 10000010 0000000100000000
.txca  10011000 00010010
.txc   10101101
.txc   10111101
.txca  11000000 00010010
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 13: verify that extra 'idle' commas are tolerated
C          do wreg+rreg, with "100000000" between bytes
C          use as data 1000000 and 10000001 to force escaping here
C wreg: tx: sop - cmd(00001,010) addr(0000) dl dh ccrc
C rreg: tx: sop - cmd(00010,000) addr(0000) ccrc
C       tx:     - eop
C       rx: sop - cmd(010) stat crc
C       rx: sop - cmd(000) dl dh stat crc
C       rx:     - eop
#
.rxsop
.rxcs  00001010 00000000
.rxcds 00010000          1000000010000001 00000000
.rxeop
#
100000000
.txsop
100000000
.tx8   00001010 
100000000
.tx8   00000000 
100000000
.tx8   10000001
100000000
100000000
.tx8   10000000
100000000
.txcrc
100000000
.tx8   00010000 
100000000
100000000
100000000
.tx8   00000000
100000000
.txcrc
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 14: enable and test asynchronous attn notification
C init: tx: sob - cmd(00000,110) addr(00000001) dl dh ccrc - eop
C     init: anena(1), itoena(0), ito(0)   -> 11111111,1000000000000000
#
.rxsop
.rxcs  00000110 00000000
.rxeop
#
.txsop
.txcad 00000110 11111111 1000000000000000
.txeop
.iowt 10
#
C now ping an attention line, expect oob attn symbol
.wait 50
.rxoob 100000100
.attn  00000001
.iowt 10
C finally read attn flags
C attn: tx:     - cmd(00010,101) ccrc - eop
.rxsop
.rxcds 00010101          0000000000000001 00000000 
.rxeop
#
.txsop
.txc   00010101
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 15: enable and test idle timeout
C init: tx: sob - cmd(00100,110) addr(00000011) dl dh ccrc - eop
C     init: anena(1), itoena(1), ito(9)   -> 11111111,1100000000001001
C     ito=9 --> divider=10; ce_xsec div is 1:20 --> total every 200 cycles
#
.rxsop
.rxcs  00100110 00000000
.rxeop
.rxoob 100000000
.rxoob 100000000
.rxoob 100000100
.rxoob 100000100
.rxoob 100000100
#
.txsop
.txcad 00100110 11111111 1100000000001001
.txeop
#
.iowt 10
C total ito now 200 cycles; wait 500 cycles, see 2 idle symbols
.wait 500
C ping an attention line, expect oob attn symbol
.attn  00000010
.iowt 10
C wait 500 more cycles, see 2 attn symbols
.wait 500
C finally read attn flags
C attn: tx:     - cmd(00110,101) ccrc - eop
.rxsop
.rxcds 00110101          0000000000000010 00000000 
.rxeop
#
.txsop
.txc   00110101
.txeop
#
.iowt 10
C wait 500 more cycles, see 2 idle symbols again
.rxoob 100000000
.rxoob 100000000
.wait 500
C finally disable attn notification and idle timeout again
C init: tx: sob - cmd(00000,110) addr(00000000) dl dh ccrc - eop
C     init: anena(0), itoena(0), ito(0)   -> 11111111,0000000000000000
#
.rxsop
.rxcs  00000110 00000000
.rxeop
#
.txsop
.txcad 00000110 11111111 0000000000000000
.txeop
#
.iowt 10
C -----------------------------------------------------------------------------
C Test 16: attn poll
#
C send 2 attn, expect two idles back
.rxoob 100000000
.rxoob 100000000
100000100
100000100
.iowt 10
#
C ping an attention line
.attn  00000010
#
C send 2 attn, expect two attn back
.rxoob 100000100
.rxoob 100000100
100000100
100000100
.iowt 10
#