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[/] [w11/] [tags/] [w11a_V0.6/] [rtl/] [bplib/] [atlys/] [atlys_pins.ucf] - Rev 24

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## $Id: atlys_pins.ucf 414 2011-10-11 19:38:12Z mueller $
##
## Pin locks for Atlys core functionality
##  - USB UART 
##  - human I/O (switches, buttons, leds)
##
## Revision History: 
## Date         Rev Version  Comment
## 2011-10-10   413   1.0.2  new BTN sequence: clockwise(U-R-D-L) - mid - reset
## 2011-08-05   403   1.0.1  Fix IOSTANDARD typos; rename _GPIO_ to _HIO_
## 2011-08-04   402   1.0    Initial version 
##
## Notes: 
## - Bank 0+1 are 3V3; Bank 2 switchable 3V3 or 2V5; Bank 3 is 1V8 (DDR mem)
## - default is DRIVE=12 | SLEW=SLOW
## - pin names from Digilent master AtlysGeneralUCF.zip are given as comments
##
## clocks --------------------------------------------------------------------
##   AtlysGeneralUCF: clk
##
NET "I_CLK100"       LOC = "l15" | IOSTANDARD=LVCMOS25;
##
## USB UART interface --------------------------------------------------------
##   AtlysGeneralUCF: UartRx, UartTx (crossed!)
##
NET "I_USB_RXD"      LOC = "a16" | IOSTANDARD=LVCMOS33;
NET "O_USB_TXD"      LOC = "b16" | IOSTANDARD=LVCMOS33 | DRIVE=12 | SLEW=SLOW;
##
## SWIs ----------------------------------------------------------------------
##   AtlysGeneralUCF:  sw<0:7>
##
NET "I_HIO_SWI<0>"  LOC = "a10"  | IOSTANDARD=LVCMOS33;
NET "I_HIO_SWI<1>"  LOC = "d14"  | IOSTANDARD=LVCMOS33;
NET "I_HIO_SWI<2>"  LOC = "c14"  | IOSTANDARD=LVCMOS33;
NET "I_HIO_SWI<3>"  LOC = "p15"  | IOSTANDARD=LVCMOS33;
NET "I_HIO_SWI<4>"  LOC = "p12"  | IOSTANDARD=LVCMOS33;
NET "I_HIO_SWI<5>"  LOC = "r5"   | IOSTANDARD=LVCMOS33;
NET "I_HIO_SWI<6>"  LOC = "t5"   | IOSTANDARD=LVCMOS33;
NET "I_HIO_SWI<7>"  LOC = "e4"   | IOSTANDARD=LVCMOS33;
##
## BTNs ----------------------------------------------------------------------
##   AtlysGeneralUCF: btn<0:5>; clockwise(U-R-D-L) - middle - reset
##
NET "I_HIO_BTN<0>"  LOC = "n4"   | IOSTANDARD=LVCMOS18;  # BTNU
NET "I_HIO_BTN<1>"  LOC = "f6"   | IOSTANDARD=LVCMOS18;  # BTNR
NET "I_HIO_BTN<2>"  LOC = "p3"   | IOSTANDARD=LVCMOS18;  # BTND
NET "I_HIO_BTN<3>"  LOC = "p4"   | IOSTANDARD=LVCMOS18;  # BTNL
NET "I_HIO_BTN<4>"  LOC = "f5"   | IOSTANDARD=LVCMOS18;  # BTNC
NET "I_HIO_BTN<5>"  LOC = "t15"  | IOSTANDARD=LVCMOS18;  # RESET (act.low!!)
##
## LEDs ----------------------------------------------------------------------
##    AtlysGeneralUCF: Led<0:7>
##
NET "O_HIO_LED<0>"  LOC = "u18"  | IOSTANDARD=LVCMOS33;
NET "O_HIO_LED<1>"  LOC = "m14"  | IOSTANDARD=LVCMOS33;
NET "O_HIO_LED<2>"  LOC = "n14"  | IOSTANDARD=LVCMOS33;
NET "O_HIO_LED<3>"  LOC = "l14"  | IOSTANDARD=LVCMOS33;
NET "O_HIO_LED<4>"  LOC = "m13"  | IOSTANDARD=LVCMOS33;
NET "O_HIO_LED<5>"  LOC = "d4"   | IOSTANDARD=LVCMOS33;
NET "O_HIO_LED<6>"  LOC = "p16"  | IOSTANDARD=LVCMOS33;
NET "O_HIO_LED<7>"  LOC = "n12"  | IOSTANDARD=LVCMOS33;

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