Subversion Repositories wb_lpc

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "CBE0"  LOC = "F9" | IOSTANDARD = PCI33_3 ; 
NET "CBE1"  LOC = "C10" | IOSTANDARD = PCI33_3 ; 
NET "CBE2"  LOC = "D13" | IOSTANDARD = PCI33_3 ; 
NET "CBE3"  LOC = "E13" | IOSTANDARD = PCI33_3 ; 
NET "CLK"  LOC = "A11" | IOSTANDARD = PCI33_3 ; 
NET "DEVSEL"  LOC = "E12" | IOSTANDARD = PCI33_3 ; 
NET "DISP_LED<0>"  LOC = "AB20" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_LED<1>"  LOC = "AA20" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_LED<2>"  LOC = "V18" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_LED<3>"  LOC = "Y17" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_LED<4>"  LOC = "AB18" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_LED<5>"  LOC = "AA18" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_LED<6>"  LOC = "W18" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_SEL<0>"  LOC = "AA17" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_SEL<1>"  LOC = "U17" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_SEL<2>"  LOC = "U16" | IOSTANDARD = LVCMOS33 ; 
NET "DISP_SEL<3>"  LOC = "U14" | IOSTANDARD = LVCMOS33 ; 
NET "FRAME"  LOC = "C13" | IOSTANDARD = PCI33_3 ; 
NET "GNT"  LOC = "D18" | IOSTANDARD = PCI33_3 ; 
NET "IDSEL"  LOC = "D14" | IOSTANDARD = PCI33_3 ; 
NET "INTA"  LOC = "B19" | IOSTANDARD = PCI33_3 ; 
NET "IRDY"  LOC = "A13" | IOSTANDARD = PCI33_3 ; 
NET "LAD<0>"  LOC = "V5" | IOSTANDARD = LVCMOS33 | PULLUP ;
NET "LAD<1>"  LOC = "U5" | IOSTANDARD = LVCMOS33 | PULLUP ;
NET "LAD<2>"  LOC = "V2" | IOSTANDARD = LVCMOS33 | PULLUP ;
NET "LAD<3>"  LOC = "V1" | IOSTANDARD = LVCMOS33 | PULLUP ;
NET "LAD_OE"  LOC = "T5" | IOSTANDARD = LVCMOS33 | SLEW = FAST  | DRIVE = 12 ; 
NET "LFRAME"  LOC = "W2" | IOSTANDARD = LVCMOS33 ;
NET "LPC_CLK"  LOC = "W1" | IOSTANDARD = LVCMOS33 | SLEW = FAST  | DRIVE = 24 ; 
NET "LPC_RST"  LOC = "U4" | IOSTANDARD = LVCMOS33 ; 
NET "LPC_INT"  LOC = "T4" | IOSTANDARD = LVCMOS33 | PULLUP ;
NET "LPC_GND<0>" LOC = "W4" | IOSTANDARD = LVCMOS33 ;    # These are tied to GND to provide some
NET "LPC_GND<1>" LOC = "W3" | IOSTANDARD = LVCMOS33 ;   # "shielding" on the cable.
NET "LPC_GND<2>" LOC = "V3" | IOSTANDARD = LVCMOS33 ;
NET "LPC_GND<3>" LOC = "V4" | IOSTANDARD = LVCMOS33 ;
NET "LPC_GND<4>" LOC = "N4" | IOSTANDARD = LVCMOS33 ;
NET "LPC_GND<5>" LOC = "N3" | IOSTANDARD = LVCMOS33 ;
NET "LPC_GND<6>" LOC = "N2" | IOSTANDARD = LVCMOS33 ;


NET "PAR"  LOC = "A9" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<0>"  LOC = "A5" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<10>"  LOC = "E9" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<11>"  LOC = "F11" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<12>"  LOC = "E10" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<13>"  LOC = "A8" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<14>"  LOC = "B9" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<15>"  LOC = "B10" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<16>"  LOC = "F17" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<17>"  LOC = "F16" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<18>"  LOC = "A14" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<19>"  LOC = "B14" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<1>"  LOC = "B5" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<20>"  LOC = "B15" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<21>"  LOC = "A15" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<22>"  LOC = "F12" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<23>"  LOC = "F13" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<24>"  LOC = "D15" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<25>"  LOC = "E15" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<26>"  LOC = "D17" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<27>"  LOC = "C17" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<28>"  LOC = "B17" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<29>"  LOC = "E17" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<2>"  LOC = "E6" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<30>"  LOC = "A18" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<31>"  LOC = "B18" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<3>"  LOC = "D6" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<4>"  LOC = "C6" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<5>"  LOC = "B6" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<6>"  LOC = "D7" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<7>"  LOC = "E7" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<8>"  LOC = "B8" | IOSTANDARD = PCI33_3 ; 
NET "PCI_AD<9>"  LOC = "F10" | IOSTANDARD = PCI33_3 ; 
NET "PERR"  LOC = "D12" | IOSTANDARD = PCI33_3 ; 
NET "PREVENT_STRIPPING_OF_UNUSED_INPUTS"  LOC = "AA4" | IOSTANDARD = LVCMOS33 ; 
NET "REQ"  LOC = "C18" | IOSTANDARD = PCI33_3 ; 
NET "RST"  LOC = "A19" | IOSTANDARD = PCI33_3 ; 
NET "SERR"  LOC = "B12" | IOSTANDARD = PCI33_3 | PULLUP; 
NET "STOP"  LOC = "A12" | IOSTANDARD = PCI33_3 ; 
NET "TRDY"  LOC = "B13" | IOSTANDARD = PCI33_3 ; 

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE