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[/] [wdsp/] [trunk/] [rtl/] [verilog/] [minsoc/] [pll/] [pll0.qip] - Rev 7
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set_global_assignment -name IP_TOOL_NAME "ALTPLL"set_global_assignment -name IP_TOOL_VERSION "8.0"set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "pll0.vhd"]set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll0.ppf"]