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[/] [wdsp/] [trunk/] [rtl/] [verilog/] [minsoc/] [wb_conmax/] [trunk/] [syn/] [bin/] [lib_spec.dc] - Rev 7
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###############################################################################
#
# Library Specification
#
# Author: Rudolf Usselmann
# rudi@asics.ws
#
# Revision:
# 3/7/01 RU Initial Sript
#
#
###############################################################################
# ==============================================
# Setup Libraries
set search_path [list $search_path . \
/tools/dc_libraries/virtual_silicon/UMCL18U250D2_2.2/design_compiler/ \
$hdl_src_dir]
set snps [getenv "SYNOPSYS"]
set synthetic_library ""
append synthetic_library $snps "/libraries/syn/dw01.sldb "
append synthetic_library $snps "/libraries/syn/dw02.sldb "
append synthetic_library $snps "/libraries/syn/dw03.sldb "
append synthetic_library $snps "/libraries/syn/dw04.sldb "
append synthetic_library $snps "/libraries/syn/dw05.sldb "
append synthetic_library $snps "/libraries/syn/dw06.sldb "
append synthetic_library $snps "/libraries/syn/dw07.sldb "
set target_library { umcl18u250t2_typ.db }
set link_library ""
append link_library $target_library " " $synthetic_library
set symbol_library { umcl18u250t2.sdb }