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[/] [wiegand_ctl/] [trunk/] [syn/] [xilinx/] [wiegand_tx/] [ise/] [wiegand_tx_top/] [_xmsgs/] [pn_parser.xmsgs] - Rev 17
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<?xml version="1.0" encoding="UTF-8"?><!-- IMPORTANT: This is an internal file that has been generated --><!-- by the Xilinx ISE software. Any direct editing or --><!-- changes made to this file may result in unpredictable --><!-- behavior or data corruption. It is strongly advised that --><!-- users do not edit the contents of this file. --><!-- --><!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. --><messages><msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/fifos.v" into library work</arg></msg><msg type="info" file="ProjectMgmt" num="1065" >"<arg fmt="%s" index="1">C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/fifos.v</arg>" Line <arg fmt="%d" index="2">52</arg>. <arg fmt="%s" index="3">Include file found: 'C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_defines.v' in file "C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/fifos.v" line 52</arg></msg><msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wb_interface.v" into library work</arg></msg><msg type="info" file="ProjectMgmt" num="1065" >"<arg fmt="%s" index="1">C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wb_interface.v</arg>" Line <arg fmt="%d" index="2">55</arg>. <arg fmt="%s" index="3">Include file found: 'C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_defines.v' in file "C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wb_interface.v" line 55</arg></msg><msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_tx_top.v" into library work</arg></msg><msg type="info" file="ProjectMgmt" num="1065" >"<arg fmt="%s" index="1">C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_tx_top.v</arg>" Line <arg fmt="%d" index="2">54</arg>. <arg fmt="%s" index="3">Include file found: 'C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_defines.v' in file "C:/Users/jeffA/Desktop/rtl/wiegand/trunk/rtl/verilog/wiegand_tx_top.v" line 54</arg></msg></messages>