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[/] [wiegand_ctl/] [trunk/] [syn/] [xilinx/] [wiegand_tx/] [vivado/] [wiegand_tx_top/] [wiegand_tx_top.srcs/] [constrs_1/] [new/] [wiegand_tx_top.xdc] - Rev 17
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#only true IO are zero_o and one_o pins; rest stay on-chip through WB busset_property IOSTANDARD LVCMOS18 [get_ports {one_o zero_o}]#set_property PACKAGE_PIN <pin name here> [get_ports one_o]#set_property PACKAGE_PIN <pin name here> [get_ports zero_o]#timing constraints#only one clock, and it's the WB clock.