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[/] [xenie/] [trunk/] [examples/] [Eth_example/] [src/] [ip/] [rxaui_0/] [synth/] [rxaui_0.vhd] - Rev 13

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-------------------------------------------------------------------------------
-- Title      : Block level wrapper
-- Project    : RXAUI
-------------------------------------------------------------------------------
-- File       : rxaui_0.vhd
-------------------------------------------------------------------------------
-- Description: This file is a wrapper for the RXAUI core. It contains the
-- RXAUI core, the transceivers and some transceiver logic.
-------------------------------------------------------------------------------
-- (c) Copyright 2009 - 2013 Xilinx, Inc. All rights reserved. 
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
-------------------------------------------------------------------------------
 
library ieee;
use ieee.std_logic_1164.all;
 
entity rxaui_0 is
    port (
      reset                          : in  std_logic;
      dclk                           : in  std_logic;
      clk156_out                     : out std_logic;
      clk156_lock                    : out std_logic;
      refclk_p                       : in  std_logic;
      refclk_n                       : in  std_logic;
      qplloutclk_out                 : out  std_logic;
      qplllock_out                   : out  std_logic;
      qplloutrefclk_out              : out  std_logic;
      refclk_out                     : out  std_logic;
      xgmii_txd                      : in  std_logic_vector(63 downto 0);
      xgmii_txc                      : in  std_logic_vector(7 downto 0);
      xgmii_rxd                      : out std_logic_vector(63 downto 0);
      xgmii_rxc                      : out std_logic_vector(7 downto 0);
      rxaui_tx_l0_p                  : out std_logic;
      rxaui_tx_l0_n                  : out std_logic;
      rxaui_tx_l1_p                  : out std_logic;
      rxaui_tx_l1_n                  : out std_logic;
      rxaui_rx_l0_p                  : in  std_logic;
      rxaui_rx_l0_n                  : in  std_logic;
      rxaui_rx_l1_p                  : in  std_logic;
      rxaui_rx_l1_n                  : in  std_logic;
      signal_detect                  : in  std_logic_vector(1 downto 0);
      debug                          : out std_logic_vector(5 downto 0);
      mdc                            : in  std_logic;
      mdio_in                        : in  std_logic;
      mdio_out                       : out std_logic;
      mdio_tri                       : out std_logic;
      prtad                          : in  std_logic_vector(4 downto 0);
      type_sel                       : in  std_logic_vector(1 downto 0)
);
end rxaui_0;
 
library rxaui_v4_3_7;
use rxaui_v4_3_7.all;
 
architecture wrapper of rxaui_0 is
  component rxaui_0_support is
    port (
      reset                          : in  std_logic;
      dclk                           : in  std_logic;
      clk156_out                     : out std_logic;
      clk156_lock                    : out std_logic;
      refclk_p                       : in  std_logic;
      refclk_n                       : in  std_logic;
      qplloutclk_out                 : out std_logic;
      qplllock_out                   : out std_logic;
      qplloutrefclk_out              : out std_logic;
      refclk_out                     : out std_logic;
      xgmii_txd                      : in  std_logic_vector(63 downto 0);
      xgmii_txc                      : in  std_logic_vector(7 downto 0);
      xgmii_rxd                      : out std_logic_vector(63 downto 0);
      xgmii_rxc                      : out std_logic_vector(7 downto 0);
      rxaui_tx_l0_p                  : out std_logic;
      rxaui_tx_l0_n                  : out std_logic;
      rxaui_tx_l1_p                  : out std_logic;
      rxaui_tx_l1_n                  : out std_logic;
      rxaui_rx_l0_p                  : in  std_logic;
      rxaui_rx_l0_n                  : in  std_logic;
      rxaui_rx_l1_p                  : in  std_logic;
      rxaui_rx_l1_n                  : in  std_logic;
      signal_detect                  : in  std_logic_vector(1 downto 0);
      debug                          : out std_logic_vector(5 downto 0);
   -- GT Control Ports
   -- DRP
      gt0_drpaddr                    : in  std_logic_vector(8 downto 0);
      gt0_drpen                      : in  std_logic;
      gt0_drpdi                      : in  std_logic_vector(15 downto 0);
      gt0_drpdo                      : out std_logic_vector(15 downto 0);
      gt0_drprdy                     : out std_logic;
      gt0_drpwe                      : in  std_logic;
   -- TX Reset and Initialisation
      gt0_txpmareset_in              : in std_logic;
      gt0_txpcsreset_in              : in std_logic;
      gt0_txresetdone_out            : out std_logic;
   -- RX Reset and Initialisation
      gt0_rxpmareset_in              : in std_logic;
      gt0_rxpcsreset_in              : in std_logic;
      gt0_rxresetdone_out            : out std_logic;
   -- Clocking
      gt0_rxbufstatus_out            : out std_logic_vector(2 downto 0);
      gt0_txphaligndone_out          : out std_logic;
      gt0_txphinitdone_out           : out std_logic;
      gt0_txdlysresetdone_out        : out std_logic;
      gt_qplllock_out                      : out std_logic;
   -- Signal Integrity adn Functionality
   -- Eye Scan
      gt0_eyescantrigger_in          : in  std_logic;
      gt0_eyescanreset_in            : in  std_logic;
      gt0_eyescandataerror_out       : out std_logic;
      gt0_rxrate_in                  : in  std_logic_vector(2 downto 0);
   -- Loopback
      gt0_loopback_in                : in  std_logic_vector(2 downto 0);
   -- Polarity
      gt0_rxpolarity_in              : in  std_logic;
      gt0_txpolarity_in              : in  std_logic;
   -- RX Decision Feedback Equalizer(DFE)
      gt0_rxlpmen_in                 : in  std_logic;
      gt0_rxdfelpmreset_in           : in  std_logic;
      gt0_rxmonitorsel_in            : in  std_logic_vector(1 downto 0);
      gt0_rxmonitorout_out           : out std_logic_vector(6 downto 0);
   -- TX Driver
      gt0_txpostcursor_in            : in  std_logic_vector(4 downto 0);
      gt0_txprecursor_in             : in  std_logic_vector(4 downto 0);
      gt0_txdiffctrl_in              : in  std_logic_vector(3 downto 0);
      gt0_txinhibit_in               : in  std_logic;
   -- PRBS
      gt0_rxprbscntreset_in          : in  std_logic;
      gt0_rxprbserr_out              : out std_logic;
      gt0_rxprbssel_in               : in  std_logic_vector(2 downto 0);
      gt0_txprbssel_in               : in  std_logic_vector(2 downto 0);
      gt0_txprbsforceerr_in          : in  std_logic;
 
      gt0_rxcdrhold_in               : in  std_logic;
      gt0_dmonitorout_out            : out std_logic_vector(7 downto 0);
 
   -- Status
      gt0_rxdisperr_out              : out std_logic_vector(3 downto 0);
      gt0_rxnotintable_out           : out std_logic_vector(3 downto 0);
      gt0_rxcommadet_out             : out std_logic;
   -- DRP
      gt1_drpaddr                    : in  std_logic_vector(8 downto 0);
      gt1_drpen                      : in  std_logic;
      gt1_drpdi                      : in  std_logic_vector(15 downto 0);
      gt1_drpdo                      : out std_logic_vector(15 downto 0);
      gt1_drprdy                     : out std_logic;
      gt1_drpwe                      : in  std_logic;
   -- TX Reset and Initialisation
      gt1_txpmareset_in              : in std_logic;
      gt1_txpcsreset_in              : in std_logic;
      gt1_txresetdone_out            : out std_logic;
   -- RX Reset and Initialisation
      gt1_rxpmareset_in              : in std_logic;
      gt1_rxpcsreset_in              : in std_logic;
      gt1_rxresetdone_out            : out std_logic;
   -- Clocking
      gt1_rxbufstatus_out            : out std_logic_vector(2 downto 0);
      gt1_txphaligndone_out          : out std_logic;
      gt1_txphinitdone_out           : out std_logic;
      gt1_txdlysresetdone_out        : out std_logic;
   -- Signal Integrity adn Functionality
   -- Eye Scan
      gt1_eyescantrigger_in          : in  std_logic;
      gt1_eyescanreset_in            : in  std_logic;
      gt1_eyescandataerror_out       : out std_logic;
      gt1_rxrate_in                  : in  std_logic_vector(2 downto 0);
   -- Loopback
      gt1_loopback_in                : in  std_logic_vector(2 downto 0);
   -- Polarity
      gt1_rxpolarity_in              : in  std_logic;
      gt1_txpolarity_in              : in  std_logic;
   -- RX Decision Feedback Equalizer(DFE)
      gt1_rxlpmen_in                 : in  std_logic;
      gt1_rxdfelpmreset_in           : in  std_logic;
      gt1_rxmonitorsel_in            : in  std_logic_vector(1 downto 0);
      gt1_rxmonitorout_out           : out std_logic_vector(6 downto 0);
   -- TX Driver
      gt1_txpostcursor_in            : in  std_logic_vector(4 downto 0);
      gt1_txprecursor_in             : in  std_logic_vector(4 downto 0);
      gt1_txdiffctrl_in              : in  std_logic_vector(3 downto 0);
      gt1_txinhibit_in               : in  std_logic;
   -- PRBS
      gt1_rxprbscntreset_in          : in  std_logic;
      gt1_rxprbserr_out              : out std_logic;
      gt1_rxprbssel_in               : in  std_logic_vector(2 downto 0);
      gt1_txprbssel_in               : in  std_logic_vector(2 downto 0);
      gt1_txprbsforceerr_in          : in  std_logic;
 
      gt1_rxcdrhold_in               : in  std_logic;
      gt1_dmonitorout_out            : out std_logic_vector(7 downto 0);
 
   -- Status
      gt1_rxdisperr_out              : out std_logic_vector(3 downto 0);
      gt1_rxnotintable_out           : out std_logic_vector(3 downto 0);
      gt1_rxcommadet_out             : out std_logic;
      mdc                            : in  std_logic;
      mdio_in                        : in  std_logic;
      mdio_out                       : out std_logic;
      mdio_tri                       : out std_logic;
      prtad                          : in  std_logic_vector(4 downto 0);
      type_sel                       : in  std_logic_vector(1 downto 0)
);
  end component;
 
  ATTRIBUTE CORE_GENERATION_INFO : STRING;
  ATTRIBUTE CORE_GENERATION_INFO OF wrapper : ARCHITECTURE IS "rxaui_0,rxaui_v4_3_7,{x_ipProduct=Vivado 2016.4,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=rxaui,x_ipVersion=4.3,x_ipCoreRevision=7,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED,c_family=kintex7,c_component_name=rxaui_0,c_rxaui_mode=0,c_txdata_width=64,c_rxdata_width=64,c_has_mdio=true,c_gtwizardSubCoreName=rxaui_0_gt,c_gt_dmonitorout_width=8,c_gt_txdiffctrl_width=8,c_gt_daddr_width=9,c_refclkrate=156.25,c_drpclk_freq=100.0,c_gt_loc=X0Y0 X0Y1}";
  ATTRIBUTE X_CORE_INFO : STRING;
  ATTRIBUTE X_CORE_INFO OF wrapper: ARCHITECTURE IS "rxaui_v4_3_7,Vivado 2016.4";
 
begin
 
  U0 : rxaui_0_support
    port map (
       reset                          => reset,
       dclk                           => dclk,
       clk156_out                     => clk156_out,
       clk156_lock                    => clk156_lock,
       refclk_p                       => refclk_p,
       refclk_n                       => refclk_n,
       qplloutclk_out                 => qplloutclk_out,
       qplllock_out                   => qplllock_out,
       qplloutrefclk_out              => qplloutrefclk_out,
       refclk_out                     => refclk_out,
       xgmii_txd                      => xgmii_txd,
       xgmii_txc                      => xgmii_txc,
       xgmii_rxd                      => xgmii_rxd,
       xgmii_rxc                      => xgmii_rxc,
       rxaui_tx_l0_p                  => rxaui_tx_l0_p,
       rxaui_tx_l0_n                  => rxaui_tx_l0_n,
       rxaui_tx_l1_p                  => rxaui_tx_l1_p,
       rxaui_tx_l1_n                  => rxaui_tx_l1_n,
       rxaui_rx_l0_p                  => rxaui_rx_l0_p,
       rxaui_rx_l0_n                  => rxaui_rx_l0_n,
       rxaui_rx_l1_p                  => rxaui_rx_l1_p,
       rxaui_rx_l1_n                  => rxaui_rx_l1_n,
       signal_detect                  => signal_detect,
       debug                          => debug,
   -- DRP
       gt0_drpaddr                    => (others => '0'),
       gt0_drpen                      => '0',
       gt0_drpdi                      => (others => '0'),
       gt0_drpdo                      => open,
       gt0_drprdy                     => open,
       gt0_drpwe                      => '0',
   -- TX Reset and Initialisation
       gt0_txpmareset_in              => '0',
       gt0_txpcsreset_in              => '0',
       gt0_txresetdone_out            => open,
   -- RX Reset and Initialisation
       gt0_rxpmareset_in              => '0',
       gt0_rxpcsreset_in              => '0',
       gt0_rxresetdone_out            => open,
   -- Clocking
       gt0_rxbufstatus_out            => open,
       gt0_txphaligndone_out          => open,
       gt0_txphinitdone_out           => open,
       gt0_txdlysresetdone_out        => open,
       gt_qplllock_out                => open,
   -- Signal Integrity adn Functionality
   -- Eye Scan
       gt0_eyescantrigger_in          => '0',
       gt0_eyescanreset_in            => '0',
       gt0_eyescandataerror_out       => open,
       gt0_rxrate_in                  => "000",
   -- Loopback
       gt0_loopback_in                => "000",
   -- Polarity
       gt0_rxpolarity_in              => '0',
       gt0_txpolarity_in              => '0',
   -- RX Decision Feedback Equalizer(DFE)
       gt0_rxlpmen_in                 => '1',
       gt0_rxdfelpmreset_in           => '0',
       gt0_rxmonitorsel_in            => "00",
       gt0_rxmonitorout_out           => open,
   -- TX Driver
       gt0_txdiffctrl_in              => "1010",
       gt0_txpostcursor_in            => "00000",
       gt0_txprecursor_in             => "00000",
       gt0_txinhibit_in               => '0',
   -- PRBS - GT
       gt0_rxprbscntreset_in          => '0',
       gt0_rxprbserr_out              => open,
       gt0_rxprbssel_in               => "000",
       gt0_txprbssel_in               => "000",
       gt0_txprbsforceerr_in          => '0',
 
       gt0_rxcdrhold_in               => '0',
       gt0_dmonitorout_out            => open,
 
   -- Status
       gt0_rxdisperr_out              => open,
       gt0_rxnotintable_out           => open,
       gt0_rxcommadet_out             => open,
   -- DRP
       gt1_drpaddr                    => (others => '0'),
       gt1_drpen                      => '0',
       gt1_drpdi                      => (others => '0'),
       gt1_drpdo                      => open,
       gt1_drprdy                     => open,
       gt1_drpwe                      => '0',
   -- TX Reset and Initialisation
       gt1_txpmareset_in              => '0',
       gt1_txpcsreset_in              => '0',
       gt1_txresetdone_out            => open,
   -- RX Reset and Initialisation
       gt1_rxpmareset_in              => '0',
       gt1_rxpcsreset_in              => '0',
       gt1_rxresetdone_out            => open,
   -- Clocking
       gt1_rxbufstatus_out            => open,
       gt1_txphaligndone_out          => open,
       gt1_txphinitdone_out           => open,
       gt1_txdlysresetdone_out        => open,
   -- Signal Integrity adn Functionality
   -- Eye Scan
       gt1_eyescantrigger_in          => '0',
       gt1_eyescanreset_in            => '0',
       gt1_eyescandataerror_out       => open,
       gt1_rxrate_in                  => "000",
   -- Loopback
       gt1_loopback_in                => "000",
   -- Polarity
       gt1_rxpolarity_in              => '0',
       gt1_txpolarity_in              => '0',
   -- RX Decision Feedback Equalizer(DFE)
       gt1_rxlpmen_in                 => '1',
       gt1_rxdfelpmreset_in           => '0',
       gt1_rxmonitorsel_in            => "00",
       gt1_rxmonitorout_out           => open,
   -- TX Driver
       gt1_txdiffctrl_in              => "1010",
       gt1_txpostcursor_in            => "00000",
       gt1_txprecursor_in             => "00000",
       gt1_txinhibit_in               => '0',
   -- PRBS - GT
       gt1_rxprbscntreset_in          => '0',
       gt1_rxprbserr_out              => open,
       gt1_rxprbssel_in               => "000",
       gt1_txprbssel_in               => "000",
       gt1_txprbsforceerr_in          => '0',
 
       gt1_rxcdrhold_in               => '0',
       gt1_dmonitorout_out            => open,
 
   -- Status
       gt1_rxdisperr_out              => open,
       gt1_rxnotintable_out           => open,
       gt1_rxcommadet_out             => open,
       mdc                            => mdc,
       mdio_in                        => mdio_in,
       mdio_out                       => mdio_out,
       mdio_tri                       => mdio_tri,
       prtad                          => prtad,
       type_sel                       => type_sel
);
 
end wrapper;
 

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