OpenCores
URL https://opencores.org/ocsvn/xmatchpro/xmatchpro/trunk

Subversion Repositories xmatchpro

[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [xmatch_sim7/] [isim/] [testbench_isim_beh.exe.sim/] [work/] [a_0751702762_0200070833.c] - Rev 9

Compare with Previous | Blame | View Log

/**********************************************************************/
/*   ____  ____                                                       */
/*  /   /\/   /                                                       */
/* /___/  \  /                                                        */
/* \   \   \/                                                       */
/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
/*  /   /          All Right Reserved.                                 */
/* /---/   /\                                                         */
/* \   \  /  \                                                      */
/*  \___\/\___\                                                    */
/***********************************************************************/
 
/* This file is designed for use with ISim build 0x7708f090 */
 
#define XSI_HIDE_SYMBOL_SPEC true
#include "xsi.h"
#include <memory.h>
#ifdef __GNUC__
#include <stdlib.h>
#else
#include <malloc.h>
#define alloca _alloca
#endif
static const char *ng0 = "C:/Users/eejlny/projects/xmatch_sim7/xmatch_sim7/src/level2_4ca.vhd";
 
 
 
static void work_a_0751702762_0200070833_p_0(char *t0)
{
    char *t1;
    char *t2;
    char *t3;
    char *t4;
    char *t5;
    char *t6;
    char *t7;
 
LAB0:    xsi_set_current_line(277, ng0);
 
LAB3:    t1 = (t0 + 1672U);
    t2 = *((char **)t1);
    t1 = (t0 + 10056);
    t3 = (t1 + 56U);
    t4 = *((char **)t3);
    t5 = (t4 + 56U);
    t6 = *((char **)t5);
    memcpy(t6, t2, 32U);
    xsi_driver_first_trans_fast(t1);
 
LAB2:    t7 = (t0 + 9960);
    *((int *)t7) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
static void work_a_0751702762_0200070833_p_1(char *t0)
{
    char *t1;
    char *t2;
    unsigned int t3;
    unsigned int t4;
    unsigned int t5;
    char *t6;
    char *t7;
    char *t8;
    char *t9;
    char *t10;
    char *t11;
 
LAB0:    xsi_set_current_line(278, ng0);
 
LAB3:    t1 = (t0 + 7112U);
    t2 = *((char **)t1);
    t3 = (97 - 97);
    t4 = (t3 * 1U);
    t5 = (0 + t4);
    t1 = (t2 + t5);
    t6 = (t0 + 10120);
    t7 = (t6 + 56U);
    t8 = *((char **)t7);
    t9 = (t8 + 56U);
    t10 = *((char **)t9);
    memcpy(t10, t1, 64U);
    xsi_driver_first_trans_delta(t6, 0U, 64U, 0LL);
 
LAB2:    t11 = (t0 + 9976);
    *((int *)t11) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
 
extern void work_a_0751702762_0200070833_init()
{
	static char *pe[] = {(void *)work_a_0751702762_0200070833_p_0,(void *)work_a_0751702762_0200070833_p_1};
	xsi_register_didat("work_a_0751702762_0200070833", "isim/testbench_isim_beh.exe.sim/work/a_0751702762_0200070833.didat");
	xsi_register_executes(pe);
}
 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.