URL
https://opencores.org/ocsvn/xucpu/xucpu/trunk
Subversion Repositories xucpu
[/] [xucpu/] [trunk/] [target/] [Xilinx/] [1k/] [startup_sim_pr.wcfg] - Rev 41
Compare with Previous | Blame | View Log
<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
<wave_state>
</wave_state>
<db_ref_list>
<db_ref path="/home/jurgen/Projects/lisp/FPGA/startup_sim_isim_par.wdb" id="1" type="auto">
<top_modules>
<top_module name="startup_sim" />
<top_module name="std_logic_1164" />
<top_module name="std_logic_arith" />
<top_module name="std_logic_signed" />
<top_module name="std_logic_textio" />
<top_module name="std_logic_unsigned" />
<top_module name="textio" />
<top_module name="vcomponents" />
<top_module name="vital_primitives" />
<top_module name="vital_timing" />
<top_module name="vpackage" />
</top_modules>
</db_ref>
</db_ref_list>
<WVObjectSize size="28" />
<wave_markers>
<marker time="534414000" label="" />
<marker time="554414000" label="" />
<marker time="494414000" label="" />
<marker time="499866000" label="" />
</wave_markers>
<wvobject fp_name="/startup_sim/clock" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clock</obj_property>
<obj_property name="ObjectShortName">clock</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/reset" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CLOCK1/clk_out" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk_out</obj_property>
<obj_property name="ObjectShortName">clk_out</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/RST1/rst" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rst</obj_property>
<obj_property name="ObjectShortName">rst</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/PC_MUX/y" type="array" db_ref_id="1">
<obj_property name="ElementShortName">y[14:0]</obj_property>
<obj_property name="ObjectShortName">y[14:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CTRL1/ld_pc" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ld_pc</obj_property>
<obj_property name="ObjectShortName">ld_pc</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CTRL1/ld_ir" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ld_ir</obj_property>
<obj_property name="ObjectShortName">ld_ir</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CTRL1/ld_dp" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ld_dp</obj_property>
<obj_property name="ObjectShortName">ld_dp</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/PC/q" type="array" db_ref_id="1">
<obj_property name="ElementShortName">q[14:0]</obj_property>
<obj_property name="ObjectShortName">q[14:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/MEM1/a2" type="array" db_ref_id="1">
<obj_property name="ElementShortName">a2[9:0]</obj_property>
<obj_property name="ObjectShortName">a2[9:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/MEM1/q2" type="array" db_ref_id="1">
<obj_property name="ElementShortName">q2[15:0]</obj_property>
<obj_property name="ObjectShortName">q2[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/IR/q" type="array" db_ref_id="1">
<obj_property name="ElementShortName">q[15:0]</obj_property>
<obj_property name="ObjectShortName">q[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/DR/q" type="array" db_ref_id="1">
<obj_property name="ElementShortName">q[15:0]</obj_property>
<obj_property name="ObjectShortName">q[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CTRL1/operation" type="array" db_ref_id="1">
<obj_property name="ElementShortName">operation[3:0]</obj_property>
<obj_property name="ObjectShortName">operation[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CTRL1/reg_addr_a" type="array" db_ref_id="1">
<obj_property name="ElementShortName">reg_addr_a[3:0]</obj_property>
<obj_property name="ObjectShortName">reg_addr_a[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CTRL1/reg_addr_b" type="array" db_ref_id="1">
<obj_property name="ElementShortName">reg_addr_b[3:0]</obj_property>
<obj_property name="ObjectShortName">reg_addr_b[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CTRL1/reg_wr" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">reg_wr</obj_property>
<obj_property name="ObjectShortName">reg_wr</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/CTRL1/reg_src" type="array" db_ref_id="1">
<obj_property name="ElementShortName">reg_src[2:0]</obj_property>
<obj_property name="ObjectShortName">reg_src[2:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/RF1/d" type="array" db_ref_id="1">
<obj_property name="ElementShortName">d[15:0]</obj_property>
<obj_property name="ObjectShortName">d[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/RF1/q1" type="array" db_ref_id="1">
<obj_property name="ElementShortName">q1[15:0]</obj_property>
<obj_property name="ObjectShortName">q1[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/RF1/q2" type="array" db_ref_id="1">
<obj_property name="DisplayName">label</obj_property>
<obj_property name="ElementShortName">q2[15:0]</obj_property>
<obj_property name="ObjectShortName">q2[15:0]</obj_property>
<obj_property name="label">q2[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/zero" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">zero</obj_property>
<obj_property name="ObjectShortName">zero</obj_property>
</wvobject>
<wvobject fp_name="divider28" type="divider">
<obj_property name="label">Memory</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="BkColor">128 128 255</obj_property>
<obj_property name="TextColor">230 230 230</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/mem_wr" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">mem_wr</obj_property>
<obj_property name="ObjectShortName">mem_wr</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/data_address" type="array" db_ref_id="1">
<obj_property name="ElementShortName">data_address[14:0]</obj_property>
<obj_property name="ObjectShortName">data_address[14:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/databus_write" type="array" db_ref_id="1">
<obj_property name="ElementShortName">databus_write[15:0]</obj_property>
<obj_property name="ObjectShortName">databus_write[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/led_out" type="array" db_ref_id="1">
<obj_property name="ElementShortName">led_out[7:0]</obj_property>
<obj_property name="ObjectShortName">led_out[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/startup_sim/uut/DEC1/gpio_1" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">gpio_1</obj_property>
<obj_property name="ObjectShortName">gpio_1</obj_property>
</wvobject>
</wave_config>