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https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk
Subversion Repositories xulalx25soc
[/] [xulalx25soc/] [trunk/] [Makefile] - Rev 51
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################################################################################
##
## Filename:
##
## Project: XuLA2 board
##
## Purpose:
##
##
## Creator: Dan Gisselquist, Ph.D.
## Gisselquist Technology, LLC
##
################################################################################
##
## Copyright (C) 2015, Gisselquist Technology, LLC
##
## This program is free software (firmware): you can redistribute it and/or
## modify it under the terms of the GNU General Public License as published
## by the Free Software Foundation, either version 3 of the License, or (at
## your option) any later version.
##
## This program is distributed in the hope that it will be useful, but WITHOUT
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## License: GPL, v3, as defined and found on www.gnu.org,
## http:##www.gnu.org/licenses/gpl.html
##
##
################################################################################
##
##
.PHONY: all
all: datestamp verilated bit sw
# Could also depend upon load, if desired, but not necessary
BENCH := `find bench -name Makefile` `find bench -name "*.cpp"` `find bench -name "*.h"`
RTL := `find rtl -name "*.v"` `find rtl -name Makefile`
NOTES := `find . -name "*.txt"` `find . -name "*.html"`
SW := `find sw -name "*.cpp"` `find sw -name "*.h"` \
`find sw -name "*.sh"` `find sw -name "*.py"` \
`find sw -name "*.pl"` `find sw -name Makefile`
PROJ := xilinx/xula.prj xilinx/xula.xise xilinx/xula.xst \
xilinx/xula.ut xilinx/Makefile
BIN := `find xilinx -name "*.bit"`
CONSTRAINTS := xula.ucf
YYMMDD:=`date +%Y%m%d`
.PHONY: datestamp
datestamp:
bash -c 'if [ ! -e $(YYMMDD)-build.v ]; then perl xilinx/mkdatev.pl > $(YYMMDD)-build.v; rm -f rtl/builddate.v; fi'
bash -c 'if [ ! -e rtl/builddate.v ]; then cd rtl; ln -fs ../$(YYMMDD)-build.v builddate.v; fi'
.PHONY: archive
archive:
tar --transform s,^,$(YYMMDD)-xula/, -chjf $(YYMMDD)-xula.tjz $(BENCH) $(SW) $(RTL) $(NOTES) $(PROJ) $(BIN) $(CONSTRAINTS)
.PHONY: verilated
verilated:
cd rtl ; $(MAKE) --no-print-directory
.PHONY: sw
sw:
cd sw ; $(MAKE) --no-print-directory
.PHONY: bit
bit:
cd xilinx ; $(MAKE) --no-print-directory xula.bit
.PHONY: load
load: bit
xsload -b xula2-lx25 --fpga xilinx/xula.bit
.PHONY: xload
xload:
xsload -b xula2-lx25 --fpga xilinx/toplevel.bit
.PHONY: timing
timing:
cd xilinx ; $(MAKE) --no-print-directory timing
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