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https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk
Subversion Repositories xulalx25soc
[/] [xulalx25soc/] [trunk/] [rtl/] [Makefile] - Rev 114
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##########################################################################/
##
## Filename: Makefile
##
## Project: XuLA2 board
##
## Purpose: To direct the Verilator build of the SoC sources.
##
##
## Creator: Dan Gisselquist, Ph.D.
## Gisselquist Technology, LLC
##
##########################################################################/
##
## Copyright (C) 2015, Gisselquist Technology, LLC
##
## This program is free software (firmware): you can redistribute it and/or
## modify it under the terms of the GNU General Public License as published
## by the Free Software Foundation, either version 3 of the License, or (at
## your option) any later version.
##
## This program is distributed in the hope that it will be useful, but WITHOUT
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## License: GPL, v3, as defined and found on www.gnu.org,
## http:##www.gnu.org/licenses/gpl.html
##
##
##########################################################################/
##
##
all: test
YYMMDD=`date +%Y%m%d`
CXX := g++
FBDIR := .
VDIRFB:= $(FBDIR)/obj_dir
.PHONY: test
test: $(VDIRFB)/Vbusmaster__ALL.a
CPUDR := cpu
CPUSOURCESnD := zipcpu.v cpuops.v pipefetch.v \
pfcache.v idecode.v \
pipemem.v prefetch.v wbpriarbiter.v \
zipsystem.v zipcounter.v zipjiffies.v ziptimer.v zipbones.v \
wbdmac.v icontrol.v wbwatchdog.v
CPUSOURCES := $(addprefix $(CPUDR)/,$(CPUSOURCESnD))
JTAGBUS := wbufifo.v wbubus.v wbucompactlines.v \
wbucompress.v wbudecompress.v wbudeword.v wbuexec.v \
wbuidleint.v wbuinput.v wbuoutput.v wbureadcw.v wbusixchar.v \
wbutohex.v
PERIPHERALS:= wbgpio.v wbpwmaudio.v rxuart.v txuart.v uartdev.v \
rtcdate.v rtclight.v
SOURCES := busmaster.v wbscope.v wbsdram.v \
ioslave.v rtclight.v rtcdate.v \
wbspiflash.v lldspi.v sdspi.v spiarbiter.v \
$(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS)
$(VDIRFB)/Vbusmaster__ALL.a: $(VDIRFB)/Vbusmaster.h $(VDIRFB)/Vbusmaster.cpp
$(VDIRFB)/Vbusmaster__ALL.a: $(VDIRFB)/Vbusmaster.mk
$(VDIRFB)/Vbusmaster.h $(VDIRFB)/Vbusmaster.cpp $(VDIRFB)/Vbusmaster.mk: $(SOURCES)
$(VDIRFB)/V%.cpp $(VDIRFB)/V%.h $(VDIRFB)/V%.mk: $(FBDIR)/%.v
verilator -cc -y $(CPUDR) $*.v
$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
cd $(VDIRFB); make -f V$*.mk
.PHONY:
archive:
tar --transform s,^,$(YYMMDD)-rtl/, -chjf $(YYMMDD)-rtl.tjz Makefile *.v cpu/*.v
.PHONY: clean
clean:
rm -rf $(VDIRFB)/*.mk
rm -rf $(VDIRFB)/*.cpp
rm -rf $(VDIRFB)/*.h
rm -rf $(VDIRFB)/
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