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[/] [yacc/] [trunk/] [syn/] [altra_stratix2/] [yacc.fit.summary] - Rev 4

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Flow Status : Successful - Thu Apr 14 20:21:39 2005
Quartus II Version : 4.2 Build 178 01/19/2005 SP 1 SJ Web Edition
Revision Name : yacc
Top-level Entity Name : yacc
Family : Stratix II
Device : EP2S15F484C3
Timing Models : Preliminary
Met timing requirements : N/A
Total ALUTs : 2,926 / 12,480 ( 23 % )
Total registers : 1136
Total pins : 53 / 343 ( 15 % )
Total virtual pins : 0
Total memory bits : 137,216 / 419,328 ( 32 % )
DSP block 9-bit elements : 8 / 96 ( 8 % )
Total PLLs : 0 / 6 ( 0 % )
Total DLLs : 0 / 2 ( 0 % )

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