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# Constraints for KCPSM3 reference design - Real Time Digital Clock and PCB monitor with UART communications
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# Design provided for Spartan-3 Starter Board (rev E).
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# Ken Chapman - Xilinx Ltd - March 2004
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# I/O constraints for Spartan-3 Starter Board.
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# soldered 50MHz Clock
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NET "clk" LOC = "T9";

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# PS2
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NET "PS2_CLK"  LOC = "M16";
NET "PS2_DATA" LOC = "M15";

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# VGA
NET "VGA_R" LOC = "R12";
NET "VGA_G" LOC = "T12";
NET "VGA_B" LOC = "R11";
NET "VGA_HS" LOC = "R9";
NET "VGA_VS" LOC = "T10";
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# Simple LEDs 
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NET "led<0>" LOC = "K12";
NET "led<1>" LOC = "P14";
NET "led<2>" LOC = "L12";
NET "led<3>" LOC = "N14";
NET "led<4>" LOC = "P13";
NET "led<5>" LOC = "N12";
NET "led<6>" LOC = "P12";
NET "led<7>" LOC = "P11";
#
# Simple switches 
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NET "switch<0>" LOC = "F12";
NET "switch<1>" LOC = "G12";
NET "switch<2>" LOC = "H14";
NET "switch<3>" LOC = "H13";
NET "switch<4>" LOC = "J14";
NET "switch<5>" LOC = "J13";
NET "switch<6>" LOC = "K14";
NET "switch<7>" LOC = "K13";
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# Press buttons 
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NET "button<0>" LOC = "M13";
NET "button<1>" LOC = "M14";
NET "button<2>" LOC = "L13";
NET "button<3>" LOC = "L14";
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# UART connections to female DB9 connector J2
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NET "tx" LOC = "R13";
NET "rx" LOC = "T13";
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# 7-segement display 
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NET "led7com<0>" LOC = "D14";
NET "led7com<1>" LOC = "G14";
NET "led7com<2>" LOC = "F14";
NET "led7com<3>" LOC = "E13";
NET "led7seg<0>" LOC = "E14";
NET "led7seg<1>" LOC = "G13";
NET "led7seg<2>" LOC = "N15";
NET "led7seg<3>" LOC = "P15";
NET "led7seg<4>" LOC = "R16";
NET "led7seg<5>" LOC = "F13";
NET "led7seg<6>" LOC = "N16";
NET "led7seg<7>" LOC = "P16";
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# RAM 
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NET "ram_addr<0>" LOC = "L5";
NET "ram_addr<1>" LOC = "N3";
NET "ram_addr<2>" LOC = "M4";
NET "ram_addr<3>" LOC = "M3";
NET "ram_addr<4>" LOC = "L4";
NET "ram_addr<5>" LOC = "G4";
NET "ram_addr<6>" LOC = "F3";
NET "ram_addr<7>" LOC = "F4";
NET "ram_addr<8>" LOC = "E3";
NET "ram_addr<9>" LOC = "E4";
NET "ram_addr<10>" LOC = "G5";
NET "ram_addr<11>" LOC = "H3";
NET "ram_addr<12>" LOC = "H4";
NET "ram_addr<13>" LOC = "J4";
NET "ram_addr<14>" LOC = "J3";
NET "ram_addr<15>" LOC = "K3";
NET "ram_addr<16>" LOC = "K5";
NET "ram_addr<17>" LOC = "L3";
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NET "ram_we" LOC = "G3";
NET "ram_oe" LOC = "K4";
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NET "ram_a_data<0>" LOC = "N7";
NET "ram_a_data<1>" LOC = "T8";
NET "ram_a_data<2>" LOC = "R6";
NET "ram_a_data<3>" LOC = "T5";
NET "ram_a_data<4>" LOC = "R5";
NET "ram_a_data<5>" LOC = "C2";
NET "ram_a_data<6>" LOC = "C1";
NET "ram_a_data<7>" LOC = "B1";
NET "ram_a_data<8>" LOC = "D3";
NET "ram_a_data<9>" LOC = "P8";
NET "ram_a_data<10>" LOC = "F2";
NET "ram_a_data<11>" LOC = "H1";
NET "ram_a_data<12>" LOC = "J2";
NET "ram_a_data<13>" LOC = "L2";
NET "ram_a_data<14>" LOC = "P1";
NET "ram_a_data<15>" LOC = "R1";
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NET "ram_a_ce" LOC = "P7";
NET "ram_a_lb" LOC = "P6";
NET "ram_a_ub" LOC = "T4";
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NET "ram_b_data<0>" LOC = "P2";
NET "ram_b_data<1>" LOC = "N2";
NET "ram_b_data<2>" LOC = "M2";
NET "ram_b_data<3>" LOC = "K1";
NET "ram_b_data<4>" LOC = "J1";
NET "ram_b_data<5>" LOC = "G2";
NET "ram_b_data<6>" LOC = "E1";
NET "ram_b_data<7>" LOC = "D1";
NET "ram_b_data<8>" LOC = "D2";
NET "ram_b_data<9>" LOC = "E2";
NET "ram_b_data<10>" LOC = "G1";
NET "ram_b_data<11>" LOC = "F5";
NET "ram_b_data<12>" LOC = "C3";
NET "ram_b_data<13>" LOC = "K2";
NET "ram_b_data<14>" LOC = "M1";
NET "ram_b_data<15>" LOC = "N1";
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NET "ram_b_ce" LOC = "N5";
NET "ram_b_lb" LOC = "P5";
NET "ram_b_ub" LOC = "R4";
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# XCF02S Serial PROM connections
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NET "din" LOC = "M11";
NET "reset_prom" LOC = "N9";
NET "cclk" LOC = "A14";
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#End of file s3_clock_pcb_monitor.ucf
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