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[/] [z80soc/] [trunk/] [V0.7.1a/] [S3E/] [memoryCores/] [_xmsgs/] [pn_parser.xmsgs] - Rev 42

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<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated   -->
<!--     by the Xilinx ISE software.  Any direct editing or        -->
<!--     changes made to this file may result in unpredictable     -->
<!--     behavior or data corruption.  It is strongly advised that -->
<!--     users do not edit the contents of this file.              -->
<!--                                                               -->
<!-- Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.    -->

<messages>
<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file &quot;E:/FPGA Projetos/Z80SoC/V0.7.1/S3E/memoryCores/tmp/_cg/rom.vhd&quot; into library work</arg>
</msg>

</messages>

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