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https://opencores.org/ocsvn/z80soc/z80soc/trunk
Subversion Repositories z80soc
[/] [z80soc/] [trunk/] [V0.7.2/] [DE1/] [memoryCores/] [rom.bsf] - Rev 44
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/*WARNING: Do NOT edit the input and output ports in this file in a texteditor if you plan to continue editing the block that represents it inthe Block Editor! File corruption is VERY likely to occur.*//*Copyright (C) 1991-2010 Altera CorporationYour use of Altera Corporation's design tools, logic functionsand other software and tools, and its AMPP partner logicfunctions, and any output files from any of the foregoing(including device programming or simulation files), and anyassociated documentation or information are expressly subjectto the terms and conditions of the Altera Program LicenseSubscription Agreement, Altera MegaCore Function LicenseAgreement, or other applicable license agreement, including,without limitation, that your use is for the sole purpose ofprogramming logic devices manufactured by Altera and sold byAltera or its authorized distributors. Please refer to theapplicable agreement for further details.*/(header "symbol" (version "1.1"))(symbol(rect 0 0 216 136)(text "rom" (rect 97 1 122 17)(font "Arial" (font_size 10)))(text "inst" (rect 8 120 25 132)(font "Arial" ))(port(pt 0 32)(input)(text "address[13..0]" (rect 0 0 82 14)(font "Arial" (font_size 8)))(text "address[13..0]" (rect 4 19 69 32)(font "Arial" (font_size 8)))(line (pt 0 32)(pt 88 32)(line_width 3)))(port(pt 0 112)(input)(text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))(text "clock" (rect 4 99 27 112)(font "Arial" (font_size 8)))(line (pt 0 112)(pt 144 112)(line_width 1)))(port(pt 216 32)(output)(text "q[7..0]" (rect 0 0 35 14)(font "Arial" (font_size 8)))(text "q[7..0]" (rect 183 19 213 32)(font "Arial" (font_size 8)))(line (pt 216 32)(pt 160 32)(line_width 3)))(drawing(text "8 bits" (rect 108 48 120 71)(font "Arial" )(vertical))(text "16384 words" (rect 121 34 133 86)(font "Arial" )(vertical))(text "Block type: AUTO" (rect 41 116 117 128)(font "Arial" ))(line (pt 104 24)(pt 136 24)(line_width 1))(line (pt 136 24)(pt 136 96)(line_width 1))(line (pt 136 96)(pt 104 96)(line_width 1))(line (pt 104 96)(pt 104 24)(line_width 1))(line (pt 118 58)(pt 123 63)(line_width 1))(line (pt 118 62)(pt 123 57)(line_width 1))(line (pt 152 27)(pt 160 27)(line_width 1))(line (pt 160 27)(pt 160 39)(line_width 1))(line (pt 160 39)(pt 152 39)(line_width 1))(line (pt 152 39)(pt 152 27)(line_width 1))(line (pt 152 34)(pt 154 36)(line_width 1))(line (pt 154 36)(pt 152 38)(line_width 1))(line (pt 144 36)(pt 152 36)(line_width 1))(line (pt 136 32)(pt 152 32)(line_width 3))(line (pt 88 27)(pt 96 27)(line_width 1))(line (pt 96 27)(pt 96 39)(line_width 1))(line (pt 96 39)(pt 88 39)(line_width 1))(line (pt 88 39)(pt 88 27)(line_width 1))(line (pt 88 34)(pt 90 36)(line_width 1))(line (pt 90 36)(pt 88 38)(line_width 1))(line (pt 80 36)(pt 88 36)(line_width 1))(line (pt 96 32)(pt 104 32)(line_width 3))(line (pt 80 112)(pt 80 36)(line_width 1))(line (pt 144 112)(pt 144 36)(line_width 1))))
