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[/] [z80soc/] [trunk/] [V0.7.3/] [DE2115/] [073DE2115e.sta.rpt] - Rev 46
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TimeQuest Timing Analyzer report for 073DE2115eSun Jun 19 13:46:22 2016Quartus II 64-Bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition---------------------; Table of Contents ;---------------------1. Legal Notice2. TimeQuest Timing Analyzer Summary3. Parallel Compilation4. Clocks5. Slow 1200mV 85C Model Fmax Summary6. Timing Closure Recommendations7. Slow 1200mV 85C Model Setup Summary8. Slow 1200mV 85C Model Hold Summary9. Slow 1200mV 85C Model Recovery Summary10. Slow 1200mV 85C Model Removal Summary11. Slow 1200mV 85C Model Minimum Pulse Width Summary12. Slow 1200mV 85C Model Setup: 'SW[16]'13. Slow 1200mV 85C Model Setup: 'LCD:lcd_inst|clk_400hz_enable'14. Slow 1200mV 85C Model Setup: 'CLOCK_50'15. Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_25MHz'16. Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_100Hz'17. Slow 1200mV 85C Model Setup: 'T80se:z80_inst|MREQ_n'18. Slow 1200mV 85C Model Setup: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'19. Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_25Mhz_int'20. Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_1Mhz_int'21. Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_100Khz_int'22. Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_10Khz_int'23. Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_1Khz_int'24. Slow 1200mV 85C Model Hold: 'SW[16]'25. Slow 1200mV 85C Model Hold: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'26. Slow 1200mV 85C Model Hold: 'CLOCK_50'27. Slow 1200mV 85C Model Hold: 'T80se:z80_inst|MREQ_n'28. Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_100Khz_int'29. Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_10Khz_int'30. Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_1Mhz_int'31. Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_25MHz'32. Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_1Khz_int'33. Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_100Hz'34. Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_25Mhz_int'35. Slow 1200mV 85C Model Hold: 'LCD:lcd_inst|clk_400hz_enable'36. Slow 1200mV 85C Model Recovery: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'37. Slow 1200mV 85C Model Removal: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'38. Slow 1200mV 85C Model Minimum Pulse Width: 'SW[16]'39. Slow 1200mV 85C Model Minimum Pulse Width: 'CLOCK_50'40. Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25MHz'41. Slow 1200mV 85C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'42. Slow 1200mV 85C Model Minimum Pulse Width: 'LCD:lcd_inst|clk_400hz_enable'43. Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25Mhz_int'44. Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Khz_int'45. Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_10Khz_int'46. Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Khz_int'47. Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Mhz_int'48. Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Hz'49. Slow 1200mV 85C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'50. Slow 1200mV 85C Model Minimum Pulse Width: 'T80se:z80_inst|MREQ_n'51. Setup Times52. Hold Times53. Clock to Output Times54. Minimum Clock to Output Times55. Output Enable Times56. Minimum Output Enable Times57. Output Disable Times58. Minimum Output Disable Times59. Slow 1200mV 85C Model Metastability Report60. Slow 1200mV 0C Model Fmax Summary61. Slow 1200mV 0C Model Setup Summary62. Slow 1200mV 0C Model Hold Summary63. Slow 1200mV 0C Model Recovery Summary64. Slow 1200mV 0C Model Removal Summary65. Slow 1200mV 0C Model Minimum Pulse Width Summary66. Slow 1200mV 0C Model Setup: 'SW[16]'67. Slow 1200mV 0C Model Setup: 'LCD:lcd_inst|clk_400hz_enable'68. Slow 1200mV 0C Model Setup: 'CLOCK_50'69. Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_25MHz'70. Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_100Hz'71. Slow 1200mV 0C Model Setup: 'T80se:z80_inst|MREQ_n'72. Slow 1200mV 0C Model Setup: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'73. Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_25Mhz_int'74. Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_1Mhz_int'75. Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_100Khz_int'76. Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_10Khz_int'77. Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_1Khz_int'78. Slow 1200mV 0C Model Hold: 'SW[16]'79. Slow 1200mV 0C Model Hold: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'80. Slow 1200mV 0C Model Hold: 'CLOCK_50'81. Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_100Khz_int'82. Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_10Khz_int'83. Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_1Mhz_int'84. Slow 1200mV 0C Model Hold: 'T80se:z80_inst|MREQ_n'85. Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_25MHz'86. Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_1Khz_int'87. Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_100Hz'88. Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_25Mhz_int'89. Slow 1200mV 0C Model Hold: 'LCD:lcd_inst|clk_400hz_enable'90. Slow 1200mV 0C Model Recovery: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'91. Slow 1200mV 0C Model Removal: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'92. Slow 1200mV 0C Model Minimum Pulse Width: 'SW[16]'93. Slow 1200mV 0C Model Minimum Pulse Width: 'CLOCK_50'94. Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25MHz'95. Slow 1200mV 0C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'96. Slow 1200mV 0C Model Minimum Pulse Width: 'LCD:lcd_inst|clk_400hz_enable'97. Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25Mhz_int'98. Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Khz_int'99. Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_10Khz_int'100. Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Khz_int'101. Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Mhz_int'102. Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Hz'103. Slow 1200mV 0C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'104. Slow 1200mV 0C Model Minimum Pulse Width: 'T80se:z80_inst|MREQ_n'105. Setup Times106. Hold Times107. Clock to Output Times108. Minimum Clock to Output Times109. Output Enable Times110. Minimum Output Enable Times111. Output Disable Times112. Minimum Output Disable Times113. Slow 1200mV 0C Model Metastability Report114. Fast 1200mV 0C Model Setup Summary115. Fast 1200mV 0C Model Hold Summary116. Fast 1200mV 0C Model Recovery Summary117. Fast 1200mV 0C Model Removal Summary118. Fast 1200mV 0C Model Minimum Pulse Width Summary119. Fast 1200mV 0C Model Setup: 'LCD:lcd_inst|clk_400hz_enable'120. Fast 1200mV 0C Model Setup: 'SW[16]'121. Fast 1200mV 0C Model Setup: 'CLOCK_50'122. Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_100Hz'123. Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_25MHz'124. Fast 1200mV 0C Model Setup: 'T80se:z80_inst|MREQ_n'125. Fast 1200mV 0C Model Setup: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'126. Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_25Mhz_int'127. Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_100Khz_int'128. Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_1Mhz_int'129. Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_10Khz_int'130. Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_1Khz_int'131. Fast 1200mV 0C Model Hold: 'SW[16]'132. Fast 1200mV 0C Model Hold: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'133. Fast 1200mV 0C Model Hold: 'CLOCK_50'134. Fast 1200mV 0C Model Hold: 'T80se:z80_inst|MREQ_n'135. Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_100Khz_int'136. Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_10Khz_int'137. Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_1Mhz_int'138. Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_25MHz'139. Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_1Khz_int'140. Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_100Hz'141. Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_25Mhz_int'142. Fast 1200mV 0C Model Hold: 'LCD:lcd_inst|clk_400hz_enable'143. Fast 1200mV 0C Model Recovery: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'144. Fast 1200mV 0C Model Removal: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'145. Fast 1200mV 0C Model Minimum Pulse Width: 'SW[16]'146. Fast 1200mV 0C Model Minimum Pulse Width: 'CLOCK_50'147. Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25MHz'148. Fast 1200mV 0C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered'149. Fast 1200mV 0C Model Minimum Pulse Width: 'LCD:lcd_inst|clk_400hz_enable'150. Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25Mhz_int'151. Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Khz_int'152. Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_10Khz_int'153. Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Khz_int'154. Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Mhz_int'155. Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Hz'156. Fast 1200mV 0C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set'157. Fast 1200mV 0C Model Minimum Pulse Width: 'T80se:z80_inst|MREQ_n'158. Setup Times159. Hold Times160. Clock to Output Times161. Minimum Clock to Output Times162. Output Enable Times163. Minimum Output Enable Times164. Output Disable Times165. Minimum Output Disable Times166. Fast 1200mV 0C Model Metastability Report167. Multicorner Timing Analysis Summary168. Setup Times169. Hold Times170. Clock to Output Times171. Minimum Clock to Output Times172. Board Trace Model Assignments173. Input Transition Times174. Signal Integrity Metrics (Slow 1200mv 0c Model)175. Signal Integrity Metrics (Slow 1200mv 85c Model)176. Signal Integrity Metrics (Fast 1200mv 0c Model)177. Setup Transfers178. Hold Transfers179. Recovery Transfers180. Removal Transfers181. Report TCCS182. Report RSKM183. Unconstrained Paths184. TimeQuest Timing Analyzer Messages----------------; Legal Notice ;----------------Copyright (C) 1991-2013 Altera CorporationYour use of Altera Corporation's design tools, logic functionsand other software and tools, and its AMPP partner logicfunctions, and any output files from any of the foregoing(including device programming or simulation files), and anyassociated documentation or information are expressly subjectto the terms and conditions of the Altera Program LicenseSubscription Agreement, Altera MegaCore Function LicenseAgreement, or other applicable license agreement, including,without limitation, that your use is for the sole purpose ofprogramming logic devices manufactured by Altera and sold byAltera or its authorized distributors. Please refer to theapplicable agreement for further details.+----------------------------------------------------------------------------------------+; TimeQuest Timing Analyzer Summary ;+--------------------+-------------------------------------------------------------------+; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;; Revision Name ; 073DE2115e ;; Device Family ; Cyclone IV E ;; Device Name ; EP4CE115F29C7 ;; Timing Models ; Final ;; Delay Model ; Combined ;; Rise/Fall Delays ; Enabled ;+--------------------+-------------------------------------------------------------------+Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.+-------------------------------------+; Parallel Compilation ;+----------------------------+--------+; Processors ; Number ;+----------------------------+--------+; Number detected on machine ; 2 ;; Maximum allowed ; 1 ;+----------------------------+--------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Clocks ;+-------------------------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------------------------+; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ;+-------------------------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------------------------+; clk_div:clkdiv_inst|clock_1Khz_int ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:clkdiv_inst|clock_1Khz_int } ;; clk_div:clkdiv_inst|clock_1Mhz_int ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:clkdiv_inst|clock_1Mhz_int } ;; clk_div:clkdiv_inst|clock_10Khz_int ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:clkdiv_inst|clock_10Khz_int } ;; clk_div:clkdiv_inst|clock_25MHz ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:clkdiv_inst|clock_25MHz } ;; clk_div:clkdiv_inst|clock_25Mhz_int ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:clkdiv_inst|clock_25Mhz_int } ;; clk_div:clkdiv_inst|clock_100Hz ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:clkdiv_inst|clock_100Hz } ;; clk_div:clkdiv_inst|clock_100Khz_int ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:clkdiv_inst|clock_100Khz_int } ;; CLOCK_50 ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { CLOCK_50 } ;; LCD:lcd_inst|clk_400hz_enable ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { LCD:lcd_inst|clk_400hz_enable } ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered } ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set } ;; SW[16] ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { SW[16] } ;; T80se:z80_inst|MREQ_n ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { T80se:z80_inst|MREQ_n } ;+-------------------------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------------------------++---------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Fmax Summary ;+------------+-----------------+-------------------------------------------------------------+------------------------------------------------+; Fmax ; Restricted Fmax ; Clock Name ; Note ;+------------+-----------------+-------------------------------------------------------------+------------------------------------------------+; 73.86 MHz ; 73.86 MHz ; SW[16] ; ;; 149.37 MHz ; 149.37 MHz ; clk_div:clkdiv_inst|clock_25MHz ; ;; 234.58 MHz ; 234.58 MHz ; CLOCK_50 ; ;; 306.56 MHz ; 306.56 MHz ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ;; 527.7 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_25Mhz_int ; limit due to minimum period restriction (tmin) ;; 605.69 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_1Mhz_int ; limit due to minimum period restriction (tmin) ;; 653.59 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_100Khz_int ; limit due to minimum period restriction (tmin) ;; 657.46 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_10Khz_int ; limit due to minimum period restriction (tmin) ;; 840.34 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_1Khz_int ; limit due to minimum period restriction (tmin) ;; 920.81 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_100Hz ; limit due to minimum period restriction (tmin) ;+------------+-----------------+-------------------------------------------------------------+------------------------------------------------+This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.----------------------------------; Timing Closure Recommendations ;----------------------------------HTML report is unavailable in plain text report export.+---------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup Summary ;+-------------------------------------------------------------+---------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+---------+---------------+; SW[16] ; -12.540 ; -3745.302 ;; LCD:lcd_inst|clk_400hz_enable ; -11.704 ; -88.730 ;; CLOCK_50 ; -7.823 ; -185.058 ;; clk_div:clkdiv_inst|clock_25MHz ; -5.695 ; -252.613 ;; clk_div:clkdiv_inst|clock_100Hz ; -5.245 ; -10.490 ;; T80se:z80_inst|MREQ_n ; -2.601 ; -435.678 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -2.262 ; -38.292 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; -0.895 ; -4.526 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; -0.651 ; -1.066 ;; clk_div:clkdiv_inst|clock_100Khz_int ; -0.530 ; -0.826 ;; clk_div:clkdiv_inst|clock_10Khz_int ; -0.521 ; -0.804 ;; clk_div:clkdiv_inst|clock_1Khz_int ; -0.190 ; -0.495 ;+-------------------------------------------------------------+---------+---------------++--------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold Summary ;+-------------------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+--------+---------------+; SW[16] ; -2.980 ; -135.492 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.439 ; -0.439 ;; CLOCK_50 ; -0.254 ; -0.669 ;; T80se:z80_inst|MREQ_n ; 0.033 ; 0.000 ;; clk_div:clkdiv_inst|clock_100Khz_int ; 0.079 ; 0.000 ;; clk_div:clkdiv_inst|clock_10Khz_int ; 0.098 ; 0.000 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.189 ; 0.000 ;; clk_div:clkdiv_inst|clock_25MHz ; 0.343 ; 0.000 ;; clk_div:clkdiv_inst|clock_1Khz_int ; 0.440 ; 0.000 ;; clk_div:clkdiv_inst|clock_100Hz ; 0.454 ; 0.000 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.472 ; 0.000 ;; LCD:lcd_inst|clk_400hz_enable ; 2.342 ; 0.000 ;+-------------------------------------------------------------+--------+---------------++--------------------------------------------------------------------------+; Slow 1200mV 85C Model Recovery Summary ;+-------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------+--------+---------------+; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; -2.630 ; -2.630 ;+-------------------------------------------------+--------+---------------++-------------------------------------------------------------------------+; Slow 1200mV 85C Model Removal Summary ;+-------------------------------------------------+-------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------+-------+---------------+; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 3.090 ; 0.000 ;+-------------------------------------------------+-------+---------------++--------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width Summary ;+-------------------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+--------+---------------+; SW[16] ; -3.000 ; -612.867 ;; CLOCK_50 ; -3.000 ; -141.780 ;; clk_div:clkdiv_inst|clock_25MHz ; -2.693 ; -178.641 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -1.285 ; -29.555 ;; LCD:lcd_inst|clk_400hz_enable ; -1.285 ; -10.280 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; -1.285 ; -7.710 ;; clk_div:clkdiv_inst|clock_100Khz_int ; -1.285 ; -5.140 ;; clk_div:clkdiv_inst|clock_10Khz_int ; -1.285 ; -5.140 ;; clk_div:clkdiv_inst|clock_1Khz_int ; -1.285 ; -5.140 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; -1.285 ; -5.140 ;; clk_div:clkdiv_inst|clock_100Hz ; -1.285 ; -2.570 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; -1.285 ; -1.285 ;; T80se:z80_inst|MREQ_n ; 0.320 ; 0.000 ;+-------------------------------------------------------------+--------+---------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'SW[16]' ;+---------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+---------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------+; -12.540 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.449 ;; -12.536 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.445 ;; -12.487 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.363 ;; -12.485 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.361 ;; -12.483 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.359 ;; -12.481 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.357 ;; -12.480 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.395 ;; -12.478 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.393 ;; -12.474 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.350 ;; -12.470 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.346 ;; -12.461 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.370 ;; -12.457 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.366 ;; -12.450 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.326 ;; -12.446 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.322 ;; -12.442 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.351 ;; -12.438 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.347 ;; -12.433 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.309 ;; -12.429 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.305 ;; -12.427 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.309 ;; -12.425 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.307 ;; -12.425 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.307 ;; -12.423 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.305 ;; -12.418 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.300 ;; -12.414 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.296 ;; -12.414 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.296 ;; -12.413 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.770 ; 10.641 ;; -12.412 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.294 ;; -12.401 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.316 ;; -12.399 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.314 ;; -12.396 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.305 ;; -12.392 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.301 ;; -12.390 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.272 ;; -12.388 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.270 ;; -12.382 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.297 ;; -12.380 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.262 ;; -12.380 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.295 ;; -12.377 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.779 ; 10.596 ;; -12.377 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.121 ; 13.254 ;; -12.376 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.258 ;; -12.373 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.255 ;; -12.373 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.121 ; 13.250 ;; -12.371 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.253 ;; -12.358 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.110 ; 13.246 ;; -12.356 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.110 ; 13.244 ;; -12.339 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.770 ; 10.567 ;; -12.336 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.251 ;; -12.335 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.211 ;; -12.334 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.249 ;; -12.331 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.122 ; 13.207 ;; -12.320 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.110 ; 13.208 ;; -12.318 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.110 ; 13.206 ;; -12.317 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.115 ; 13.200 ;; -12.315 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.115 ; 13.198 ;; -12.315 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.224 ;; -12.311 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.220 ;; -12.293 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.082 ; 13.209 ;; -12.289 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.087 ; 13.200 ;; -12.288 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.087 ; 13.199 ;; -12.275 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.157 ;; -12.273 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.773 ; 10.498 ;; -12.273 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.116 ; 13.155 ;; -12.269 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.770 ; 10.497 ;; -12.259 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[9] ; SW[16] ; SW[16] ; 1.000 ; -2.757 ; 10.500 ;; -12.259 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.779 ; 10.478 ;; -12.255 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.170 ;; -12.253 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.083 ; 13.168 ;; -12.252 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[8] ; SW[16] ; SW[16] ; 1.000 ; -2.757 ; 10.493 ;; -12.244 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][3] ; SW[16] ; SW[16] ; 1.000 ; -0.088 ; 13.154 ;; -12.244 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][3] ; SW[16] ; SW[16] ; 1.000 ; -0.088 ; 13.154 ;; -12.242 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][3] ; SW[16] ; SW[16] ; 1.000 ; -0.086 ; 13.154 ;; -12.242 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][3] ; SW[16] ; SW[16] ; 1.000 ; -0.086 ; 13.154 ;; -12.240 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.115 ; 13.123 ;; -12.239 ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.148 ;; -12.238 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.115 ; 13.121 ;; -12.236 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.120 ; 13.114 ;; -12.235 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.773 ; 10.460 ;; -12.235 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.120 ; 13.113 ;; -12.235 ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.089 ; 13.144 ;; -12.234 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.120 ; 13.112 ;; -12.233 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.120 ; 13.111 ;; -12.232 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.086 ; 13.144 ;; -12.229 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.779 ; 10.448 ;; -12.227 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.115 ; 13.110 ;; -12.223 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.779 ; 10.442 ;; -12.223 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.120 ; 13.101 ;; -12.222 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.120 ; 13.100 ;; -12.214 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][5] ; SW[16] ; SW[16] ; 1.000 ; -0.087 ; 13.125 ;; -12.214 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.082 ; 13.130 ;; -12.212 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][5] ; SW[16] ; SW[16] ; 1.000 ; -0.087 ; 13.123 ;; -12.211 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|A[9] ; SW[16] ; SW[16] ; 1.000 ; -2.766 ; 10.443 ;; -12.210 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.087 ; 13.121 ;; -12.209 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.087 ; 13.120 ;; -12.205 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.779 ; 10.424 ;; -12.203 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.115 ; 13.086 ;; -12.202 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[15] ; SW[16] ; SW[16] ; 1.000 ; -2.770 ; 10.430 ;; -12.199 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.120 ; 13.077 ;; -12.198 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.120 ; 13.076 ;; -12.196 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][1] ; SW[16] ; SW[16] ; 1.000 ; -0.087 ; 13.107 ;; -12.195 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|A[8] ; SW[16] ; SW[16] ; 1.000 ; -2.766 ; 10.427 ;; -12.195 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.082 ; 13.111 ;+---------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'LCD:lcd_inst|clk_400hz_enable' ;+---------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+---------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; -11.704 ; lcdvram[28][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.153 ; 4.059 ;; -11.460 ; lcdvram[19][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.784 ; 3.184 ;; -11.453 ; lcdvram[31][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.726 ; 3.235 ;; -11.372 ; lcdvram[20][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.410 ; 3.470 ;; -11.283 ; lcdvram[31][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.633 ; 3.158 ;; -11.250 ; lcdvram[22][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.815 ; 3.943 ;; -11.250 ; lcdvram[30][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.875 ; 3.883 ;; -11.154 ; lcdvram[22][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.770 ; 3.892 ;; -11.137 ; lcdvram[22][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.720 ; 3.925 ;; -11.098 ; lcdvram[19][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.713 ; 2.893 ;; -11.042 ; lcdvram[10][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.046 ; 4.504 ;; -11.019 ; lcdvram[16][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.686 ; 2.841 ;; -11.013 ; lcdvram[16][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.822 ; 2.699 ;; -10.986 ; lcdvram[3][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.035 ; 4.459 ;; -10.971 ; lcdvram[31][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.686 ; 2.793 ;; -10.954 ; lcdvram[19][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.590 ; 2.872 ;; -10.944 ; lcdvram[16][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.744 ; 2.708 ;; -10.923 ; lcdvram[17][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.478 ; 2.953 ;; -10.916 ; lcdvram[6][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.409 ; 4.015 ;; -10.913 ; lcdvram[19][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.813 ; 2.608 ;; -10.841 ; lcdvram[17][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.495 ; 2.854 ;; -10.829 ; lcdvram[27][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.506 ; 2.831 ;; -10.801 ; lcdvram[19][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.693 ; 2.616 ;; -10.791 ; lcdvram[0][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.541 ; 3.758 ;; -10.770 ; lcdvram[4][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.116 ; 4.162 ;; -10.768 ; lcdvram[27][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.443 ; 2.833 ;; -10.745 ; lcdvram[17][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.518 ; 2.735 ;; -10.740 ; lcdvram[24][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.570 ; 2.678 ;; -10.738 ; lcdvram[28][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.267 ; 2.979 ;; -10.733 ; lcdvram[17][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.400 ; 2.841 ;; -10.731 ; lcdvram[19][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.508 ; 2.731 ;; -10.721 ; lcdvram[20][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.402 ; 2.827 ;; -10.716 ; lcdvram[18][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.949 ; 3.275 ;; -10.714 ; lcdvram[16][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.678 ; 2.544 ;; -10.710 ; lcdvram[23][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.774 ; 3.444 ;; -10.691 ; lcdvram[17][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.406 ; 2.793 ;; -10.686 ; lcdvram[28][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.147 ; 3.047 ;; -10.681 ; lcdvram[18][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.198 ; 2.991 ;; -10.670 ; lcdvram[20][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.315 ; 2.863 ;; -10.645 ; lcdvram[1][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.905 ; 4.248 ;; -10.641 ; lcdvram[20][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.267 ; 2.882 ;; -10.625 ; lcdvram[25][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.317 ; 2.816 ;; -10.623 ; lcdvram[6][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.073 ; 4.058 ;; -10.609 ; lcdvram[22][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.560 ; 3.557 ;; -10.605 ; lcdvram[16][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.744 ; 2.369 ;; -10.581 ; lcdvram[27][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.543 ; 2.546 ;; -10.549 ; lcdvram[23][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.689 ; 3.368 ;; -10.527 ; lcdvram[24][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.414 ; 2.621 ;; -10.517 ; lcdvram[6][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.220 ; 3.805 ;; -10.482 ; lcdvram[28][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.028 ; 2.962 ;; -10.474 ; lcdvram[18][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.112 ; 2.870 ;; -10.459 ; lcdvram[6][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.513 ; 3.454 ;; -10.455 ; lcdvram[27][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.561 ; 2.402 ;; -10.454 ; lcdvram[17][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.460 ; 2.502 ;; -10.453 ; lcdvram[4][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.015 ; 3.946 ;; -10.445 ; lcdvram[17][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.402 ; 2.551 ;; -10.441 ; lcdvram[0][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.199 ; 3.750 ;; -10.438 ; lcdvram[31][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.630 ; 2.316 ;; -10.438 ; lcdvram[16][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.586 ; 2.360 ;; -10.426 ; lcdvram[18][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.197 ; 2.737 ;; -10.414 ; lcdvram[24][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.469 ; 2.453 ;; -10.412 ; lcdvram[30][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.870 ; 3.050 ;; -10.397 ; lcdvram[19][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.619 ; 2.286 ;; -10.394 ; lcdvram[1][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.701 ; 4.201 ;; -10.386 ; lcdvram[16][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.693 ; 2.201 ;; -10.368 ; lcdvram[18][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.119 ; 2.757 ;; -10.350 ; lcdvram[20][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.339 ; 2.519 ;; -10.338 ; lcdvram[20][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.138 ; 2.708 ;; -10.331 ; lcdvram[2][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.672 ; 4.167 ;; -10.317 ; lcdvram[21][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.057 ; 2.768 ;; -10.298 ; lcdvram[24][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.278 ; 2.528 ;; -10.283 ; lcdvram[31][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.730 ; 2.061 ;; -10.276 ; lcdvram[28][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.281 ; 2.503 ;; -10.259 ; lcdvram[25][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.254 ; 2.513 ;; -10.255 ; lcdvram[29][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.453 ; 3.310 ;; -10.229 ; lcdvram[21][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.089 ; 2.648 ;; -10.228 ; lcdvram[25][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.333 ; 2.403 ;; -10.208 ; lcdvram[21][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.232 ; 2.484 ;; -10.205 ; lcdvram[26][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.763 ; 2.950 ;; -10.200 ; lcdvram[22][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.673 ; 3.035 ;; -10.191 ; lcdvram[17][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.142 ; 2.557 ;; -10.190 ; lcdvram[0][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.832 ; 3.866 ;; -10.189 ; lcdvram[0][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.574 ; 4.123 ;; -10.188 ; lcdvram[7][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.964 ; 3.732 ;; -10.185 ; lcdvram[4][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.115 ; 3.578 ;; -10.184 ; lcdvram[27][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.497 ; 2.195 ;; -10.181 ; lcdvram[8][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.803 ; 3.886 ;; -10.173 ; lcdvram[30][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.745 ; 2.936 ;; -10.167 ; lcdvram[25][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.503 ; 2.172 ;; -10.162 ; lcdvram[24][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.224 ; 2.446 ;; -10.148 ; lcdvram[31][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.609 ; 2.047 ;; -10.142 ; lcdvram[26][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.929 ; 2.721 ;; -10.130 ; lcdvram[25][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.218 ; 2.420 ;; -10.122 ; lcdvram[27][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.423 ; 2.207 ;; -10.087 ; lcdvram[24][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.382 ; 2.213 ;; -10.082 ; lcdvram[20][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.242 ; 2.348 ;; -10.050 ; lcdvram[11][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.005 ; 3.553 ;; -10.034 ; lcdvram[11][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.680 ; 3.862 ;; -10.030 ; lcdvram[23][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.788 ; 2.750 ;; -10.029 ; lcdvram[25][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -8.494 ; 2.043 ;+---------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'CLOCK_50' ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; -7.823 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.495 ; 7.316 ;; -7.754 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.495 ; 7.247 ;; -7.736 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 7.218 ;; -7.736 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 7.218 ;; -7.736 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 7.218 ;; -7.667 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 7.149 ;; -7.667 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 7.149 ;; -7.667 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 7.149 ;; -7.644 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 7.125 ;; -7.644 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 7.125 ;; -7.644 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 7.125 ;; -7.644 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 7.125 ;; -7.575 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 7.056 ;; -7.575 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 7.056 ;; -7.575 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 7.056 ;; -7.575 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 7.056 ;; -7.296 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.496 ; 6.788 ;; -7.268 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.495 ; 6.761 ;; -7.260 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.495 ; 6.753 ;; -7.243 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.495 ; 6.736 ;; -7.209 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.690 ;; -7.209 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.690 ;; -7.209 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.690 ;; -7.183 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.495 ; 6.676 ;; -7.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.655 ;; -7.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.655 ;; -7.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.655 ;; -7.158 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.640 ;; -7.158 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.640 ;; -7.158 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.640 ;; -7.156 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.638 ;; -7.156 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.638 ;; -7.156 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.638 ;; -7.117 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.508 ; 6.597 ;; -7.117 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.508 ; 6.597 ;; -7.117 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.508 ; 6.597 ;; -7.117 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.508 ; 6.597 ;; -7.096 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.578 ;; -7.096 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.578 ;; -7.096 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.506 ; 6.578 ;; -7.081 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.562 ;; -7.081 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.562 ;; -7.081 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.562 ;; -7.081 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.562 ;; -7.064 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.545 ;; -7.064 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.545 ;; -7.064 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.545 ;; -7.064 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.545 ;; -7.058 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.539 ;; -7.058 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.539 ;; -7.058 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.539 ;; -7.058 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.539 ;; -7.004 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.485 ;; -7.004 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.485 ;; -7.004 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.485 ;; -7.004 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 6.485 ;; -6.481 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 5.962 ;; -6.363 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 5.844 ;; -5.987 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 5.468 ;; -5.836 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.508 ; 5.316 ;; -5.828 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 5.309 ;; -5.783 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 5.264 ;; -5.694 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.507 ; 5.175 ;; -5.282 ; LCDON_reg ; LCD:lcd_inst|LCD_ON ; SW[16] ; CLOCK_50 ; 1.000 ; -4.988 ; 1.272 ;; -5.023 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.497 ; 4.514 ;; -4.936 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.508 ; 4.416 ;; -4.936 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.508 ; 4.416 ;; -4.936 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.508 ; 4.416 ;; -4.844 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.509 ; 4.323 ;; -4.844 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.509 ; 4.323 ;; -4.844 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.509 ; 4.323 ;; -4.844 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.509 ; 4.323 ;; -3.689 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[2] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.594 ; 6.281 ;; -3.602 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[1] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.583 ; 6.183 ;; -3.602 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[6] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.583 ; 6.183 ;; -3.602 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[5] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.583 ; 6.183 ;; -3.510 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[7] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.582 ; 6.090 ;; -3.510 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[3] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.582 ; 6.090 ;; -3.510 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[0] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.582 ; 6.090 ;; -3.510 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[4] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.582 ; 6.090 ;; -3.459 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.509 ; 2.938 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[0] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[1] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[2] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[3] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[4] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[5] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[6] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[7] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[8] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.263 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[9] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.180 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[0] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[1] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[2] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[3] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[4] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[5] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[6] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[7] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;; -3.255 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[8] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.081 ; 4.172 ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_25MHz' ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; -5.695 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.373 ; 6.320 ;; -5.694 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.373 ; 6.319 ;; -5.692 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.373 ; 6.317 ;; -5.496 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.359 ; 6.135 ;; -5.495 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.359 ; 6.134 ;; -5.494 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.359 ; 6.133 ;; -5.318 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.373 ; 5.943 ;; -5.119 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.359 ; 5.758 ;; -4.574 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.200 ; 3.402 ;; -4.514 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.200 ; 3.342 ;; -4.478 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.237 ; 3.269 ;; -4.469 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.027 ; 3.470 ;; -4.464 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.002 ; 3.490 ;; -4.441 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.017 ; 3.452 ;; -4.289 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.673 ; 3.644 ;; -4.280 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.727 ; 3.581 ;; -4.278 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.200 ; 3.106 ;; -4.195 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.764 ; 3.459 ;; -4.165 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.232 ; 2.961 ;; -4.148 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.034 ; 3.142 ;; -4.126 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.234 ; 2.920 ;; -4.126 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.215 ; 2.939 ;; -4.121 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.225 ; 2.924 ;; -4.119 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.036 ; 3.111 ;; -4.115 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.215 ; 2.928 ;; -4.091 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.012 ; 3.107 ;; -4.069 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.058 ; 5.049 ;; -4.066 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.046 ; 5.058 ;; -4.064 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.047 ; 5.055 ;; -4.057 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.057 ; 5.038 ;; -4.046 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.045 ; 5.039 ;; -4.033 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.683 ; 3.378 ;; -4.003 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.059 ; 4.982 ;; -3.960 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.047 ; 4.951 ;; -3.945 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.200 ; 2.773 ;; -3.918 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.759 ; 3.187 ;; -3.913 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.761 ; 3.180 ;; -3.903 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.688 ; 3.243 ;; -3.891 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.698 ; 3.221 ;; -3.886 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.742 ; 3.172 ;; -3.877 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.237 ; 2.668 ;; -3.862 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.752 ; 3.138 ;; -3.854 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.225 ; 2.657 ;; -3.835 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.210 ; 2.653 ;; -3.835 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.215 ; 2.648 ;; -3.828 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.234 ; 2.622 ;; -3.827 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.225 ; 2.630 ;; -3.792 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.210 ; 2.610 ;; -3.786 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.232 ; 2.582 ;; -3.781 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.039 ; 2.770 ;; -3.778 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.210 ; 2.596 ;; -3.776 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.234 ; 2.570 ;; -3.709 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.187 ; 4.934 ;; -3.698 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.925 ;; -3.698 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.187 ; 4.923 ;; -3.694 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.201 ; 2.521 ;; -3.693 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.187 ; 4.918 ;; -3.689 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.059 ; 4.668 ;; -3.687 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.914 ;; -3.682 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.909 ;; -3.662 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.188 ; 4.888 ;; -3.661 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.027 ; 2.662 ;; -3.651 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.188 ; 4.877 ;; -3.646 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.188 ; 4.872 ;; -3.642 ; T80se:z80_inst|T80:u0|A[9] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.752 ; 2.918 ;; -3.640 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.203 ; 2.465 ;; -3.632 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.202 ; 2.458 ;; -3.632 ; T80se:z80_inst|T80:u0|A[9] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.727 ; 2.933 ;; -3.625 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.852 ;; -3.615 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.020 ; 2.623 ;; -3.614 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.841 ;; -3.609 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.836 ;; -3.605 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.187 ; 4.830 ;; -3.601 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.187 ; 4.826 ;; -3.600 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.234 ; 2.394 ;; -3.597 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.188 ; 4.823 ;; -3.594 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.821 ;; -3.590 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.817 ;; -3.582 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.707 ; 2.903 ;; -3.580 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.232 ; 2.376 ;; -3.578 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.188 ; 4.804 ;; -3.575 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.225 ; 2.378 ;; -3.574 ; T80se:z80_inst|T80:u0|A[7] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.730 ; 2.872 ;; -3.566 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.215 ; 2.379 ;; -3.555 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.210 ; 2.373 ;; -3.554 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.781 ;; -3.552 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.702 ; 2.878 ;; -3.549 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.218 ; 2.359 ;; -3.540 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.710 ; 2.858 ;; -3.536 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.201 ; 4.775 ;; -3.535 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.229 ; 2.334 ;; -3.535 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.189 ; 4.762 ;; -3.525 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.222 ; 2.331 ;; -3.520 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.225 ; 2.323 ;; -3.519 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.201 ; 4.758 ;; -3.517 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.698 ; 2.847 ;; -3.517 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.201 ; 4.756 ;; -3.511 ; T80se:z80_inst|T80:u0|A[12] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.673 ; 2.866 ;; -3.510 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.201 ; 4.749 ;; -3.508 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.237 ; 2.299 ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_100Hz' ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; -5.245 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 3.091 ;; -5.245 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 3.091 ;; -4.788 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.634 ;; -4.788 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.634 ;; -4.785 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.631 ;; -4.785 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.631 ;; -4.753 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.163 ; 2.598 ;; -4.753 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.163 ; 2.598 ;; -4.718 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.564 ;; -4.718 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.564 ;; -4.708 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.554 ;; -4.708 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.554 ;; -4.644 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.164 ; 2.488 ;; -4.644 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.164 ; 2.488 ;; -4.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.447 ;; -4.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -3.162 ; 2.447 ;; -0.086 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -0.046 ; 1.058 ;; 0.176 ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -0.046 ; 0.796 ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'T80se:z80_inst|MREQ_n' ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; -2.601 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[10][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.326 ; 2.591 ;; -2.588 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[8][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.065 ; 2.173 ;; -2.565 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[5][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.007 ; 2.170 ;; -2.560 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[29][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.842 ; 3.032 ;; -2.507 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[11][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.152 ; 1.858 ;; -2.491 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[13][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.298 ; 1.704 ;; -2.471 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[29][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.820 ; 2.891 ;; -2.417 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[29][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.827 ; 2.843 ;; -2.415 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[2][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.083 ; 2.141 ;; -2.351 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[5][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.271 ; 2.131 ;; -2.330 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[29][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.839 ; 2.768 ;; -2.326 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[0][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.514 ; 2.303 ;; -2.326 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[26][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.033 ; 2.955 ;; -2.280 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[3][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.683 ; 0.908 ;; -2.276 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[8][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.090 ; 1.971 ;; -2.237 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[13][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.093 ; 2.110 ;; -2.213 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[29][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.997 ; 2.990 ;; -2.198 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[5][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.132 ; 2.109 ;; -2.190 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[5][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.239 ; 1.746 ;; -2.176 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[0][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.007 ; 1.957 ;; -2.174 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[8][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.211 ; 1.433 ;; -2.164 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[11][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.011 ; 1.493 ;; -2.153 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[10][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.389 ; 2.192 ;; -2.153 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[30][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.143 ; 2.889 ;; -2.152 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[30][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.199 ; 2.954 ;; -2.142 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[5][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.009 ; 1.780 ;; -2.141 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[21][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.348 ; 3.092 ;; -2.114 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[30][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.184 ; 2.897 ;; -2.107 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[11][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.001 ; 1.418 ;; -2.102 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[24][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.628 ; 3.335 ;; -2.090 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[3][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.685 ; 0.716 ;; -2.080 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[11][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.215 ; 2.073 ;; -2.077 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[11][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.009 ; 1.439 ;; -2.067 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[3][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.343 ; 2.188 ;; -2.051 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[25][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.612 ; 3.262 ;; -2.039 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[21][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.333 ; 2.975 ;; -2.010 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[8][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.331 ; 1.849 ;; -2.006 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[15][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.332 ; 1.937 ;; -2.003 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[8][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.097 ; 1.430 ;; -1.998 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[29][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.995 ; 2.771 ;; -1.991 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[25][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.607 ; 3.197 ;; -1.991 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[24][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.647 ; 3.243 ;; -1.984 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[8][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.139 ; 1.895 ;; -1.977 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[25][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.605 ; 3.174 ;; -1.974 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[18][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.313 ; 2.885 ;; -1.973 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[20][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.722 ; 2.785 ;; -1.968 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[8][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.320 ; 2.073 ;; -1.962 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[29][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.853 ; 2.589 ;; -1.955 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[3][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.068 ; 1.492 ;; -1.945 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[7][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.487 ; 2.212 ;; -1.942 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[10][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.086 ; 1.491 ;; -1.937 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[10][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.342 ; 0.906 ;; -1.933 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[22][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.965 ; 2.671 ;; -1.932 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[0][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.914 ; 2.510 ;; -1.931 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[3][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.575 ; 0.981 ;; -1.929 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[25][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.775 ; 3.167 ;; -1.927 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[9][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.290 ; 1.858 ;; -1.927 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[24][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.643 ; 3.350 ;; -1.914 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[20][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.520 ; 3.027 ;; -1.906 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[16][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.929 ; 3.436 ;; -1.905 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[14][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.529 ; 1.762 ;; -1.903 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[25][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.581 ; 3.085 ;; -1.903 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[3][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.066 ; 1.439 ;; -1.901 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[13][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.094 ; 1.457 ;; -1.898 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[10][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.296 ; 1.266 ;; -1.889 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[11][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.294 ; 1.825 ;; -1.883 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[6][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.540 ; 2.208 ;; -1.882 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[5][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.073 ; 1.727 ;; -1.867 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[20][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.514 ; 2.974 ;; -1.866 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[3][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.575 ; 0.884 ;; -1.859 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[10][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.609 ; 1.023 ;; -1.858 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[13][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.330 ; 1.968 ;; -1.857 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[26][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.030 ; 2.488 ;; -1.854 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[25][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.630 ; 3.091 ;; -1.852 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[2][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.053 ; 1.570 ;; -1.851 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[26][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.020 ; 2.645 ;; -1.848 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[24][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.789 ; 3.416 ;; -1.840 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[16][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.910 ; 3.530 ;; -1.833 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[5][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.074 ; 1.506 ;; -1.832 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[18][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.497 ; 3.117 ;; -1.829 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[15][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.707 ; 2.184 ;; -1.829 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[22][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.108 ; 2.405 ;; -1.824 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[21][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.351 ; 2.948 ;; -1.823 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[7][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.289 ; 1.704 ;; -1.823 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[24][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.661 ; 3.257 ;; -1.816 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[18][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.332 ; 2.920 ;; -1.807 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[26][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.195 ; 2.787 ;; -1.803 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[29][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.979 ; 2.566 ;; -1.800 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[11][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.561 ; 0.904 ;; -1.794 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[2][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.549 ; 0.715 ;; -1.791 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[7][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.288 ; 1.679 ;; -1.788 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[7][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.293 ; 1.680 ;; -1.786 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[9][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.599 ; 1.847 ;; -1.785 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[20][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.545 ; 2.930 ;; -1.785 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[10][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.501 ; 2.072 ;; -1.784 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[21][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.341 ; 2.724 ;; -1.784 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[2][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.142 ; 1.105 ;; -1.780 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[26][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.195 ; 2.761 ;; -1.777 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[18][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.437 ; 2.992 ;; -1.775 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[21][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.348 ; 2.902 ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; -2.262 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 3.180 ;; -2.257 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 3.175 ;; -2.102 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 3.022 ;; -2.089 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 3.009 ;; -2.088 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 3.006 ;; -1.971 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.889 ;; -1.928 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.848 ;; -1.917 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.077 ; 2.838 ;; -1.912 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.077 ; 2.833 ;; -1.911 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.831 ;; -1.911 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.831 ;; -1.911 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.831 ;; -1.911 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.831 ;; -1.911 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.831 ;; -1.908 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.828 ;; -1.908 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.828 ;; -1.908 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.828 ;; -1.908 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.828 ;; -1.908 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.828 ;; -1.869 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.076 ; 2.791 ;; -1.867 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.076 ; 2.789 ;; -1.800 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.720 ;; -1.743 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.077 ; 2.664 ;; -1.737 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.657 ;; -1.737 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.657 ;; -1.737 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.657 ;; -1.737 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.657 ;; -1.737 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.657 ;; -1.718 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.636 ;; -1.695 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.076 ; 2.617 ;; -1.626 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.077 ; 2.547 ;; -1.617 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.537 ;; -1.617 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.537 ;; -1.617 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.537 ;; -1.617 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.537 ;; -1.617 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.537 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.601 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.520 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.596 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.515 ;; -1.576 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.076 ; 2.498 ;; -1.559 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.479 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.427 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.346 ;; -1.404 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.077 ; 2.325 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.315 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.315 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.315 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.315 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.315 ;; -1.364 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.282 ;; -1.359 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.277 ;; -1.354 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.076 ; 2.276 ;; -1.323 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.241 ;; -1.322 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.240 ;; -1.318 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.236 ;; -1.317 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.235 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.310 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.229 ;; -1.265 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.076 ; 2.187 ;; -1.218 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.078 ; 2.138 ;; -1.190 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.108 ;; -1.149 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.067 ;; -1.148 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.080 ; 2.066 ;; -1.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.039 ;; -1.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.039 ;; -1.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.039 ;; -1.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.039 ;; -1.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.039 ;; -1.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.039 ;; -1.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.039 ;; -1.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.079 ; 2.039 ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+--------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; -0.895 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.865 ;; -0.869 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.839 ;; -0.869 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.839 ;; -0.869 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.839 ;; -0.869 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.839 ;; -0.864 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.043 ; 1.839 ;; -0.810 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.780 ;; -0.771 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.741 ;; -0.763 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.733 ;; -0.744 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.714 ;; -0.686 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.656 ;; -0.678 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.648 ;; -0.652 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.622 ;; -0.639 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.609 ;; -0.550 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.520 ;; -0.550 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.520 ;; -0.550 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.520 ;; -0.550 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.520 ;; -0.545 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.043 ; 1.520 ;; -0.168 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.043 ; 1.143 ;; -0.162 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.043 ; 1.137 ;; -0.160 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.130 ;; -0.144 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 1.114 ;; -0.136 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.043 ; 1.111 ;; 0.159 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.048 ; 0.811 ;+--------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+--------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; -0.651 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.048 ; 1.621 ;; -0.496 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.048 ; 1.466 ;; -0.300 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.048 ; 1.270 ;; -0.209 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.048 ; 1.179 ;; -0.141 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.500 ; 1.002 ; 1.893 ;; -0.115 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.048 ; 1.085 ;; 0.002 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.048 ; 0.968 ;; 0.150 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.048 ; 0.820 ;; 0.150 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.048 ; 0.820 ;; 0.210 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.427 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; 1.002 ; 1.825 ;+--------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; -0.530 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.047 ; 1.501 ;; -0.356 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.047 ; 1.327 ;; -0.208 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.047 ; 1.179 ;; -0.182 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.047 ; 1.153 ;; -0.114 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.047 ; 1.085 ;; -0.075 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.500 ; 2.257 ; 3.082 ;; 0.005 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.047 ; 0.966 ;; 0.008 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.047 ; 0.963 ;; 0.150 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.047 ; 0.821 ;; 0.210 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.437 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; 2.257 ; 3.070 ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+--------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; -0.521 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.047 ; 1.492 ;; -0.356 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.047 ; 1.327 ;; -0.210 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.047 ; 1.181 ;; -0.168 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.047 ; 1.139 ;; -0.115 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.047 ; 1.086 ;; -0.042 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.500 ; 0.864 ; 1.656 ;; 0.007 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.047 ; 0.964 ;; 0.011 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.047 ; 0.960 ;; 0.150 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.047 ; 0.821 ;; 0.210 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.534 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; 0.864 ; 1.580 ;+--------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Setup: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+--------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; -0.190 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.046 ; 1.162 ;; -0.181 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.046 ; 1.153 ;; -0.152 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.046 ; 1.124 ;; -0.124 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.046 ; 1.096 ;; 0.004 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.046 ; 0.968 ;; 0.146 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.046 ; 0.826 ;; 0.149 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.046 ; 0.823 ;; 0.161 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.046 ; 0.811 ;; 0.210 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.765 ;; 0.210 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.765 ;+--------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'SW[16]' ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------+; -2.980 ; \random:rand_temp[14] ; T80se:z80_inst|DI_Reg[6] ; CLOCK_50 ; SW[16] ; 0.000 ; 4.980 ; 2.226 ;; -2.921 ; \random:rand_temp[14] ; T80se:z80_inst|T80:u0|IR[6] ; CLOCK_50 ; SW[16] ; 0.000 ; 4.980 ; 2.285 ;; -2.723 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 5.657 ;; -2.578 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 5.802 ;; -2.547 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.933 ; 5.834 ;; -2.440 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.933 ; 5.941 ;; -2.379 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 6.001 ;; -2.368 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 6.012 ;; -2.334 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.941 ; 6.055 ;; -2.285 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.933 ; 6.096 ;; -2.259 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 6.121 ;; -2.228 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.932 ; 5.652 ;; -2.052 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.932 ; 5.828 ;; -2.021 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.933 ; 5.860 ;; -1.968 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 6.412 ;; -1.945 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.933 ; 6.436 ;; -1.937 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.933 ; 5.944 ;; -1.841 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.941 ; 6.548 ;; -1.773 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.932 ; 6.107 ;; -1.761 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.932 ; 6.119 ;; -1.716 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.941 ; 6.173 ;; -1.702 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.932 ; 6.178 ;; -1.698 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.933 ; 6.183 ;; -1.501 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.932 ; 6.379 ;; -1.464 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 6.916 ;; -1.405 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.940 ; 6.983 ;; -1.333 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.933 ; 6.548 ;; -1.299 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.933 ; 7.082 ;; -1.284 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.285 ; 7.485 ;; -1.283 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.279 ; 7.480 ;; -1.283 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.279 ; 7.480 ;; -1.271 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.941 ; 7.118 ;; -1.271 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.920 ; 7.097 ;; -1.262 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.290 ; 7.512 ;; -1.261 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.284 ; 7.507 ;; -1.261 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.284 ; 7.507 ;; -1.247 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.290 ; 7.527 ;; -1.246 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.284 ; 7.522 ;; -1.246 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.284 ; 7.522 ;; -1.241 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.139 ;; -1.241 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.139 ;; -1.241 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.139 ;; -1.241 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.139 ;; -1.241 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.139 ;; -1.241 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.139 ;; -1.235 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.268 ; 7.517 ;; -1.234 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.262 ; 7.512 ;; -1.234 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.262 ; 7.512 ;; -1.229 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.941 ; 6.660 ;; -1.224 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.928 ; 7.152 ;; -1.199 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.286 ; 7.571 ;; -1.198 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.280 ; 7.566 ;; -1.198 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.280 ; 7.566 ;; -1.193 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.289 ; 7.580 ;; -1.192 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.283 ; 7.575 ;; -1.192 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.283 ; 7.575 ;; -1.183 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.283 ; 7.584 ;; -1.182 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.277 ; 7.579 ;; -1.182 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.277 ; 7.579 ;; -1.147 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.270 ; 7.607 ;; -1.146 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.264 ; 7.602 ;; -1.146 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.264 ; 7.602 ;; -1.141 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.273 ; 7.616 ;; -1.140 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.267 ; 7.611 ;; -1.140 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.267 ; 7.611 ;; -1.135 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.266 ; 7.615 ;; -1.109 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.272 ; 7.647 ;; -1.108 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 8.266 ; 7.642 ;; -1.082 ; \random:rand_temp[11] ; T80se:z80_inst|T80:u0|IR[3] ; CLOCK_50 ; SW[16] ; 0.000 ; 4.980 ; 4.124 ;; -1.080 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.929 ; 7.297 ;; -1.080 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.929 ; 7.297 ;; -1.080 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.929 ; 7.297 ;; -1.080 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.929 ; 7.297 ;; -1.080 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.929 ; 7.297 ;; -1.080 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.929 ; 7.297 ;; -1.080 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.929 ; 7.297 ;; -1.080 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.929 ; 7.297 ;; -1.072 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.871 ; 7.247 ;; -1.072 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.871 ; 7.247 ;; -1.072 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.871 ; 7.247 ;; -1.072 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.871 ; 7.247 ;; -1.072 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.871 ; 7.247 ;; -1.072 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.871 ; 7.247 ;; -1.072 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.871 ; 7.247 ;; -1.072 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.871 ; 7.247 ;; -1.071 ; T80se:z80_inst|MREQ_n ; LCDON_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.918 ; 7.295 ;; -1.054 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[8] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.326 ;; -1.054 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[9] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.326 ;; -1.054 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[10] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.326 ;; -1.054 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[11] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.326 ;; -1.054 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[12] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.326 ;; -1.054 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[13] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.326 ;; -1.054 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[14] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.326 ;; -1.054 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[15] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.932 ; 7.326 ;; -0.973 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER4_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.920 ; 7.395 ;; -0.973 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER4_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.920 ; 7.395 ;; -0.973 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER4_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.920 ; 7.395 ;; -0.973 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER4_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.920 ; 7.395 ;; -0.957 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER5_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.888 ; 7.379 ;; -0.957 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER5_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.888 ; 7.379 ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; -0.439 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 4.443 ; 4.432 ;; -0.021 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.500 ; 4.443 ; 4.350 ;; 0.403 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 0.669 ;; 0.408 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 0.674 ;; 0.432 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.079 ; 0.697 ;; 0.453 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.079 ; 0.718 ;; 0.453 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.079 ; 0.718 ;; 0.576 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.079 ; 0.841 ;; 0.577 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.079 ; 0.842 ;; 0.577 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.079 ; 0.842 ;; 0.579 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.079 ; 0.844 ;; 0.722 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.079 ; 0.987 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.169 ;; 0.946 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.212 ;; 0.953 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.219 ;; 1.072 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.081 ; 1.339 ;; 1.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.344 ;; 1.084 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.081 ; 1.351 ;; 1.089 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.355 ;; 1.094 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.081 ; 1.361 ;; 1.146 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.082 ; 1.414 ;; 1.190 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.456 ;; 1.222 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.488 ;; 1.225 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.491 ;; 1.269 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.535 ;; 1.269 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.535 ;; 1.311 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.081 ; 1.578 ;; 1.322 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.081 ; 1.589 ;; 1.390 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.656 ;; 1.390 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.656 ;; 1.547 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.813 ;; 1.547 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.813 ;; 1.550 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.816 ;; 1.558 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.824 ;; 1.558 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.824 ;; 1.558 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.824 ;; 1.558 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.824 ;; 1.559 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.825 ;; 1.628 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.894 ;; 1.671 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 1.937 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.760 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.026 ;; 1.773 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.081 ; 2.040 ;; 1.809 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.083 ; 2.078 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 1.889 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.155 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.010 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.276 ;; 2.011 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.084 ; 2.281 ;; 2.052 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.082 ; 2.320 ;; 2.052 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.083 ; 2.321 ;; 2.052 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.082 ; 2.320 ;; 2.052 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.082 ; 2.320 ;; 2.052 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.082 ; 2.320 ;; 2.052 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.082 ; 2.320 ;; 2.062 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.328 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.167 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.433 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.179 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.080 ; 2.445 ;; 2.235 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.082 ; 2.503 ;; 2.256 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.084 ; 2.526 ;; 2.297 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.082 ; 2.565 ;; 2.297 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.083 ; 2.566 ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'CLOCK_50' ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; -0.254 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 0.000 ; 3.061 ; 3.255 ;; -0.205 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_EN ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.273 ;; -0.198 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; 0.000 ; 3.048 ; 3.288 ;; -0.012 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_ON ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.042 ; 3.468 ;; 0.007 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; 0.000 ; 3.048 ; 3.493 ;; 0.071 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset1 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.549 ;; 0.071 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.549 ;; 0.071 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.549 ;; 0.071 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.549 ;; 0.071 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.549 ;; 0.071 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.549 ;; 0.073 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.return_home ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.551 ;; 0.082 ; clk_div:clkdiv_inst|clock_357Mhz_int ; clk_div:clkdiv_inst|clock_357Mhz ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.764 ; 1.032 ;; 0.132 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.hold ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.033 ; 3.603 ;; 0.132 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.return_home ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.033 ; 3.603 ;; 0.132 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.print_string ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.033 ; 3.603 ;; 0.132 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.print_string ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.033 ; 3.603 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.drop_LCD_EN ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset3 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.func_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.func_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_off ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_off ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_clear ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_clear ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_on ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_on ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.155 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_RS ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.034 ; 3.627 ;; 0.160 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[0] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.042 ; 3.640 ;; 0.160 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[1] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.042 ; 3.640 ;; 0.160 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[2] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.042 ; 3.640 ;; 0.160 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[3] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.042 ; 3.640 ;; 0.160 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[6] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.042 ; 3.640 ;; 0.173 ; clk_div:clkdiv_inst|clock_10Mhz_int ; clk_div:clkdiv_inst|clock_10MHz ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.764 ; 1.123 ;; 0.232 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; -0.500 ; 3.061 ; 3.241 ;; 0.280 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[3] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.758 ;; 0.280 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[4] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.758 ;; 0.280 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[1] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.758 ;; 0.280 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[2] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.758 ;; 0.280 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[0] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.040 ; 3.758 ;; 0.318 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_EN ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.040 ; 3.296 ;; 0.323 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_1Khz_int ; CLOCK_50 ; 0.000 ; 1.751 ; 2.280 ;; 0.326 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[4] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.033 ; 3.797 ;; 0.326 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[5] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 3.033 ; 3.797 ;; 0.341 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; -0.500 ; 3.048 ; 3.327 ;; 0.402 ; clk_div:clkdiv_inst|count_10Mhz[1] ; clk_div:clkdiv_inst|count_10Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; clk_div:clkdiv_inst|count_10Mhz[2] ; clk_div:clkdiv_inst|count_10Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; clk_div:clkdiv_inst|clock_10Mhz_int ; clk_div:clkdiv_inst|clock_10Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; clk_div:clkdiv_inst|count_357Mhz[1] ; clk_div:clkdiv_inst|count_357Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; clk_div:clkdiv_inst|count_357Mhz[2] ; clk_div:clkdiv_inst|count_357Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|count_357Mhz[3] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; clk_div:clkdiv_inst|clock_357Mhz_int ; clk_div:clkdiv_inst|clock_357Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; LCD:lcd_inst|next_command.line2 ; LCD:lcd_inst|next_command.line2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|next_command.mode_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|data_bus_value[7] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.669 ;; 0.403 ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|next_command.reset2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|next_command.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|next_command.func_set ; LCD:lcd_inst|next_command.func_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|next_command.display_off ; LCD:lcd_inst|next_command.display_off ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|next_command.display_clear ; LCD:lcd_inst|next_command.display_clear ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|next_command.display_on ; LCD:lcd_inst|next_command.display_on ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|data_bus_value[0] ; LCD:lcd_inst|data_bus_value[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|data_bus_value[6] ; LCD:lcd_inst|data_bus_value[6] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|LCD_RS ; LCD:lcd_inst|LCD_RS ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.403 ; LCD:lcd_inst|LCD_ON ; LCD:lcd_inst|LCD_ON ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.669 ;; 0.407 ; clk_div:clkdiv_inst|count_10Mhz[0] ; clk_div:clkdiv_inst|count_10Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.674 ;; 0.407 ; clk_div:clkdiv_inst|count_357Mhz[0] ; clk_div:clkdiv_inst|count_357Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.674 ;; 0.408 ; LCD:lcd_inst|state.drop_LCD_EN ; LCD:lcd_inst|state.drop_LCD_EN ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.674 ;; 0.428 ; LCD:lcd_inst|clk_count_400hz[19] ; LCD:lcd_inst|clk_count_400hz[19] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.694 ;; 0.436 ; LCD:lcd_inst|next_command.print_string ; LCD:lcd_inst|state.print_string ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.702 ;; 0.437 ; LCD:lcd_inst|state.reset2 ; LCD:lcd_inst|next_command.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.703 ;; 0.437 ; LCD:lcd_inst|state.func_set ; LCD:lcd_inst|next_command.display_off ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.703 ;; 0.442 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|count_357Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.709 ;; 0.445 ; clk_div:clkdiv_inst|count_357Mhz[1] ; clk_div:clkdiv_inst|count_357Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.712 ;; 0.445 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|clock_357Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.712 ;; 0.449 ; clk_div:clkdiv_inst|count_357Mhz[0] ; clk_div:clkdiv_inst|count_357Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.716 ;; 0.450 ; \random:rand_temp[4] ; \random:rand_temp[5] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.717 ;; 0.451 ; \random:rand_temp[11] ; \random:rand_temp[12] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.718 ;; 0.452 ; \random:rand_temp[3] ; \random:rand_temp[4] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.719 ;; 0.452 ; \random:rand_temp[0] ; \random:rand_temp[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.719 ;; 0.452 ; \random:rand_temp[1] ; \random:rand_temp[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.719 ;; 0.453 ; LCD:lcd_inst|state.display_clear ; LCD:lcd_inst|next_command.display_on ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.719 ;; 0.458 ; LCD:lcd_inst|state.display_off ; LCD:lcd_inst|next_command.display_clear ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.724 ;; 0.479 ; ps2_read ; ps2_ascii_reg1[3] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.746 ;; 0.480 ; ps2_read ; ps2_ascii_reg1[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.747 ;; 0.498 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; -0.500 ; 3.048 ; 3.484 ;; 0.504 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_ON ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.042 ; 3.484 ;; 0.536 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset1 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.040 ; 3.514 ;; 0.536 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.040 ; 3.514 ;; 0.536 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.040 ; 3.514 ;; 0.536 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.040 ; 3.514 ;; 0.536 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.040 ; 3.514 ;; 0.536 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.040 ; 3.514 ;; 0.541 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.return_home ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 3.040 ; 3.519 ;; 0.546 ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|state.reset2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.812 ;; 0.552 ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|state.mode_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.081 ; 0.819 ;; 0.555 ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|state.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.080 ; 0.821 ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------++--------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'T80se:z80_inst|MREQ_n' ;+-------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; 0.033 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[27][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.673 ; 2.236 ;; 0.037 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[19][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.810 ; 2.377 ;; 0.105 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[19][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.817 ; 2.452 ;; 0.152 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[19][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.820 ; 2.502 ;; 0.193 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[19][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.637 ; 2.360 ;; 0.305 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[19][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.636 ; 2.471 ;; 0.307 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[27][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.540 ; 2.377 ;; 0.312 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[19][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.804 ; 2.646 ;; 0.333 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[27][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.679 ; 2.542 ;; 0.373 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[27][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.547 ; 2.450 ;; 0.384 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[19][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.626 ; 2.540 ;; 0.395 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[23][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.977 ; 1.902 ;; 0.416 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[27][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.550 ; 2.496 ;; 0.456 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[19][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.621 ; 2.607 ;; 0.460 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[27][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.552 ; 2.542 ;; 0.479 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[23][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.967 ; 1.976 ;; 0.516 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[27][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.548 ; 2.594 ;; 0.561 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[31][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.737 ; 2.828 ;; 0.563 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[23][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.794 ; 1.887 ;; 0.585 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[28][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.313 ; 2.428 ;; 0.598 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[28][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.131 ; 2.259 ;; 0.620 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[20][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.433 ; 2.583 ;; 0.620 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[20][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.456 ; 2.606 ;; 0.629 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[7][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.188 ; 1.347 ;; 0.640 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[14][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.739 ; 1.909 ;; 0.647 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[28][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.299 ; 2.476 ;; 0.657 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[1][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.621 ; 0.808 ;; 0.665 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[27][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.515 ; 2.710 ;; 0.669 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[31][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.704 ; 2.903 ;; 0.673 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[15][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.470 ; 1.673 ;; 0.681 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[6][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.190 ; 1.401 ;; 0.686 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[6][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.238 ; 1.454 ;; 0.688 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[3][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.437 ; 0.655 ;; 0.693 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[28][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.173 ; 2.396 ;; 0.698 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[31][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.726 ; 2.954 ;; 0.700 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[28][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.146 ; 2.376 ;; 0.709 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[17][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.524 ; 2.763 ;; 0.709 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[12][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.543 ; 1.782 ;; 0.713 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[23][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.792 ; 2.035 ;; 0.715 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[30][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.046 ; 2.291 ;; 0.717 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[9][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.802 ; 1.049 ;; 0.717 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[4][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.136 ; 1.383 ;; 0.719 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[1][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.029 ; 1.278 ;; 0.728 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[9][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.965 ; 1.223 ;; 0.735 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[25][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.549 ; 2.814 ;; 0.744 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[23][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.962 ; 2.236 ;; 0.745 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[1][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.033 ; 1.308 ;; 0.757 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[15][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.526 ; 1.813 ;; 0.758 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[31][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.679 ; 2.967 ;; 0.762 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[15][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.617 ; 1.909 ;; 0.767 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[22][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.816 ; 2.113 ;; 0.774 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[31][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.746 ; 3.050 ;; 0.777 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[12][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.322 ; 1.629 ;; 0.781 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[17][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.506 ; 2.817 ;; 0.781 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[12][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.465 ; 1.776 ;; 0.784 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[18][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.230 ; 2.544 ;; 0.786 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[17][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.522 ; 2.838 ;; 0.791 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[20][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.422 ; 2.743 ;; 0.792 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[28][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.148 ; 2.470 ;; 0.806 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[15][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.521 ; 1.857 ;; 0.808 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[0][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.939 ; 1.277 ;; 0.813 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[21][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.062 ; 2.405 ;; 0.818 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[9][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.083 ; 1.431 ;; 0.818 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[14][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.428 ; 1.776 ;; 0.822 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[1][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.025 ; 1.377 ;; 0.822 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[12][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.508 ; 1.860 ;; 0.830 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[17][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.498 ; 2.858 ;; 0.831 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[16][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.862 ; 3.223 ;; 0.832 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[28][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.145 ; 2.507 ;; 0.833 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[6][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.429 ; 1.792 ;; 0.835 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[31][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.718 ; 3.083 ;; 0.840 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[31][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.734 ; 3.104 ;; 0.843 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[1][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.029 ; 1.402 ;; 0.843 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[31][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.751 ; 3.124 ;; 0.843 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[16][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.697 ; 3.070 ;; 0.844 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[1][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.022 ; 1.396 ;; 0.849 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[23][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.979 ; 2.358 ;; 0.849 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[6][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.401 ; 1.780 ;; 0.853 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[23][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.806 ; 2.189 ;; 0.857 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[9][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.028 ; 1.415 ;; 0.857 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[16][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.851 ; 3.238 ;; 0.858 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[1][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.022 ; 1.410 ;; 0.858 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[7][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.988 ; 1.376 ;; 0.858 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[6][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.249 ; 1.637 ;; 0.859 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[14][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.392 ; 1.781 ;; 0.860 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[7][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.388 ; 1.778 ;; 0.864 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[1][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.404 ; 0.798 ;; 0.873 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[16][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.868 ; 3.271 ;; 0.875 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[22][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.816 ; 2.221 ;; 0.881 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[16][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.706 ; 3.117 ;; 0.882 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[12][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.720 ; 2.132 ;; 0.896 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[28][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.151 ; 2.577 ;; 0.897 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[21][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.249 ; 2.676 ;; 0.899 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[14][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.244 ; 1.673 ;; 0.900 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[17][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.513 ; 2.943 ;; 0.909 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[9][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.218 ; 1.657 ;; 0.911 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[0][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.366 ; 0.807 ;; 0.912 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[6][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.402 ; 1.844 ;; 0.917 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[0][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.353 ; 0.800 ;; 0.918 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[17][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.519 ; 2.967 ;+-------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; 0.079 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 2.371 ; 2.868 ;; 0.440 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.440 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.445 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.674 ;; 0.469 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.047 ; 0.702 ;; 0.558 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; -0.500 ; 2.371 ; 2.847 ;; 0.638 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.047 ; 0.871 ;; 0.638 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.047 ; 0.871 ;; 0.688 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.047 ; 0.921 ;; 0.701 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.047 ; 0.934 ;; 0.806 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.047 ; 1.039 ;; 0.937 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.047 ; 1.170 ;; 1.086 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.047 ; 1.319 ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; 0.098 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.919 ; 1.435 ;; 0.440 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.440 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.445 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.043 ; 0.674 ;; 0.469 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.047 ; 0.702 ;; 0.636 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.047 ; 0.869 ;; 0.641 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; -0.500 ; 0.919 ; 1.478 ;; 0.644 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.047 ; 0.877 ;; 0.689 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.047 ; 0.922 ;; 0.704 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.047 ; 0.937 ;; 0.808 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.047 ; 1.041 ;; 0.937 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.047 ; 1.170 ;; 1.094 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.047 ; 1.327 ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; 0.189 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 1.064 ; 1.671 ;; 0.440 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.440 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.445 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.043 ; 0.674 ;; 0.468 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.048 ; 0.702 ;; 0.475 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.048 ; 0.709 ;; 0.631 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.048 ; 0.865 ;; 0.687 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.048 ; 0.921 ;; 0.725 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; -0.500 ; 1.064 ; 1.707 ;; 0.806 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.048 ; 1.040 ;; 0.851 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.048 ; 1.085 ;; 1.101 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.048 ; 1.335 ;; 1.240 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.048 ; 1.474 ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_25MHz' ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; 0.343 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.375 ; 0.940 ;; 0.402 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.669 ;; 0.402 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.669 ;; 0.429 ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync_out ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.696 ;; 0.455 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.374 ; 1.051 ;; 0.466 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.374 ; 1.062 ;; 0.602 ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|address_reg_a[0] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|out_address_reg_a[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.869 ;; 0.622 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 0.890 ;; 0.649 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.916 ;; 0.653 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.361 ; 1.236 ;; 0.660 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.927 ;; 0.661 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.928 ;; 0.666 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.933 ;; 0.671 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.938 ;; 0.677 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.944 ;; 0.680 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 0.947 ;; 0.704 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.388 ; 1.314 ;; 0.714 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.388 ; 1.324 ;; 0.743 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.010 ;; 0.747 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.359 ; 1.328 ;; 0.770 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.357 ; 1.349 ;; 0.771 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.358 ; 1.351 ;; 0.785 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.359 ; 1.366 ;; 0.787 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.055 ;; 0.793 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.360 ; 1.375 ;; 0.794 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.062 ;; 0.798 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.356 ; 1.376 ;; 0.800 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.068 ;; 0.803 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.360 ; 1.385 ;; 0.825 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.360 ; 1.407 ;; 0.828 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.095 ;; 0.830 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.360 ; 1.412 ;; 0.848 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.083 ; 1.117 ;; 0.890 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.158 ;; 0.915 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.183 ;; 0.915 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.183 ;; 0.933 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.069 ; 1.188 ;; 0.983 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.250 ;; 0.989 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.256 ;; 0.993 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.260 ;; 0.993 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.260 ;; 0.994 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.261 ;; 0.997 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.264 ;; 0.999 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.266 ;; 1.004 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.271 ;; 1.004 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.271 ;; 1.009 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.276 ;; 1.010 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.277 ;; 1.011 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.083 ; 1.280 ;; 1.013 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.280 ;; 1.019 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.360 ; 1.601 ;; 1.025 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.293 ;; 1.031 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.298 ;; 1.033 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.301 ;; 1.039 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.306 ;; 1.050 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.317 ;; 1.060 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.083 ; 1.329 ;; 1.067 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.360 ; 1.649 ;; 1.072 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.340 ;; 1.079 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.346 ;; 1.084 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.352 ;; 1.102 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.369 ;; 1.104 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.371 ;; 1.104 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.371 ;; 1.105 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.372 ;; 1.106 ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_h ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.374 ;; 1.110 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.377 ;; 1.111 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.358 ; 1.691 ;; 1.114 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.381 ;; 1.115 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.382 ;; 1.117 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.385 ;; 1.123 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.390 ;; 1.125 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.392 ;; 1.130 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.397 ;; 1.134 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.401 ;; 1.135 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.402 ;; 1.136 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.357 ; 1.715 ;; 1.140 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.357 ; 1.719 ;; 1.191 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.070 ; 1.447 ;; 1.216 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.344 ; 1.782 ;; 1.225 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.343 ; 1.790 ;; 1.238 ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync_out ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.088 ; 1.512 ;; 1.241 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.508 ;; 1.244 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.511 ;; 1.244 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.082 ; 1.512 ;; 1.255 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.344 ; 1.821 ;; 1.256 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.523 ;; 1.256 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.081 ; 1.523 ;; 1.260 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.342 ; 1.824 ;; 1.263 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.344 ; 1.829 ;; 1.266 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.344 ; 1.832 ;; 1.280 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.083 ; 1.549 ;; 1.302 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.342 ; 1.866 ;; 1.308 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.342 ; 1.872 ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; 0.440 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.440 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.440 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.669 ;; 0.445 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.674 ;; 0.464 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.046 ; 0.696 ;; 0.471 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.046 ; 0.703 ;; 0.473 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.046 ; 0.705 ;; 0.641 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.046 ; 0.873 ;; 0.690 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.046 ; 0.922 ;; 0.701 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.046 ; 0.933 ;; 0.743 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.046 ; 0.975 ;; 0.753 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.046 ; 0.985 ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_100Hz' ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; 0.454 ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; 0.046 ; 0.686 ;; 0.667 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; 0.046 ; 0.899 ;; 5.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.424 ;; 5.120 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.424 ;; 5.155 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.894 ; 2.457 ;; 5.155 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.894 ; 2.457 ;; 5.218 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.522 ;; 5.218 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.522 ;; 5.264 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.568 ;; 5.264 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.568 ;; 5.268 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.893 ; 2.571 ;; 5.268 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.893 ; 2.571 ;; 5.293 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.597 ;; 5.293 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.597 ;; 5.322 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.626 ;; 5.322 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 2.626 ;; 5.748 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 3.052 ;; 5.748 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.892 ; 3.052 ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; 0.472 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.043 ; 0.701 ;; 0.477 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 0.711 ;; 0.675 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.043 ; 0.904 ;; 0.686 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.043 ; 0.915 ;; 0.693 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.043 ; 0.922 ;; 0.697 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.043 ; 0.926 ;; 0.725 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 0.959 ;; 0.781 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.015 ;; 0.987 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.221 ;; 0.996 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.230 ;; 1.001 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.235 ;; 1.008 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.242 ;; 1.009 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.243 ;; 1.013 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.247 ;; 1.108 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.342 ;; 1.113 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.347 ;; 1.122 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.356 ;; 1.127 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.361 ;; 1.185 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.419 ;; 1.185 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.419 ;; 1.185 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.419 ;; 1.185 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.419 ;; 1.485 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.719 ;; 1.485 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.719 ;; 1.485 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.048 ; 1.719 ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Hold: 'LCD:lcd_inst|clk_400hz_enable' ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; 2.342 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.135 ; 1.413 ;; 2.352 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.911 ; 1.647 ;; 2.373 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.126 ; 1.453 ;; 2.426 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.147 ; 1.485 ;; 2.493 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.232 ; 1.467 ;; 2.545 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.232 ; 1.519 ;; 2.659 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.252 ; 1.613 ;; 2.661 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.911 ; 1.956 ;; 2.668 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.126 ; 1.748 ;; 2.683 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.911 ; 1.978 ;; 2.713 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.230 ; 1.689 ;; 2.746 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.208 ; 1.744 ;; 2.764 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.135 ; 1.835 ;; 2.811 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.230 ; 1.787 ;; 2.852 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.147 ; 1.911 ;; 2.895 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.911 ; 2.190 ;; 2.964 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.232 ; 1.938 ;; 2.981 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.147 ; 2.040 ;; 3.081 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.208 ; 2.079 ;; 3.094 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.147 ; 2.153 ;; 3.117 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.135 ; 2.188 ;; 3.129 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.208 ; 2.127 ;; 3.186 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.230 ; 2.162 ;; 3.191 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.126 ; 2.271 ;; 3.201 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.208 ; 2.199 ;; 3.223 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.126 ; 2.303 ;; 3.273 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.911 ; 2.568 ;; 3.293 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.252 ; 2.247 ;; 3.319 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.147 ; 2.378 ;; 3.320 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.232 ; 2.294 ;; 3.369 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.252 ; 2.323 ;; 3.420 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.230 ; 2.396 ;; 3.436 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.135 ; 2.507 ;; 3.446 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.252 ; 2.400 ;; 3.465 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.135 ; 2.536 ;; 3.499 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.252 ; 2.453 ;; 3.540 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.232 ; 2.514 ;; 3.544 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.208 ; 2.542 ;; 3.671 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.230 ; 2.647 ;; 3.702 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.126 ; 2.782 ;; 8.204 ; lcdvram[3][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.222 ; 2.678 ;; 8.220 ; lcdvram[11][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.344 ; 2.572 ;; 8.458 ; lcdvram[11][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.187 ; 1.967 ;; 8.526 ; lcdvram[15][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.705 ; 1.517 ;; 8.553 ; lcdvram[3][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.653 ; 2.596 ;; 8.573 ; lcdvram[3][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.549 ; 2.720 ;; 8.578 ; lcdvram[8][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.808 ; 2.466 ;; 8.580 ; lcdvram[10][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.179 ; 2.097 ;; 8.634 ; lcdvram[10][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.296 ; 3.034 ;; 8.682 ; lcdvram[2][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.677 ; 2.701 ;; 8.701 ; lcdvram[8][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.059 ; 2.338 ;; 8.727 ; lcdvram[3][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.192 ; 2.231 ;; 8.766 ; lcdvram[5][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.197 ; 2.265 ;; 8.769 ; lcdvram[15][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.612 ; 1.853 ;; 8.781 ; lcdvram[9][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.225 ; 2.252 ;; 8.850 ; lcdvram[3][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.902 ; 2.644 ;; 8.853 ; lcdvram[13][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.992 ; 2.557 ;; 8.877 ; lcdvram[14][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.847 ; 1.726 ;; 8.905 ; lcdvram[5][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.360 ; 2.241 ;; 8.929 ; lcdvram[2][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.473 ; 3.152 ;; 8.934 ; lcdvram[8][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.210 ; 2.420 ;; 8.936 ; lcdvram[11][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.441 ; 2.191 ;; 8.951 ; lcdvram[0][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.938 ; 2.709 ;; 8.958 ; lcdvram[29][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.884 ; 1.770 ;; 8.959 ; lcdvram[9][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.271 ; 2.384 ;; 9.000 ; lcdvram[5][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.250 ; 2.446 ;; 9.037 ; lcdvram[2][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.977 ; 2.756 ;; 9.061 ; lcdvram[5][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.395 ; 2.362 ;; 9.072 ; lcdvram[6][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.822 ; 1.946 ;; 9.075 ; lcdvram[12][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.484 ; 2.287 ;; 9.094 ; lcdvram[10][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.727 ; 2.063 ;; 9.123 ; lcdvram[4][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.876 ; 2.943 ;; 9.134 ; lcdvram[15][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.456 ; 2.374 ;; 9.146 ; lcdvram[9][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.260 ; 2.582 ;; 9.150 ; lcdvram[13][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.218 ; 2.628 ;; 9.174 ; lcdvram[6][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.811 ; 2.059 ;; 9.184 ; lcdvram[1][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.180 ; 2.700 ;; 9.185 ; lcdvram[14][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.727 ; 2.154 ;; 9.187 ; lcdvram[10][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.856 ; 3.027 ;; 9.189 ; lcdvram[6][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.783 ; 2.102 ;; 9.192 ; lcdvram[9][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.529 ; 2.359 ;; 9.194 ; lcdvram[14][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.842 ; 2.048 ;; 9.214 ; lcdvram[5][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.300 ; 2.610 ;; 9.219 ; lcdvram[7][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.730 ; 2.185 ;; 9.236 ; lcdvram[29][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -7.119 ; 1.813 ;; 9.251 ; lcdvram[15][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.923 ; 2.024 ;; 9.251 ; lcdvram[8][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.288 ; 2.659 ;; 9.255 ; lcdvram[5][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.979 ; 2.972 ;; 9.269 ; lcdvram[8][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.546 ; 2.419 ;; 9.279 ; lcdvram[10][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.617 ; 2.358 ;; 9.279 ; lcdvram[7][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.791 ; 2.184 ;; 9.281 ; lcdvram[7][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.413 ; 2.564 ;; 9.285 ; lcdvram[10][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.840 ; 3.141 ;; 9.289 ; lcdvram[5][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.375 ; 2.610 ;; 9.321 ; lcdvram[13][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.322 ; 2.695 ;; 9.335 ; lcdvram[5][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.207 ; 2.824 ;; 9.337 ; lcdvram[11][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.135 ; 2.898 ;; 9.348 ; lcdvram[2][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.311 ; 2.733 ;; 9.351 ; lcdvram[15][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -7.011 ; 2.036 ;; 9.363 ; lcdvram[3][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.541 ; 3.518 ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Recovery: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; -2.630 ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ; CLOCK_50 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 1.000 ; -1.694 ; 1.934 ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Removal: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; 3.090 ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ; CLOCK_50 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 0.000 ; -1.505 ; 1.791 ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'SW[16]' ;+--------+--------------+----------------+------------+--------+------------+---------------------------------------------------------------------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------+--------+------------+---------------------------------------------------------------------------------------------------------------+; -3.000 ; 1.000 ; 4.000 ; Port Rate ; SW[16] ; Rise ; SW[16] ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_we_reg ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_datain_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_we_reg ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; LCDON_reg ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|IORQ_n ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|MREQ_n ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|RD_n ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[10] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[11] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[12] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[13] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[14] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[15] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Alternate ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Arith16_r ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BTR_r ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[1] ;+--------+--------------+----------------+------------+--------+------------+---------------------------------------------------------------------------------------------------------------++-----------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'CLOCK_50' ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------+; -3.000 ; 1.000 ; 4.000 ; Port Rate ; CLOCK_50 ; Rise ; CLOCK_50 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_EN ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_ON ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_RS ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_400hz_enable ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[10] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[11] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[12] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[13] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[14] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[15] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[16] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[17] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[18] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[19] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_clear ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_off ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_on ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.func_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.line2 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.mode_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.print_string ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.reset2 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.reset3 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.return_home ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_clear ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_off ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_on ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.drop_LCD_EN ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.func_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.hold ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.line2 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.mode_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.print_string ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset1 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset2 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset3 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.return_home ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[10] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[11] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[12] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[13] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[14] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[15] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_100Hz ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_10MHz ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_10Mhz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_25Mhz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_357Mhz ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_357Mhz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_read ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25MHz' ;+--------+--------------+----------------+-----------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+-----------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------+; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a13 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a13~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9~porta_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ;; -2.693 ; 1.000 ; 3.693 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|address_reg_a[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|out_address_reg_a[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync_out ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync_out ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_h ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_v ;; 0.221 ; 0.456 ; 0.235 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ;; 0.221 ; 0.456 ; 0.235 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ;; 0.224 ; 0.459 ; 0.235 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ;; 0.224 ; 0.459 ; 0.235 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5 ;; 0.224 ; 0.459 ; 0.235 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8 ;; 0.225 ; 0.460 ; 0.235 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12~porta_address_reg0 ;; 0.225 ; 0.460 ; 0.235 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ;+--------+--------------+----------------+-----------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; 0.286 ; 0.474 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.287 ; 0.475 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; 0.302 ; 0.522 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.435 ; 0.435 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|inclk[0] ;; 0.435 ; 0.435 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|outclk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[0]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[1]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[2]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[3]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|READ_CHAR|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[0]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[1]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[2]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[3]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[4]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[5]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[6]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[7]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[8]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[0]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[1]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[2]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[3]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[4]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[6]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[7]|clk ;; 0.440 ; 0.440 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[5]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered|q ;; 0.558 ; 0.558 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[0]|clk ;; 0.558 ; 0.558 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[1]|clk ;; 0.558 ; 0.558 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[2]|clk ;; 0.558 ; 0.558 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[3]|clk ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------++--------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'LCD:lcd_inst|clk_400hz_enable' ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.257 ; 0.477 ; 0.220 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; 0.279 ; 0.499 ; 0.220 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; 0.282 ; 0.502 ; 0.220 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.292 ; 0.512 ; 0.220 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; 0.292 ; 0.480 ; 0.188 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; 0.294 ; 0.514 ; 0.220 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; 0.294 ; 0.514 ; 0.220 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; 0.294 ; 0.482 ; 0.188 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; 0.294 ; 0.482 ; 0.188 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; 0.295 ; 0.483 ; 0.188 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; 0.296 ; 0.516 ; 0.220 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; 0.297 ; 0.485 ; 0.188 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; 0.298 ; 0.518 ; 0.220 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; 0.307 ; 0.495 ; 0.188 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.310 ; 0.498 ; 0.188 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; 0.334 ; 0.522 ; 0.188 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; 0.445 ; 0.445 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6]|clk ;; 0.447 ; 0.447 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1]|clk ;; 0.447 ; 0.447 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5]|clk ;; 0.448 ; 0.448 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0]|clk ;; 0.450 ; 0.450 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3]|clk ;; 0.460 ; 0.460 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7]|clk ;; 0.463 ; 0.463 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2]|clk ;; 0.487 ; 0.487 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; lcd_inst|clk_400hz_enable|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; lcd_inst|clk_400hz_enable|q ;; 0.513 ; 0.513 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4]|clk ;; 0.535 ; 0.535 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2]|clk ;; 0.538 ; 0.538 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7]|clk ;; 0.548 ; 0.548 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3]|clk ;; 0.550 ; 0.550 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0]|clk ;; 0.550 ; 0.550 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1]|clk ;; 0.552 ; 0.552 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5]|clk ;; 0.554 ; 0.554 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6]|clk ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.273 ; 0.461 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; 0.273 ; 0.461 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; 0.273 ; 0.461 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; 0.273 ; 0.461 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; 0.273 ; 0.461 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; 0.273 ; 0.461 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.315 ; 0.535 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; 0.315 ; 0.535 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; 0.315 ; 0.535 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; 0.315 ; 0.535 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; 0.315 ; 0.535 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; 0.315 ; 0.535 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.426 ; 0.426 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|clk ;; 0.426 ; 0.426 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[0]|clk ;; 0.426 ; 0.426 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[1]|clk ;; 0.426 ; 0.426 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[2]|clk ;; 0.426 ; 0.426 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[3]|clk ;; 0.426 ; 0.426 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[4]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_25Mhz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_25Mhz_int|q ;; 0.571 ; 0.571 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|clk ;; 0.571 ; 0.571 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[0]|clk ;; 0.571 ; 0.571 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[1]|clk ;; 0.571 ; 0.571 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[2]|clk ;; 0.571 ; 0.571 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[3]|clk ;; 0.571 ; 0.571 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[4]|clk ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.288 ; 0.476 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; 0.288 ; 0.476 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; 0.288 ; 0.476 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; 0.288 ; 0.476 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.301 ; 0.521 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; 0.301 ; 0.521 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; 0.301 ; 0.521 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; 0.301 ; 0.521 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.441 ; 0.441 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|clk ;; 0.441 ; 0.441 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[0]|clk ;; 0.441 ; 0.441 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[1]|clk ;; 0.441 ; 0.441 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_100Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_100Khz_int|q ;; 0.557 ; 0.557 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|clk ;; 0.557 ; 0.557 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[0]|clk ;; 0.557 ; 0.557 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[1]|clk ;; 0.557 ; 0.557 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[2]|clk ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.263 ; 0.451 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; 0.263 ; 0.451 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; 0.263 ; 0.451 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; 0.263 ; 0.451 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.324 ; 0.544 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; 0.324 ; 0.544 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; 0.324 ; 0.544 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; 0.324 ; 0.544 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.416 ; 0.416 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|clk ;; 0.416 ; 0.416 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[0]|clk ;; 0.416 ; 0.416 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[1]|clk ;; 0.416 ; 0.416 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|q ;; 0.580 ; 0.580 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|clk ;; 0.580 ; 0.580 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[0]|clk ;; 0.580 ; 0.580 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[1]|clk ;; 0.580 ; 0.580 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[2]|clk ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.283 ; 0.503 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; 0.283 ; 0.503 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; 0.283 ; 0.503 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; 0.283 ; 0.503 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.306 ; 0.494 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; 0.306 ; 0.494 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; 0.306 ; 0.494 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; 0.306 ; 0.494 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_100hz_int|clk ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[0]|clk ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[1]|clk ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|q ;; 0.539 ; 0.539 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_100hz_int|clk ;; 0.539 ; 0.539 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[0]|clk ;; 0.539 ; 0.539 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[1]|clk ;; 0.539 ; 0.539 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[2]|clk ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------++----------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.285 ; 0.505 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; 0.285 ; 0.505 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; 0.285 ; 0.505 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; 0.285 ; 0.505 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.304 ; 0.492 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; 0.304 ; 0.492 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; 0.304 ; 0.492 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; 0.304 ; 0.492 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.457 ; 0.457 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_100Khz_int|clk ;; 0.457 ; 0.457 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[0]|clk ;; 0.457 ; 0.457 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[1]|clk ;; 0.457 ; 0.457 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|q ;; 0.541 ; 0.541 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_100Khz_int|clk ;; 0.541 ; 0.541 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[0]|clk ;; 0.541 ; 0.541 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[1]|clk ;; 0.541 ; 0.541 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[2]|clk ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------++----------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Hz' ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.277 ; 0.497 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; 0.277 ; 0.497 ; 0.220 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.312 ; 0.500 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; 0.312 ; 0.500 ; 0.188 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.465 ; 0.465 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[0]|clk ;; 0.465 ; 0.465 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[1]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; clkdiv_inst|clock_100Hz|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; clkdiv_inst|clock_100Hz|q ;; 0.533 ; 0.533 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[0]|clk ;; 0.533 ; 0.533 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[1]|clk ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.286 ; 0.506 ; 0.220 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.303 ; 0.491 ; 0.188 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.456 ; 0.456 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|scan_ready|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|q ;; 0.542 ; 0.542 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|scan_ready|clk ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------++----------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 85C Model Minimum Pulse Width: 'T80se:z80_inst|MREQ_n' ;+-------+--------------+----------------+------------------+-----------------------+------------+----------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+-------+--------------+----------------+------------------+-----------------------+------------+----------------------+; 0.320 ; 0.320 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][3] ;; 0.321 ; 0.321 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][5] ;; 0.327 ; 0.327 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][3]|dataa ;; 0.332 ; 0.332 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][4] ;; 0.332 ; 0.332 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][0] ;; 0.332 ; 0.332 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][2] ;; 0.332 ; 0.332 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][4] ;; 0.332 ; 0.332 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][6] ;; 0.333 ; 0.333 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][0] ;; 0.336 ; 0.336 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][3] ;; 0.339 ; 0.339 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][0]|datac ;; 0.339 ; 0.339 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][2]|datac ;; 0.339 ; 0.339 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][4]|datac ;; 0.339 ; 0.339 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][6]|datac ;; 0.339 ; 0.339 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[8][7] ;; 0.340 ; 0.340 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][0]|datac ;; 0.341 ; 0.341 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][6] ;; 0.342 ; 0.342 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[1][3] ;; 0.345 ; 0.345 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][6]|datac ;; 0.350 ; 0.350 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][0] ;; 0.350 ; 0.350 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][5]|datad ;; 0.351 ; 0.351 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][7] ;; 0.352 ; 0.352 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][1] ;; 0.352 ; 0.352 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[13][4] ;; 0.355 ; 0.355 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[1][3]|datab ;; 0.358 ; 0.358 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][6] ;; 0.358 ; 0.358 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][6] ;; 0.361 ; 0.361 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][5] ;; 0.361 ; 0.361 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][4]|datad ;; 0.361 ; 0.361 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][0] ;; 0.361 ; 0.361 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][2] ;; 0.362 ; 0.362 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][4] ;; 0.362 ; 0.362 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][5] ;; 0.362 ; 0.362 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][6] ;; 0.364 ; 0.364 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[13][7] ;; 0.364 ; 0.364 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][0]|dataa ;; 0.365 ; 0.365 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][7]|dataa ;; 0.366 ; 0.366 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[2][6]|dataa ;; 0.366 ; 0.366 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][7] ;; 0.367 ; 0.367 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[2][2]|dataa ;; 0.368 ; 0.368 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][1] ;; 0.369 ; 0.369 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][2]|datab ;; 0.369 ; 0.369 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[8][7]|datad ;; 0.370 ; 0.370 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][3]|datab ;; 0.370 ; 0.370 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[9][2] ;; 0.371 ; 0.371 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][1]|datab ;; 0.371 ; 0.371 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][0] ;; 0.371 ; 0.371 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][2] ;; 0.373 ; 0.373 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][2] ;; 0.373 ; 0.373 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[11][6] ;; 0.373 ; 0.373 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][2] ;; 0.374 ; 0.374 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][1] ;; 0.374 ; 0.374 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][5] ;; 0.374 ; 0.374 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[9][2]|datac ;; 0.375 ; 0.375 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][1]|datac ;; 0.375 ; 0.375 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][0] ;; 0.375 ; 0.375 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][1] ;; 0.375 ; 0.375 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][7]|dataa ;; 0.377 ; 0.377 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][3] ;; 0.377 ; 0.377 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][4]|datab ;; 0.378 ; 0.378 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[0][5]|datab ;; 0.378 ; 0.378 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][4] ;; 0.378 ; 0.378 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[3][7] ;; 0.379 ; 0.379 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][3] ;; 0.379 ; 0.379 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][4] ;; 0.379 ; 0.379 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][5] ;; 0.379 ; 0.379 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][6] ;; 0.379 ; 0.379 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][7] ;; 0.381 ; 0.381 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; Decoder0~44|combout ;; 0.381 ; 0.381 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][3] ;; 0.381 ; 0.381 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[13][4]|datad ;; 0.381 ; 0.381 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][4] ;; 0.381 ; 0.381 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][1]|datac ;; 0.381 ; 0.381 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][5]|datac ;; 0.382 ; 0.382 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[9][1] ;; 0.382 ; 0.382 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[9][5] ;; 0.383 ; 0.383 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][5] ;; 0.383 ; 0.383 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[11][1] ;; 0.383 ; 0.383 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][3] ;; 0.383 ; 0.383 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][5] ;; 0.384 ; 0.384 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][6] ;; 0.385 ; 0.385 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][2]|dataa ;; 0.385 ; 0.385 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][3]|dataa ;; 0.385 ; 0.385 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[3][7]|datac ;; 0.385 ; 0.385 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][0] ;; 0.385 ; 0.385 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][4] ;; 0.385 ; 0.385 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][6] ;; 0.386 ; 0.386 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[9][3] ;; 0.387 ; 0.387 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][1] ;; 0.387 ; 0.387 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][2] ;; 0.387 ; 0.387 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][5]|datac ;; 0.387 ; 0.387 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][0] ;; 0.387 ; 0.387 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][1] ;; 0.388 ; 0.388 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][4] ;; 0.388 ; 0.388 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[0][6]|datad ;; 0.388 ; 0.388 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][3]|datac ;; 0.388 ; 0.388 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][2] ;; 0.388 ; 0.388 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][7] ;; 0.388 ; 0.388 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[8][6] ;; 0.389 ; 0.389 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[9][1]|datac ;+-------+--------------+----------------+------------------+-----------------------+------------+----------------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Setup Times ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------+; PS2_CLK ; CLOCK_50 ; 3.471 ; 4.087 ; Rise ; CLOCK_50 ;; SW[*] ; CLOCK_50 ; 4.964 ; 5.578 ; Rise ; CLOCK_50 ;; SW[17] ; CLOCK_50 ; 4.964 ; 5.578 ; Rise ; CLOCK_50 ;; KEY[*] ; SW[16] ; 3.535 ; 3.995 ; Rise ; SW[16] ;; KEY[0] ; SW[16] ; 3.535 ; 3.995 ; Rise ; SW[16] ;; KEY[1] ; SW[16] ; 3.009 ; 3.453 ; Rise ; SW[16] ;; KEY[2] ; SW[16] ; 2.703 ; 3.122 ; Rise ; SW[16] ;; KEY[3] ; SW[16] ; 1.443 ; 1.925 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 3.187 ; 3.715 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 3.187 ; 3.715 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 2.894 ; 3.578 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 2.040 ; 2.782 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 2.211 ; 2.887 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 1.721 ; 2.361 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 1.683 ; 2.273 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 2.375 ; 3.020 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 2.236 ; 2.880 ; Rise ; SW[16] ;; SW[*] ; SW[16] ; 3.486 ; 4.029 ; Rise ; SW[16] ;; SW[0] ; SW[16] ; 3.486 ; 4.029 ; Rise ; SW[16] ;; SW[1] ; SW[16] ; 2.069 ; 2.605 ; Rise ; SW[16] ;; SW[2] ; SW[16] ; 2.824 ; 3.455 ; Rise ; SW[16] ;; SW[3] ; SW[16] ; 1.900 ; 2.535 ; Rise ; SW[16] ;; SW[4] ; SW[16] ; 0.995 ; 1.562 ; Rise ; SW[16] ;; SW[5] ; SW[16] ; 1.318 ; 1.894 ; Rise ; SW[16] ;; SW[6] ; SW[16] ; 2.065 ; 2.672 ; Rise ; SW[16] ;; SW[7] ; SW[16] ; 1.980 ; 2.580 ; Rise ; SW[16] ;; SW[8] ; SW[16] ; 3.184 ; 3.696 ; Rise ; SW[16] ;; SW[9] ; SW[16] ; 2.968 ; 3.634 ; Rise ; SW[16] ;; SW[10] ; SW[16] ; 2.391 ; 3.038 ; Rise ; SW[16] ;; SW[11] ; SW[16] ; 3.066 ; 3.669 ; Rise ; SW[16] ;; SW[12] ; SW[16] ; 1.158 ; 1.696 ; Rise ; SW[16] ;; SW[13] ; SW[16] ; 1.949 ; 2.524 ; Rise ; SW[16] ;; SW[14] ; SW[16] ; 2.015 ; 2.595 ; Rise ; SW[16] ;; SW[15] ; SW[16] ; 2.192 ; 2.775 ; Rise ; SW[16] ;; PS2_DAT ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 2.663 ; 3.183 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[*] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 3.701 ; 4.343 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[17] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 3.701 ; 4.343 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Hold Times ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------+; PS2_CLK ; CLOCK_50 ; -2.953 ; -3.548 ; Rise ; CLOCK_50 ;; SW[*] ; CLOCK_50 ; -2.864 ; -3.366 ; Rise ; CLOCK_50 ;; SW[17] ; CLOCK_50 ; -2.864 ; -3.366 ; Rise ; CLOCK_50 ;; KEY[*] ; SW[16] ; -0.111 ; -0.612 ; Rise ; SW[16] ;; KEY[0] ; SW[16] ; -2.291 ; -2.754 ; Rise ; SW[16] ;; KEY[1] ; SW[16] ; -1.690 ; -2.169 ; Rise ; SW[16] ;; KEY[2] ; SW[16] ; -1.440 ; -1.862 ; Rise ; SW[16] ;; KEY[3] ; SW[16] ; -0.111 ; -0.612 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; -0.656 ; -1.224 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; -2.121 ; -2.612 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; -1.659 ; -2.290 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; -0.943 ; -1.620 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; -0.890 ; -1.540 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; -0.695 ; -1.311 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; -0.656 ; -1.224 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; -1.262 ; -1.863 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; -1.174 ; -1.784 ; Rise ; SW[16] ;; SW[*] ; SW[16] ; -0.035 ; -0.575 ; Rise ; SW[16] ;; SW[0] ; SW[16] ; -2.278 ; -2.795 ; Rise ; SW[16] ;; SW[1] ; SW[16] ; -0.915 ; -1.397 ; Rise ; SW[16] ;; SW[2] ; SW[16] ; -1.574 ; -2.161 ; Rise ; SW[16] ;; SW[3] ; SW[16] ; -0.598 ; -1.207 ; Rise ; SW[16] ;; SW[4] ; SW[16] ; -0.035 ; -0.575 ; Rise ; SW[16] ;; SW[5] ; SW[16] ; -0.325 ; -0.865 ; Rise ; SW[16] ;; SW[6] ; SW[16] ; -1.016 ; -1.567 ; Rise ; SW[16] ;; SW[7] ; SW[16] ; -1.007 ; -1.523 ; Rise ; SW[16] ;; SW[8] ; SW[16] ; -2.124 ; -2.592 ; Rise ; SW[16] ;; SW[9] ; SW[16] ; -1.699 ; -2.295 ; Rise ; SW[16] ;; SW[10] ; SW[16] ; -1.282 ; -1.857 ; Rise ; SW[16] ;; SW[11] ; SW[16] ; -1.690 ; -2.229 ; Rise ; SW[16] ;; SW[12] ; SW[16] ; -0.192 ; -0.703 ; Rise ; SW[16] ;; SW[13] ; SW[16] ; -0.935 ; -1.473 ; Rise ; SW[16] ;; SW[14] ; SW[16] ; -0.967 ; -1.494 ; Rise ; SW[16] ;; SW[15] ; SW[16] ; -1.210 ; -1.714 ; Rise ; SW[16] ;; PS2_DAT ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.601 ; -1.097 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[*] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -1.268 ; -1.830 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[17] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -1.268 ; -1.830 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------++-------------------------------------------------------------------------------------------------------------------+; Clock to Output Times ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; LCD_DATA[*] ; CLOCK_50 ; 12.101 ; 12.194 ; Rise ; CLOCK_50 ;; LCD_DATA[0] ; CLOCK_50 ; 11.677 ; 11.624 ; Rise ; CLOCK_50 ;; LCD_DATA[1] ; CLOCK_50 ; 10.413 ; 10.465 ; Rise ; CLOCK_50 ;; LCD_DATA[2] ; CLOCK_50 ; 12.101 ; 12.194 ; Rise ; CLOCK_50 ;; LCD_DATA[3] ; CLOCK_50 ; 12.028 ; 12.082 ; Rise ; CLOCK_50 ;; LCD_DATA[4] ; CLOCK_50 ; 11.205 ; 11.069 ; Rise ; CLOCK_50 ;; LCD_DATA[5] ; CLOCK_50 ; 11.922 ; 12.054 ; Rise ; CLOCK_50 ;; LCD_DATA[6] ; CLOCK_50 ; 9.577 ; 9.604 ; Rise ; CLOCK_50 ;; LCD_DATA[7] ; CLOCK_50 ; 11.973 ; 11.696 ; Rise ; CLOCK_50 ;; LCD_EN ; CLOCK_50 ; 12.660 ; 12.724 ; Rise ; CLOCK_50 ;; LCD_ON ; CLOCK_50 ; 12.355 ; 12.166 ; Rise ; CLOCK_50 ;; LCD_RS ; CLOCK_50 ; 10.888 ; 10.941 ; Rise ; CLOCK_50 ;; HEX0[*] ; SW[16] ; 16.668 ; 16.602 ; Rise ; SW[16] ;; HEX0[0] ; SW[16] ; 15.160 ; 15.106 ; Rise ; SW[16] ;; HEX0[1] ; SW[16] ; 16.514 ; 16.602 ; Rise ; SW[16] ;; HEX0[2] ; SW[16] ; 15.399 ; 15.255 ; Rise ; SW[16] ;; HEX0[3] ; SW[16] ; 14.486 ; 14.482 ; Rise ; SW[16] ;; HEX0[4] ; SW[16] ; 14.339 ; 14.258 ; Rise ; SW[16] ;; HEX0[5] ; SW[16] ; 16.668 ; 16.333 ; Rise ; SW[16] ;; HEX0[6] ; SW[16] ; 14.635 ; 14.648 ; Rise ; SW[16] ;; HEX1[*] ; SW[16] ; 17.065 ; 16.534 ; Rise ; SW[16] ;; HEX1[0] ; SW[16] ; 14.269 ; 14.121 ; Rise ; SW[16] ;; HEX1[1] ; SW[16] ; 15.510 ; 15.167 ; Rise ; SW[16] ;; HEX1[2] ; SW[16] ; 14.481 ; 14.545 ; Rise ; SW[16] ;; HEX1[3] ; SW[16] ; 15.065 ; 14.833 ; Rise ; SW[16] ;; HEX1[4] ; SW[16] ; 14.519 ; 14.445 ; Rise ; SW[16] ;; HEX1[5] ; SW[16] ; 17.065 ; 16.534 ; Rise ; SW[16] ;; HEX1[6] ; SW[16] ; 15.367 ; 15.681 ; Rise ; SW[16] ;; HEX2[*] ; SW[16] ; 15.489 ; 15.085 ; Rise ; SW[16] ;; HEX2[0] ; SW[16] ; 14.939 ; 14.585 ; Rise ; SW[16] ;; HEX2[1] ; SW[16] ; 13.890 ; 13.753 ; Rise ; SW[16] ;; HEX2[2] ; SW[16] ; 15.489 ; 15.085 ; Rise ; SW[16] ;; HEX2[3] ; SW[16] ; 15.424 ; 15.066 ; Rise ; SW[16] ;; HEX2[4] ; SW[16] ; 15.430 ; 14.970 ; Rise ; SW[16] ;; HEX2[5] ; SW[16] ; 14.231 ; 14.026 ; Rise ; SW[16] ;; HEX2[6] ; SW[16] ; 13.963 ; 14.083 ; Rise ; SW[16] ;; HEX3[*] ; SW[16] ; 17.577 ; 16.891 ; Rise ; SW[16] ;; HEX3[0] ; SW[16] ; 15.492 ; 15.147 ; Rise ; SW[16] ;; HEX3[1] ; SW[16] ; 14.992 ; 14.907 ; Rise ; SW[16] ;; HEX3[2] ; SW[16] ; 17.577 ; 16.891 ; Rise ; SW[16] ;; HEX3[3] ; SW[16] ; 14.618 ; 14.525 ; Rise ; SW[16] ;; HEX3[4] ; SW[16] ; 15.496 ; 15.368 ; Rise ; SW[16] ;; HEX3[5] ; SW[16] ; 14.818 ; 14.764 ; Rise ; SW[16] ;; HEX3[6] ; SW[16] ; 13.989 ; 14.036 ; Rise ; SW[16] ;; HEX4[*] ; SW[16] ; 14.796 ; 14.549 ; Rise ; SW[16] ;; HEX4[0] ; SW[16] ; 14.796 ; 14.549 ; Rise ; SW[16] ;; HEX4[1] ; SW[16] ; 14.639 ; 14.502 ; Rise ; SW[16] ;; HEX4[2] ; SW[16] ; 13.392 ; 13.168 ; Rise ; SW[16] ;; HEX4[3] ; SW[16] ; 13.337 ; 13.232 ; Rise ; SW[16] ;; HEX4[4] ; SW[16] ; 13.584 ; 13.492 ; Rise ; SW[16] ;; HEX4[5] ; SW[16] ; 13.439 ; 13.259 ; Rise ; SW[16] ;; HEX4[6] ; SW[16] ; 12.934 ; 13.005 ; Rise ; SW[16] ;; HEX5[*] ; SW[16] ; 15.859 ; 15.492 ; Rise ; SW[16] ;; HEX5[0] ; SW[16] ; 14.806 ; 14.597 ; Rise ; SW[16] ;; HEX5[1] ; SW[16] ; 15.859 ; 15.492 ; Rise ; SW[16] ;; HEX5[2] ; SW[16] ; 13.976 ; 13.818 ; Rise ; SW[16] ;; HEX5[3] ; SW[16] ; 14.280 ; 14.059 ; Rise ; SW[16] ;; HEX5[4] ; SW[16] ; 13.948 ; 13.840 ; Rise ; SW[16] ;; HEX5[5] ; SW[16] ; 14.741 ; 14.481 ; Rise ; SW[16] ;; HEX5[6] ; SW[16] ; 13.905 ; 13.996 ; Rise ; SW[16] ;; HEX6[*] ; SW[16] ; 14.441 ; 13.951 ; Rise ; SW[16] ;; HEX6[0] ; SW[16] ; 13.474 ; 13.255 ; Rise ; SW[16] ;; HEX6[1] ; SW[16] ; 12.329 ; 12.189 ; Rise ; SW[16] ;; HEX6[2] ; SW[16] ; 12.337 ; 12.136 ; Rise ; SW[16] ;; HEX6[3] ; SW[16] ; 13.793 ; 13.538 ; Rise ; SW[16] ;; HEX6[4] ; SW[16] ; 12.357 ; 12.209 ; Rise ; SW[16] ;; HEX6[5] ; SW[16] ; 14.441 ; 13.951 ; Rise ; SW[16] ;; HEX6[6] ; SW[16] ; 12.577 ; 12.738 ; Rise ; SW[16] ;; HEX7[*] ; SW[16] ; 12.973 ; 13.113 ; Rise ; SW[16] ;; HEX7[0] ; SW[16] ; 12.845 ; 12.622 ; Rise ; SW[16] ;; HEX7[1] ; SW[16] ; 12.493 ; 12.346 ; Rise ; SW[16] ;; HEX7[2] ; SW[16] ; 12.679 ; 12.468 ; Rise ; SW[16] ;; HEX7[3] ; SW[16] ; 12.700 ; 12.509 ; Rise ; SW[16] ;; HEX7[4] ; SW[16] ; 12.614 ; 12.463 ; Rise ; SW[16] ;; HEX7[5] ; SW[16] ; 12.563 ; 12.428 ; Rise ; SW[16] ;; HEX7[6] ; SW[16] ; 12.973 ; 13.113 ; Rise ; SW[16] ;; LEDG[*] ; SW[16] ; 17.819 ; 17.770 ; Rise ; SW[16] ;; LEDG[0] ; SW[16] ; 13.682 ; 13.745 ; Rise ; SW[16] ;; LEDG[1] ; SW[16] ; 17.819 ; 17.770 ; Rise ; SW[16] ;; LEDG[2] ; SW[16] ; 15.545 ; 15.513 ; Rise ; SW[16] ;; LEDG[3] ; SW[16] ; 14.186 ; 14.170 ; Rise ; SW[16] ;; LEDG[4] ; SW[16] ; 14.877 ; 14.788 ; Rise ; SW[16] ;; LEDG[5] ; SW[16] ; 13.644 ; 13.626 ; Rise ; SW[16] ;; LEDG[6] ; SW[16] ; 14.793 ; 14.689 ; Rise ; SW[16] ;; LEDG[7] ; SW[16] ; 15.167 ; 15.052 ; Rise ; SW[16] ;; LEDR[*] ; SW[16] ; 18.072 ; 18.145 ; Rise ; SW[16] ;; LEDR[0] ; SW[16] ; 13.418 ; 13.416 ; Rise ; SW[16] ;; LEDR[1] ; SW[16] ; 16.792 ; 16.571 ; Rise ; SW[16] ;; LEDR[2] ; SW[16] ; 18.072 ; 18.145 ; Rise ; SW[16] ;; LEDR[3] ; SW[16] ; 14.720 ; 14.793 ; Rise ; SW[16] ;; LEDR[4] ; SW[16] ; 13.956 ; 13.997 ; Rise ; SW[16] ;; LEDR[5] ; SW[16] ; 16.228 ; 16.040 ; Rise ; SW[16] ;; LEDR[6] ; SW[16] ; 14.393 ; 14.483 ; Rise ; SW[16] ;; LEDR[7] ; SW[16] ; 15.082 ; 14.973 ; Rise ; SW[16] ;; LEDR[8] ; SW[16] ; 15.090 ; 14.971 ; Rise ; SW[16] ;; LEDR[9] ; SW[16] ; 14.815 ; 14.984 ; Rise ; SW[16] ;; LEDR[10] ; SW[16] ; 14.881 ; 14.800 ; Rise ; SW[16] ;; LEDR[11] ; SW[16] ; 14.535 ; 14.455 ; Rise ; SW[16] ;; LEDR[12] ; SW[16] ; 14.762 ; 14.701 ; Rise ; SW[16] ;; LEDR[13] ; SW[16] ; 14.941 ; 14.851 ; Rise ; SW[16] ;; LEDR[14] ; SW[16] ; 15.196 ; 15.109 ; Rise ; SW[16] ;; LEDR[15] ; SW[16] ; 15.916 ; 15.945 ; Rise ; SW[16] ;; SRAM_ADDR[*] ; SW[16] ; 15.598 ; 16.153 ; Rise ; SW[16] ;; SRAM_ADDR[0] ; SW[16] ; 11.065 ; 11.106 ; Rise ; SW[16] ;; SRAM_ADDR[1] ; SW[16] ; 11.115 ; 11.175 ; Rise ; SW[16] ;; SRAM_ADDR[2] ; SW[16] ; 12.561 ; 12.711 ; Rise ; SW[16] ;; SRAM_ADDR[3] ; SW[16] ; 11.967 ; 12.049 ; Rise ; SW[16] ;; SRAM_ADDR[4] ; SW[16] ; 12.514 ; 12.623 ; Rise ; SW[16] ;; SRAM_ADDR[5] ; SW[16] ; 12.048 ; 12.151 ; Rise ; SW[16] ;; SRAM_ADDR[6] ; SW[16] ; 11.275 ; 11.359 ; Rise ; SW[16] ;; SRAM_ADDR[7] ; SW[16] ; 11.533 ; 11.701 ; Rise ; SW[16] ;; SRAM_ADDR[8] ; SW[16] ; 12.075 ; 12.077 ; Rise ; SW[16] ;; SRAM_ADDR[9] ; SW[16] ; 12.681 ; 12.349 ; Rise ; SW[16] ;; SRAM_ADDR[10] ; SW[16] ; 12.081 ; 12.080 ; Rise ; SW[16] ;; SRAM_ADDR[11] ; SW[16] ; 10.611 ; 10.691 ; Rise ; SW[16] ;; SRAM_ADDR[12] ; SW[16] ; 13.453 ; 13.208 ; Rise ; SW[16] ;; SRAM_ADDR[13] ; SW[16] ; 11.259 ; 11.247 ; Rise ; SW[16] ;; SRAM_ADDR[14] ; SW[16] ; 12.633 ; 12.614 ; Rise ; SW[16] ;; SRAM_ADDR[15] ; SW[16] ; 15.598 ; 16.153 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 16.090 ; 16.113 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 13.854 ; 13.885 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 14.381 ; 14.508 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 16.090 ; 16.113 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 14.943 ; 15.007 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 15.535 ; 15.596 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 14.532 ; 14.589 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 15.659 ; 15.622 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 13.605 ; 13.666 ; Rise ; SW[16] ;; SRAM_OE_N ; SW[16] ; 14.827 ; 14.846 ; Rise ; SW[16] ;; SRAM_WE_N ; SW[16] ; 13.161 ; 13.070 ; Rise ; SW[16] ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; ; 7.604 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; ; 8.134 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; 7.616 ; ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; 8.241 ; ; Fall ; T80se:z80_inst|MREQ_n ;; VGA_B[*] ; clk_div:clkdiv_inst|clock_25MHz ; 11.260 ; 11.126 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[4] ; clk_div:clkdiv_inst|clock_25MHz ; 10.554 ; 10.391 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[5] ; clk_div:clkdiv_inst|clock_25MHz ; 9.970 ; 9.845 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[6] ; clk_div:clkdiv_inst|clock_25MHz ; 11.260 ; 11.126 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[7] ; clk_div:clkdiv_inst|clock_25MHz ; 10.276 ; 10.132 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; 4.024 ; ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_HS ; clk_div:clkdiv_inst|clock_25MHz ; 8.702 ; 8.721 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_VS ; clk_div:clkdiv_inst|clock_25MHz ; 8.116 ; 8.093 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; ; 3.908 ; Fall ; clk_div:clkdiv_inst|clock_25MHz ;+----------------+---------------------------------+--------+--------+------------+---------------------------------++-------------------------------------------------------------------------------------------------------------------+; Minimum Clock to Output Times ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; LCD_DATA[*] ; CLOCK_50 ; 9.237 ; 9.259 ; Rise ; CLOCK_50 ;; LCD_DATA[0] ; CLOCK_50 ; 11.253 ; 11.199 ; Rise ; CLOCK_50 ;; LCD_DATA[1] ; CLOCK_50 ; 10.040 ; 10.086 ; Rise ; CLOCK_50 ;; LCD_DATA[2] ; CLOCK_50 ; 11.661 ; 11.747 ; Rise ; CLOCK_50 ;; LCD_DATA[3] ; CLOCK_50 ; 11.586 ; 11.641 ; Rise ; CLOCK_50 ;; LCD_DATA[4] ; CLOCK_50 ; 10.797 ; 10.669 ; Rise ; CLOCK_50 ;; LCD_DATA[5] ; CLOCK_50 ; 11.485 ; 11.615 ; Rise ; CLOCK_50 ;; LCD_DATA[6] ; CLOCK_50 ; 9.237 ; 9.259 ; Rise ; CLOCK_50 ;; LCD_DATA[7] ; CLOCK_50 ; 11.613 ; 11.332 ; Rise ; CLOCK_50 ;; LCD_EN ; CLOCK_50 ; 12.192 ; 12.257 ; Rise ; CLOCK_50 ;; LCD_ON ; CLOCK_50 ; 11.981 ; 11.784 ; Rise ; CLOCK_50 ;; LCD_RS ; CLOCK_50 ; 10.496 ; 10.543 ; Rise ; CLOCK_50 ;; HEX0[*] ; SW[16] ; 13.334 ; 13.271 ; Rise ; SW[16] ;; HEX0[0] ; SW[16] ; 14.216 ; 14.107 ; Rise ; SW[16] ;; HEX0[1] ; SW[16] ; 15.575 ; 15.604 ; Rise ; SW[16] ;; HEX0[2] ; SW[16] ; 14.478 ; 14.268 ; Rise ; SW[16] ;; HEX0[3] ; SW[16] ; 13.468 ; 13.436 ; Rise ; SW[16] ;; HEX0[4] ; SW[16] ; 13.334 ; 13.271 ; Rise ; SW[16] ;; HEX0[5] ; SW[16] ; 15.634 ; 15.316 ; Rise ; SW[16] ;; HEX0[6] ; SW[16] ; 13.608 ; 13.648 ; Rise ; SW[16] ;; HEX1[*] ; SW[16] ; 13.298 ; 13.171 ; Rise ; SW[16] ;; HEX1[0] ; SW[16] ; 13.298 ; 13.171 ; Rise ; SW[16] ;; HEX1[1] ; SW[16] ; 14.519 ; 14.158 ; Rise ; SW[16] ;; HEX1[2] ; SW[16] ; 13.594 ; 13.635 ; Rise ; SW[16] ;; HEX1[3] ; SW[16] ; 14.018 ; 13.804 ; Rise ; SW[16] ;; HEX1[4] ; SW[16] ; 13.508 ; 13.442 ; Rise ; SW[16] ;; HEX1[5] ; SW[16] ; 16.010 ; 15.502 ; Rise ; SW[16] ;; HEX1[6] ; SW[16] ; 14.380 ; 14.742 ; Rise ; SW[16] ;; HEX2[*] ; SW[16] ; 12.969 ; 12.805 ; Rise ; SW[16] ;; HEX2[0] ; SW[16] ; 13.952 ; 13.620 ; Rise ; SW[16] ;; HEX2[1] ; SW[16] ; 12.969 ; 12.805 ; Rise ; SW[16] ;; HEX2[2] ; SW[16] ; 14.502 ; 14.213 ; Rise ; SW[16] ;; HEX2[3] ; SW[16] ; 14.379 ; 14.017 ; Rise ; SW[16] ;; HEX2[4] ; SW[16] ; 14.404 ; 14.043 ; Rise ; SW[16] ;; HEX2[5] ; SW[16] ; 13.222 ; 13.041 ; Rise ; SW[16] ;; HEX2[6] ; SW[16] ; 12.969 ; 13.112 ; Rise ; SW[16] ;; HEX3[*] ; SW[16] ; 12.974 ; 13.067 ; Rise ; SW[16] ;; HEX3[0] ; SW[16] ; 14.481 ; 14.154 ; Rise ; SW[16] ;; HEX3[1] ; SW[16] ; 14.019 ; 13.908 ; Rise ; SW[16] ;; HEX3[2] ; SW[16] ; 16.586 ; 16.006 ; Rise ; SW[16] ;; HEX3[3] ; SW[16] ; 13.587 ; 13.506 ; Rise ; SW[16] ;; HEX3[4] ; SW[16] ; 13.966 ; 13.830 ; Rise ; SW[16] ;; HEX3[5] ; SW[16] ; 13.314 ; 13.239 ; Rise ; SW[16] ;; HEX3[6] ; SW[16] ; 12.974 ; 13.067 ; Rise ; SW[16] ;; HEX4[*] ; SW[16] ; 11.963 ; 12.083 ; Rise ; SW[16] ;; HEX4[0] ; SW[16] ; 13.819 ; 13.585 ; Rise ; SW[16] ;; HEX4[1] ; SW[16] ; 13.760 ; 13.521 ; Rise ; SW[16] ;; HEX4[2] ; SW[16] ; 12.510 ; 12.370 ; Rise ; SW[16] ;; HEX4[3] ; SW[16] ; 12.305 ; 12.115 ; Rise ; SW[16] ;; HEX4[4] ; SW[16] ; 12.655 ; 12.530 ; Rise ; SW[16] ;; HEX4[5] ; SW[16] ; 12.511 ; 12.295 ; Rise ; SW[16] ;; HEX4[6] ; SW[16] ; 11.963 ; 12.083 ; Rise ; SW[16] ;; HEX5[*] ; SW[16] ; 12.884 ; 12.866 ; Rise ; SW[16] ;; HEX5[0] ; SW[16] ; 13.816 ; 13.620 ; Rise ; SW[16] ;; HEX5[1] ; SW[16] ; 14.940 ; 14.532 ; Rise ; SW[16] ;; HEX5[2] ; SW[16] ; 13.046 ; 12.977 ; Rise ; SW[16] ;; HEX5[3] ; SW[16] ; 13.176 ; 12.965 ; Rise ; SW[16] ;; HEX5[4] ; SW[16] ; 12.964 ; 12.866 ; Rise ; SW[16] ;; HEX5[5] ; SW[16] ; 13.708 ; 13.470 ; Rise ; SW[16] ;; HEX5[6] ; SW[16] ; 12.884 ; 13.019 ; Rise ; SW[16] ;; HEX6[*] ; SW[16] ; 11.426 ; 11.297 ; Rise ; SW[16] ;; HEX6[0] ; SW[16] ; 12.535 ; 12.339 ; Rise ; SW[16] ;; HEX6[1] ; SW[16] ; 11.462 ; 11.301 ; Rise ; SW[16] ;; HEX6[2] ; SW[16] ; 11.462 ; 11.370 ; Rise ; SW[16] ;; HEX6[3] ; SW[16] ; 12.818 ; 12.540 ; Rise ; SW[16] ;; HEX6[4] ; SW[16] ; 11.426 ; 11.297 ; Rise ; SW[16] ;; HEX6[5] ; SW[16] ; 13.500 ; 13.028 ; Rise ; SW[16] ;; HEX6[6] ; SW[16] ; 11.617 ; 11.819 ; Rise ; SW[16] ;; HEX7[*] ; SW[16] ; 11.655 ; 11.490 ; Rise ; SW[16] ;; HEX7[0] ; SW[16] ; 11.942 ; 11.729 ; Rise ; SW[16] ;; HEX7[1] ; SW[16] ; 11.655 ; 11.545 ; Rise ; SW[16] ;; HEX7[2] ; SW[16] ; 11.822 ; 11.652 ; Rise ; SW[16] ;; HEX7[3] ; SW[16] ; 11.743 ; 11.581 ; Rise ; SW[16] ;; HEX7[4] ; SW[16] ; 11.681 ; 11.533 ; Rise ; SW[16] ;; HEX7[5] ; SW[16] ; 11.669 ; 11.490 ; Rise ; SW[16] ;; HEX7[6] ; SW[16] ; 12.004 ; 12.189 ; Rise ; SW[16] ;; LEDG[*] ; SW[16] ; 13.120 ; 13.100 ; Rise ; SW[16] ;; LEDG[0] ; SW[16] ; 13.153 ; 13.212 ; Rise ; SW[16] ;; LEDG[1] ; SW[16] ; 17.125 ; 17.076 ; Rise ; SW[16] ;; LEDG[2] ; SW[16] ; 14.944 ; 14.912 ; Rise ; SW[16] ;; LEDG[3] ; SW[16] ; 13.640 ; 13.623 ; Rise ; SW[16] ;; LEDG[4] ; SW[16] ; 14.302 ; 14.214 ; Rise ; SW[16] ;; LEDG[5] ; SW[16] ; 13.120 ; 13.100 ; Rise ; SW[16] ;; LEDG[6] ; SW[16] ; 14.222 ; 14.119 ; Rise ; SW[16] ;; LEDG[7] ; SW[16] ; 14.582 ; 14.470 ; Rise ; SW[16] ;; LEDR[*] ; SW[16] ; 12.903 ; 12.899 ; Rise ; SW[16] ;; LEDR[0] ; SW[16] ; 12.903 ; 12.899 ; Rise ; SW[16] ;; LEDR[1] ; SW[16] ; 16.140 ; 15.926 ; Rise ; SW[16] ;; LEDR[2] ; SW[16] ; 17.369 ; 17.437 ; Rise ; SW[16] ;; LEDR[3] ; SW[16] ; 14.150 ; 14.220 ; Rise ; SW[16] ;; LEDR[4] ; SW[16] ; 13.417 ; 13.455 ; Rise ; SW[16] ;; LEDR[5] ; SW[16] ; 15.599 ; 15.417 ; Rise ; SW[16] ;; LEDR[6] ; SW[16] ; 13.838 ; 13.922 ; Rise ; SW[16] ;; LEDR[7] ; SW[16] ; 14.499 ; 14.392 ; Rise ; SW[16] ;; LEDR[8] ; SW[16] ; 14.505 ; 14.389 ; Rise ; SW[16] ;; LEDR[9] ; SW[16] ; 14.297 ; 14.461 ; Rise ; SW[16] ;; LEDR[10] ; SW[16] ; 14.305 ; 14.226 ; Rise ; SW[16] ;; LEDR[11] ; SW[16] ; 13.973 ; 13.895 ; Rise ; SW[16] ;; LEDR[12] ; SW[16] ; 14.193 ; 14.132 ; Rise ; SW[16] ;; LEDR[13] ; SW[16] ; 14.363 ; 14.275 ; Rise ; SW[16] ;; LEDR[14] ; SW[16] ; 14.608 ; 14.523 ; Rise ; SW[16] ;; LEDR[15] ; SW[16] ; 15.353 ; 15.383 ; Rise ; SW[16] ;; SRAM_ADDR[*] ; SW[16] ; 10.205 ; 10.278 ; Rise ; SW[16] ;; SRAM_ADDR[0] ; SW[16] ; 10.638 ; 10.674 ; Rise ; SW[16] ;; SRAM_ADDR[1] ; SW[16] ; 10.686 ; 10.740 ; Rise ; SW[16] ;; SRAM_ADDR[2] ; SW[16] ; 12.076 ; 12.216 ; Rise ; SW[16] ;; SRAM_ADDR[3] ; SW[16] ; 11.505 ; 11.579 ; Rise ; SW[16] ;; SRAM_ADDR[4] ; SW[16] ; 12.031 ; 12.131 ; Rise ; SW[16] ;; SRAM_ADDR[5] ; SW[16] ; 11.583 ; 11.677 ; Rise ; SW[16] ;; SRAM_ADDR[6] ; SW[16] ; 10.840 ; 10.918 ; Rise ; SW[16] ;; SRAM_ADDR[7] ; SW[16] ; 11.089 ; 11.246 ; Rise ; SW[16] ;; SRAM_ADDR[8] ; SW[16] ; 11.610 ; 11.607 ; Rise ; SW[16] ;; SRAM_ADDR[9] ; SW[16] ; 12.268 ; 11.933 ; Rise ; SW[16] ;; SRAM_ADDR[10] ; SW[16] ; 11.616 ; 11.611 ; Rise ; SW[16] ;; SRAM_ADDR[11] ; SW[16] ; 10.205 ; 10.278 ; Rise ; SW[16] ;; SRAM_ADDR[12] ; SW[16] ; 13.010 ; 12.759 ; Rise ; SW[16] ;; SRAM_ADDR[13] ; SW[16] ; 10.827 ; 10.811 ; Rise ; SW[16] ;; SRAM_ADDR[14] ; SW[16] ; 12.141 ; 12.127 ; Rise ; SW[16] ;; SRAM_ADDR[15] ; SW[16] ; 14.809 ; 15.387 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 13.079 ; 13.133 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 13.318 ; 13.344 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 13.823 ; 13.941 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 15.465 ; 15.483 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 14.365 ; 14.423 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 14.932 ; 14.986 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 13.969 ; 14.019 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 15.051 ; 15.011 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 13.079 ; 13.133 ; Rise ; SW[16] ;; SRAM_OE_N ; SW[16] ; 11.817 ; 11.816 ; Rise ; SW[16] ;; SRAM_WE_N ; SW[16] ; 11.475 ; 11.366 ; Rise ; SW[16] ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; ; 7.317 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; ; 7.832 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; 7.335 ; ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; 7.930 ; ; Fall ; T80se:z80_inst|MREQ_n ;; VGA_B[*] ; clk_div:clkdiv_inst|clock_25MHz ; 9.585 ; 9.461 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[4] ; clk_div:clkdiv_inst|clock_25MHz ; 10.147 ; 9.987 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[5] ; clk_div:clkdiv_inst|clock_25MHz ; 9.585 ; 9.461 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[6] ; clk_div:clkdiv_inst|clock_25MHz ; 10.823 ; 10.691 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[7] ; clk_div:clkdiv_inst|clock_25MHz ; 9.880 ; 9.737 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; 3.887 ; ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_HS ; clk_div:clkdiv_inst|clock_25MHz ; 8.367 ; 8.381 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_VS ; clk_div:clkdiv_inst|clock_25MHz ; 7.806 ; 7.780 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; ; 3.772 ; Fall ; clk_div:clkdiv_inst|clock_25MHz ;+----------------+---------------------------------+--------+--------+------------+---------------------------------++--------------------------------------------------------------------------------------------+; Output Enable Times ;+-------------+-----------------------+--------+--------+------------+-----------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-----------------------+--------+--------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 12.862 ; 12.709 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 13.399 ; 13.246 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 12.868 ; 12.715 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 12.862 ; 12.709 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 12.862 ; 12.709 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 13.561 ; 13.408 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 13.285 ; 13.132 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 13.285 ; 13.132 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 12.973 ; 12.820 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 7.926 ; 7.773 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 8.463 ; 8.310 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 7.932 ; 7.779 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 7.926 ; 7.773 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 7.926 ; 7.773 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 8.625 ; 8.472 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 8.349 ; 8.196 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 8.349 ; 8.196 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 8.037 ; 7.884 ; Rise ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+--------+--------+------------+-----------------------++--------------------------------------------------------------------------------------------+; Minimum Output Enable Times ;+-------------+-----------------------+--------+--------+------------+-----------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-----------------------+--------+--------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 11.141 ; 10.988 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 11.656 ; 11.503 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 11.146 ; 10.993 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 11.141 ; 10.988 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 11.141 ; 10.988 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 11.811 ; 11.658 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 11.546 ; 11.393 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 11.546 ; 11.393 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 11.247 ; 11.094 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 7.607 ; 7.454 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 8.122 ; 7.969 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 7.612 ; 7.459 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 7.607 ; 7.454 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 7.607 ; 7.454 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 8.277 ; 8.124 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 8.012 ; 7.859 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 8.012 ; 7.859 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 7.713 ; 7.560 ; Rise ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+--------+--------+------------+-----------------------++--------------------------------------------------------------------------------------------------+; Output Disable Times ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 12.915 ; 13.068 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 13.412 ; 13.565 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 12.921 ; 13.074 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 12.915 ; 13.068 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 12.915 ; 13.068 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 13.555 ; 13.708 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 13.291 ; 13.444 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 13.291 ; 13.444 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 12.962 ; 13.115 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 7.995 ; 8.148 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 8.492 ; 8.645 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 8.001 ; 8.154 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 7.995 ; 8.148 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 7.995 ; 8.148 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 8.635 ; 8.788 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 8.371 ; 8.524 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 8.371 ; 8.524 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 8.042 ; 8.195 ; Fall ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+-----------+-----------+------------+-----------------------++--------------------------------------------------------------------------------------------------+; Minimum Output Disable Times ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 11.211 ; 11.364 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 11.688 ; 11.841 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 11.217 ; 11.370 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 11.211 ; 11.364 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 11.211 ; 11.364 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 11.825 ; 11.978 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 11.572 ; 11.725 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 11.572 ; 11.725 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 11.256 ; 11.409 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 7.666 ; 7.819 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 8.143 ; 8.296 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 7.672 ; 7.825 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 7.666 ; 7.819 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 7.666 ; 7.819 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 8.280 ; 8.433 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 8.027 ; 8.180 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 8.027 ; 8.180 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 7.711 ; 7.864 ; Fall ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+----------------------------------------------; Slow 1200mV 85C Model Metastability Report ;----------------------------------------------No synchronizer chains to report.+-------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Fmax Summary ;+-------------+-----------------+-------------------------------------------------------------+---------------------------------------------------------------+; Fmax ; Restricted Fmax ; Clock Name ; Note ;+-------------+-----------------+-------------------------------------------------------------+---------------------------------------------------------------+; 80.67 MHz ; 80.67 MHz ; SW[16] ; ;; 164.23 MHz ; 164.23 MHz ; clk_div:clkdiv_inst|clock_25MHz ; ;; 257.73 MHz ; 250.0 MHz ; CLOCK_50 ; limit due to minimum period restriction (max I/O toggle rate) ;; 336.59 MHz ; 336.59 MHz ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ;; 587.2 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_25Mhz_int ; limit due to minimum period restriction (tmin) ;; 675.68 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_1Mhz_int ; limit due to minimum period restriction (tmin) ;; 728.33 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_100Khz_int ; limit due to minimum period restriction (tmin) ;; 729.93 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_10Khz_int ; limit due to minimum period restriction (tmin) ;; 931.97 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_1Khz_int ; limit due to minimum period restriction (tmin) ;; 1024.59 MHz ; 437.64 MHz ; clk_div:clkdiv_inst|clock_100Hz ; limit due to minimum period restriction (tmin) ;+-------------+-----------------+-------------------------------------------------------------+---------------------------------------------------------------+This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.+---------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup Summary ;+-------------------------------------------------------------+---------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+---------+---------------+; SW[16] ; -11.396 ; -3408.529 ;; LCD:lcd_inst|clk_400hz_enable ; -10.487 ; -79.038 ;; CLOCK_50 ; -7.105 ; -160.429 ;; clk_div:clkdiv_inst|clock_25MHz ; -5.089 ; -225.410 ;; clk_div:clkdiv_inst|clock_100Hz ; -4.660 ; -9.320 ;; T80se:z80_inst|MREQ_n ; -2.600 ; -454.970 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -1.971 ; -33.232 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; -0.703 ; -3.550 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; -0.480 ; -0.638 ;; clk_div:clkdiv_inst|clock_100Khz_int ; -0.373 ; -0.434 ;; clk_div:clkdiv_inst|clock_10Khz_int ; -0.370 ; -0.416 ;; clk_div:clkdiv_inst|clock_1Khz_int ; -0.073 ; -0.140 ;+-------------------------------------------------------------+---------+---------------++--------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold Summary ;+-------------------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+--------+---------------+; SW[16] ; -2.883 ; -132.381 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.303 ; -0.303 ;; CLOCK_50 ; -0.171 ; -0.488 ;; clk_div:clkdiv_inst|clock_100Khz_int ; 0.073 ; 0.000 ;; clk_div:clkdiv_inst|clock_10Khz_int ; 0.100 ; 0.000 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.181 ; 0.000 ;; T80se:z80_inst|MREQ_n ; 0.336 ; 0.000 ;; clk_div:clkdiv_inst|clock_25MHz ; 0.348 ; 0.000 ;; clk_div:clkdiv_inst|clock_1Khz_int ; 0.387 ; 0.000 ;; clk_div:clkdiv_inst|clock_100Hz ; 0.409 ; 0.000 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.426 ; 0.000 ;; LCD:lcd_inst|clk_400hz_enable ; 2.100 ; 0.000 ;+-------------------------------------------------------------+--------+---------------++--------------------------------------------------------------------------+; Slow 1200mV 0C Model Recovery Summary ;+-------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------+--------+---------------+; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; -2.255 ; -2.255 ;+-------------------------------------------------+--------+---------------++-------------------------------------------------------------------------+; Slow 1200mV 0C Model Removal Summary ;+-------------------------------------------------+-------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------+-------+---------------+; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 2.789 ; 0.000 ;+-------------------------------------------------+-------+---------------++--------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width Summary ;+-------------------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+--------+---------------+; SW[16] ; -3.000 ; -609.320 ;; CLOCK_50 ; -3.000 ; -141.780 ;; clk_div:clkdiv_inst|clock_25MHz ; -2.649 ; -176.793 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -1.285 ; -29.555 ;; LCD:lcd_inst|clk_400hz_enable ; -1.285 ; -10.280 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; -1.285 ; -7.710 ;; clk_div:clkdiv_inst|clock_100Khz_int ; -1.285 ; -5.140 ;; clk_div:clkdiv_inst|clock_10Khz_int ; -1.285 ; -5.140 ;; clk_div:clkdiv_inst|clock_1Khz_int ; -1.285 ; -5.140 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; -1.285 ; -5.140 ;; clk_div:clkdiv_inst|clock_100Hz ; -1.285 ; -2.570 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; -1.285 ; -1.285 ;; T80se:z80_inst|MREQ_n ; -0.004 ; -0.012 ;+-------------------------------------------------------------+--------+---------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'SW[16]' ;+---------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+---------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------+; -11.396 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.286 ;; -11.392 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.282 ;; -11.349 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.269 ;; -11.345 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.239 ;; -11.345 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.265 ;; -11.343 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.237 ;; -11.335 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.225 ;; -11.331 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.221 ;; -11.323 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.500 ; 9.822 ;; -11.302 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.222 ;; -11.299 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.189 ;; -11.298 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.222 ;; -11.298 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.218 ;; -11.296 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.220 ;; -11.295 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.185 ;; -11.284 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 12.175 ;; -11.284 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.178 ;; -11.282 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.176 ;; -11.280 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.509 ; 9.770 ;; -11.280 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 12.171 ;; -11.266 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.156 ;; -11.262 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.152 ;; -11.258 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.104 ; 12.153 ;; -11.254 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.104 ; 12.149 ;; -11.251 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.175 ;; -11.249 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.173 ;; -11.248 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.142 ;; -11.246 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.140 ;; -11.245 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.500 ; 9.744 ;; -11.242 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.162 ;; -11.238 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.158 ;; -11.233 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.104 ; 12.128 ;; -11.231 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.104 ; 12.126 ;; -11.229 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.119 ;; -11.225 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.115 ;; -11.216 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.104 ; 12.111 ;; -11.216 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.136 ;; -11.215 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.109 ;; -11.213 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.107 ;; -11.212 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.104 ; 12.107 ;; -11.212 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.132 ;; -11.207 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.100 ; 12.106 ;; -11.205 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.100 ; 12.104 ;; -11.201 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.509 ; 9.691 ;; -11.191 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.115 ;; -11.189 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.113 ;; -11.182 ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.078 ; 12.103 ;; -11.182 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.102 ;; -11.180 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.504 ; 9.675 ;; -11.178 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.072 ;; -11.178 ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.078 ; 12.099 ;; -11.178 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.079 ; 12.098 ;; -11.176 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 12.070 ;; -11.172 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 12.063 ;; -11.171 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.500 ; 9.670 ;; -11.171 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 12.062 ;; -11.166 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.104 ; 12.061 ;; -11.165 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.100 ; 12.064 ;; -11.165 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.089 ;; -11.163 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.100 ; 12.062 ;; -11.163 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.087 ;; -11.153 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.043 ;; -11.150 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.509 ; 9.640 ;; -11.149 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[9] ; SW[16] ; SW[16] ; 1.000 ; -2.484 ; 9.664 ;; -11.149 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.109 ; 12.039 ;; -11.144 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[8] ; SW[16] ; SW[16] ; 1.000 ; -2.484 ; 9.659 ;; -11.138 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.504 ; 9.633 ;; -11.134 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][3] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 12.025 ;; -11.133 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][3] ; SW[16] ; SW[16] ; 1.000 ; -0.107 ; 12.025 ;; -11.133 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][3] ; SW[16] ; SW[16] ; 1.000 ; -0.107 ; 12.025 ;; -11.133 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][3] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 12.024 ;; -11.132 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.509 ; 9.622 ;; -11.131 ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.074 ; 12.056 ;; -11.131 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.055 ;; -11.129 ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.074 ; 12.054 ;; -11.129 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.075 ; 12.053 ;; -11.125 ; T80se:z80_inst|T80:u0|F[6] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.500 ; 9.624 ;; -11.125 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.078 ; 12.046 ;; -11.124 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.107 ; 12.016 ;; -11.124 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.078 ; 12.045 ;; -11.119 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.074 ; 12.044 ;; -11.118 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.509 ; 9.608 ;; -11.111 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 12.002 ;; -11.110 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 12.001 ;; -11.106 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|A[9] ; SW[16] ; SW[16] ; 1.000 ; -2.493 ; 9.612 ;; -11.105 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.104 ; 12.000 ;; -11.102 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 11.996 ;; -11.101 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|A[8] ; SW[16] ; SW[16] ; 1.000 ; -2.493 ; 9.607 ;; -11.100 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.105 ; 11.994 ;; -11.099 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][5] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 11.990 ;; -11.098 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][5] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 11.989 ;; -11.093 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][1] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 11.984 ;; -11.091 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -2.508 ; 9.582 ;; -11.091 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][1] ; SW[16] ; SW[16] ; 1.000 ; -0.108 ; 11.982 ;; -11.088 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[15] ; SW[16] ; SW[16] ; 1.000 ; -2.500 ; 9.587 ;; -11.087 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][3] ; SW[16] ; SW[16] ; 1.000 ; -0.078 ; 12.008 ;; -11.086 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][3] ; SW[16] ; SW[16] ; 1.000 ; -0.077 ; 12.008 ;; -11.086 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][3] ; SW[16] ; SW[16] ; 1.000 ; -0.077 ; 12.008 ;; -11.086 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][3] ; SW[16] ; SW[16] ; 1.000 ; -0.078 ; 12.007 ;; -11.078 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.078 ; 11.999 ;+---------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'LCD:lcd_inst|clk_400hz_enable' ;+---------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+---------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; -10.487 ; lcdvram[28][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.245 ; 3.751 ;; -10.264 ; lcdvram[31][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.744 ; 3.029 ;; -10.237 ; lcdvram[19][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.777 ; 2.969 ;; -10.171 ; lcdvram[20][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.479 ; 3.201 ;; -10.103 ; lcdvram[31][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.656 ; 2.956 ;; -10.076 ; lcdvram[30][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.975 ; 3.610 ;; -9.991 ; lcdvram[22][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.895 ; 3.605 ;; -9.973 ; lcdvram[22][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.931 ; 3.551 ;; -9.965 ; lcdvram[22][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.842 ; 3.632 ;; -9.853 ; lcdvram[19][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.709 ; 2.653 ;; -9.787 ; lcdvram[10][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.238 ; 4.058 ;; -9.776 ; lcdvram[3][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.231 ; 4.054 ;; -9.772 ; lcdvram[6][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.611 ; 3.670 ;; -9.761 ; lcdvram[16][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.828 ; 2.442 ;; -9.750 ; lcdvram[31][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.703 ; 2.556 ;; -9.745 ; lcdvram[16][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.700 ; 2.554 ;; -9.722 ; lcdvram[17][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.534 ; 2.697 ;; -9.696 ; lcdvram[19][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.603 ; 2.602 ;; -9.681 ; lcdvram[19][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.794 ; 2.396 ;; -9.669 ; lcdvram[16][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.749 ; 2.429 ;; -9.633 ; lcdvram[17][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.543 ; 2.599 ;; -9.615 ; lcdvram[4][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.314 ; 3.810 ;; -9.610 ; lcdvram[0][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.699 ; 3.420 ;; -9.594 ; lcdvram[23][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.892 ; 3.211 ;; -9.590 ; lcdvram[19][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.693 ; 2.406 ;; -9.570 ; lcdvram[17][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.560 ; 2.519 ;; -9.569 ; lcdvram[27][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.533 ; 2.545 ;; -9.564 ; lcdvram[20][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.468 ; 2.605 ;; -9.563 ; lcdvram[28][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.351 ; 2.721 ;; -9.560 ; lcdvram[27][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.468 ; 2.601 ;; -9.542 ; lcdvram[18][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.260 ; 2.791 ;; -9.535 ; lcdvram[18][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.032 ; 3.012 ;; -9.527 ; lcdvram[28][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.231 ; 2.805 ;; -9.527 ; lcdvram[16][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.692 ; 2.344 ;; -9.519 ; lcdvram[6][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.315 ; 3.713 ;; -9.519 ; lcdvram[1][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.139 ; 3.889 ;; -9.505 ; lcdvram[19][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.516 ; 2.498 ;; -9.498 ; lcdvram[24][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.601 ; 2.406 ;; -9.495 ; lcdvram[20][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.341 ; 2.663 ;; -9.493 ; lcdvram[17][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.458 ; 2.544 ;; -9.492 ; lcdvram[17][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.459 ; 2.542 ;; -9.483 ; lcdvram[20][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.381 ; 2.611 ;; -9.466 ; lcdvram[23][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.819 ; 3.156 ;; -9.461 ; lcdvram[22][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.698 ; 3.272 ;; -9.449 ; lcdvram[25][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.388 ; 2.570 ;; -9.437 ; lcdvram[6][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.448 ; 3.498 ;; -9.386 ; lcdvram[27][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.555 ; 2.340 ;; -9.384 ; lcdvram[24][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.457 ; 2.436 ;; -9.376 ; lcdvram[16][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.750 ; 2.135 ;; -9.357 ; lcdvram[4][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.226 ; 3.640 ;; -9.318 ; lcdvram[17][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.467 ; 2.360 ;; -9.304 ; lcdvram[17][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.515 ; 2.298 ;; -9.303 ; lcdvram[28][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.131 ; 2.681 ;; -9.298 ; lcdvram[30][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.972 ; 2.835 ;; -9.297 ; lcdvram[6][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.696 ; 3.110 ;; -9.296 ; lcdvram[1][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -5.947 ; 3.858 ;; -9.294 ; lcdvram[0][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.392 ; 3.411 ;; -9.265 ; lcdvram[27][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.569 ; 2.205 ;; -9.254 ; lcdvram[31][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.652 ; 2.111 ;; -9.250 ; lcdvram[18][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.177 ; 2.582 ;; -9.246 ; lcdvram[18][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.259 ; 2.496 ;; -9.237 ; lcdvram[18][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.185 ; 2.561 ;; -9.230 ; lcdvram[16][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.613 ; 2.126 ;; -9.207 ; lcdvram[24][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.513 ; 2.203 ;; -9.204 ; lcdvram[16][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.704 ; 2.009 ;; -9.192 ; lcdvram[20][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.415 ; 2.286 ;; -9.170 ; lcdvram[24][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.331 ; 2.348 ;; -9.168 ; lcdvram[19][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.626 ; 2.051 ;; -9.156 ; lcdvram[20][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.228 ; 2.437 ;; -9.155 ; lcdvram[2][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -5.924 ; 3.740 ;; -9.150 ; lcdvram[21][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.128 ; 2.531 ;; -9.140 ; lcdvram[0][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.066 ; 3.583 ;; -9.127 ; lcdvram[25][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.394 ; 2.242 ;; -9.121 ; lcdvram[22][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.808 ; 2.822 ;; -9.118 ; lcdvram[21][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.156 ; 2.471 ;; -9.118 ; lcdvram[28][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.357 ; 2.270 ;; -9.112 ; lcdvram[31][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.738 ; 1.883 ;; -9.112 ; lcdvram[7][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.183 ; 3.438 ;; -9.103 ; lcdvram[8][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.034 ; 3.578 ;; -9.102 ; lcdvram[29][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.578 ; 3.033 ;; -9.089 ; lcdvram[4][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.312 ; 3.286 ;; -9.076 ; lcdvram[0][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -5.829 ; 3.756 ;; -9.076 ; lcdvram[25][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.329 ; 2.256 ;; -9.062 ; lcdvram[17][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.219 ; 2.352 ;; -9.056 ; lcdvram[30][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.850 ; 2.715 ;; -9.054 ; lcdvram[25][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.556 ; 2.007 ;; -9.048 ; lcdvram[24][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.283 ; 2.274 ;; -9.034 ; lcdvram[27][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.517 ; 2.026 ;; -9.033 ; lcdvram[26][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.867 ; 2.675 ;; -9.032 ; lcdvram[31][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.636 ; 1.905 ;; -9.024 ; lcdvram[21][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.291 ; 2.242 ;; -9.014 ; lcdvram[25][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.301 ; 2.222 ;; -8.994 ; lcdvram[11][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.216 ; 3.287 ;; -8.992 ; lcdvram[26][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.020 ; 2.481 ;; -8.988 ; lcdvram[11][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -5.923 ; 3.574 ;; -8.982 ; lcdvram[27][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.454 ; 2.037 ;; -8.949 ; lcdvram[20][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.325 ; 2.133 ;; -8.942 ; lcdvram[7][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.100 ; 3.351 ;; -8.935 ; lcdvram[25][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -7.546 ; 1.898 ;; -8.930 ; lcdvram[23][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -6.900 ; 2.539 ;+---------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'CLOCK_50' ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; -7.105 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.369 ; 6.725 ;; -7.043 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.369 ; 6.663 ;; -7.006 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.613 ;; -7.006 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.613 ;; -7.006 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.613 ;; -6.959 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.566 ;; -6.959 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.566 ;; -6.959 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.566 ;; -6.923 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.530 ;; -6.923 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.530 ;; -6.923 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.530 ;; -6.923 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.530 ;; -6.882 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.489 ;; -6.882 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.489 ;; -6.882 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.489 ;; -6.882 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.489 ;; -6.610 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.371 ; 6.228 ;; -6.603 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.369 ; 6.223 ;; -6.527 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.369 ; 6.147 ;; -6.520 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.369 ; 6.140 ;; -6.519 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.126 ;; -6.519 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.126 ;; -6.519 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.126 ;; -6.511 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 6.116 ;; -6.511 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 6.116 ;; -6.511 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 6.116 ;; -6.443 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.050 ;; -6.443 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.050 ;; -6.443 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.050 ;; -6.442 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.049 ;; -6.442 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.049 ;; -6.442 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.049 ;; -6.442 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.049 ;; -6.430 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.369 ; 6.050 ;; -6.428 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 6.033 ;; -6.428 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 6.033 ;; -6.428 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 6.033 ;; -6.428 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 6.033 ;; -6.421 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.028 ;; -6.421 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.028 ;; -6.421 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 6.028 ;; -6.366 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.973 ;; -6.366 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.973 ;; -6.366 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.973 ;; -6.366 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.973 ;; -6.338 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.945 ;; -6.338 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.945 ;; -6.338 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.945 ;; -6.338 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.945 ;; -6.331 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.938 ;; -6.331 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.938 ;; -6.331 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.938 ;; -6.233 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.840 ;; -6.233 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.840 ;; -6.233 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.840 ;; -6.233 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.840 ;; -5.894 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.501 ;; -5.809 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.416 ;; -5.454 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 5.061 ;; -5.314 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 4.919 ;; -5.224 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 4.831 ;; -5.221 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 4.828 ;; -5.134 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.382 ; 4.741 ;; -4.840 ; LCDON_reg ; LCD:lcd_inst|LCD_ON ; SW[16] ; CLOCK_50 ; 1.000 ; -4.661 ; 1.158 ;; -4.485 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.371 ; 4.103 ;; -4.401 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 4.006 ;; -4.401 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 4.006 ;; -4.401 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 4.006 ;; -4.324 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 3.929 ;; -4.324 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 3.929 ;; -4.324 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 3.929 ;; -4.324 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 3.929 ;; -3.291 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[2] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.422 ; 5.712 ;; -3.192 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[1] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.409 ; 5.600 ;; -3.192 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[6] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.409 ; 5.600 ;; -3.192 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[5] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.409 ; 5.600 ;; -3.104 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[7] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.409 ; 5.512 ;; -3.104 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[3] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.409 ; 5.512 ;; -3.104 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[0] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.409 ; 5.512 ;; -3.104 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[4] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 1.409 ; 5.512 ;; -3.057 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -1.384 ; 2.662 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[0] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[1] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[2] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[3] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[4] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[5] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[6] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[7] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[8] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.880 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[9] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.808 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[0] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[1] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[2] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[3] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[4] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[5] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[6] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[7] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;; -2.879 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[8] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.071 ; 3.807 ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_25MHz' ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; -5.089 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.329 ; 5.759 ;; -5.087 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.329 ; 5.757 ;; -5.086 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.329 ; 5.756 ;; -4.944 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.318 ; 5.625 ;; -4.942 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.318 ; 5.623 ;; -4.941 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.318 ; 5.622 ;; -4.740 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.329 ; 5.410 ;; -4.595 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.318 ; 5.276 ;; -4.237 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.193 ; 3.064 ;; -4.191 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.193 ; 3.018 ;; -4.179 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.029 ; 3.170 ;; -4.165 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.231 ; 2.954 ;; -4.152 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.019 ; 3.153 ;; -4.136 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.003 ; 3.153 ;; -4.000 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.752 ; 3.268 ;; -3.965 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.702 ; 3.283 ;; -3.964 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.193 ; 2.791 ;; -3.943 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.790 ; 3.173 ;; -3.912 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.012 ; 2.920 ;; -3.880 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.036 ; 2.864 ;; -3.877 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.038 ; 2.859 ;; -3.875 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.226 ; 2.669 ;; -3.841 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.228 ; 2.633 ;; -3.840 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.209 ; 2.651 ;; -3.832 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.219 ; 2.633 ;; -3.828 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.209 ; 2.639 ;; -3.812 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.711 ; 3.121 ;; -3.675 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.785 ; 2.910 ;; -3.675 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.193 ; 2.502 ;; -3.670 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.787 ; 2.903 ;; -3.646 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.768 ; 2.898 ;; -3.646 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.049 ; 4.627 ;; -3.643 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.038 ; 4.635 ;; -3.640 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.037 ; 4.633 ;; -3.637 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.778 ; 2.879 ;; -3.633 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.046 ; 4.617 ;; -3.623 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.035 ; 4.618 ;; -3.619 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.718 ; 2.921 ;; -3.617 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.202 ; 2.435 ;; -3.616 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.231 ; 2.405 ;; -3.610 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.728 ; 2.902 ;; -3.595 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.219 ; 2.396 ;; -3.584 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.048 ; 4.566 ;; -3.576 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.219 ; 2.377 ;; -3.575 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.209 ; 2.386 ;; -3.569 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.228 ; 2.361 ;; -3.552 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.041 ; 2.531 ;; -3.547 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.039 ; 4.538 ;; -3.540 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.226 ; 2.334 ;; -3.532 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.202 ; 2.350 ;; -3.532 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.228 ; 2.324 ;; -3.523 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.202 ; 2.341 ;; -3.491 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.027 ; 2.484 ;; -3.461 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.194 ; 2.287 ;; -3.449 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.021 ; 2.448 ;; -3.417 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.224 ; 2.213 ;; -3.413 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.195 ; 2.238 ;; -3.404 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.194 ; 2.230 ;; -3.397 ; T80se:z80_inst|T80:u0|A[9] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.778 ; 2.639 ;; -3.382 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.733 ; 2.669 ;; -3.381 ; T80se:z80_inst|T80:u0|A[9] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.752 ; 2.649 ;; -3.371 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.211 ; 2.180 ;; -3.366 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.730 ; 2.656 ;; -3.358 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.221 ; 2.157 ;; -3.349 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.214 ; 2.155 ;; -3.348 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.226 ; 2.142 ;; -3.344 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.217 ; 2.147 ;; -3.343 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.219 ; 2.144 ;; -3.337 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.159 ; 4.526 ;; -3.335 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.194 ; 2.161 ;; -3.333 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.209 ; 2.144 ;; -3.332 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.726 ; 2.626 ;; -3.331 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.159 ; 4.520 ;; -3.328 ; T80se:z80_inst|T80:u0|A[7] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.752 ; 2.596 ;; -3.328 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.161 ; 4.519 ;; -3.326 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.202 ; 2.144 ;; -3.326 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.159 ; 4.515 ;; -3.322 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.161 ; 4.513 ;; -3.321 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.194 ; 2.147 ;; -3.317 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.723 ; 2.614 ;; -3.317 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.161 ; 4.508 ;; -3.311 ; T80se:z80_inst|T80:u0|A[7] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.745 ; 2.586 ;; -3.296 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.050 ; 4.276 ;; -3.291 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.740 ; 2.571 ;; -3.291 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.231 ; 2.080 ;; -3.286 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.162 ; 4.478 ;; -3.280 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.162 ; 4.472 ;; -3.275 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.162 ; 4.467 ;; -3.270 ; T80se:z80_inst|T80:u0|A[12] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.702 ; 2.588 ;; -3.253 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.163 ; 4.446 ;; -3.250 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.735 ; 2.535 ;; -3.250 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.159 ; 4.439 ;; -3.248 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.737 ; 2.531 ;; -3.248 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.159 ; 4.437 ;; -3.247 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.163 ; 4.440 ;; -3.244 ; T80se:z80_inst|T80:u0|A[7] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -1.769 ; 2.495 ;; -3.242 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.163 ; 4.435 ;; -3.241 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.161 ; 4.432 ;; -3.239 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.161 ; 4.430 ;; -3.233 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|address_reg_a[0] ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -2.026 ; 2.196 ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_100Hz' ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; -4.660 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.811 ;; -4.660 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.811 ;; -4.255 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.406 ;; -4.255 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.406 ;; -4.248 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.399 ;; -4.248 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.399 ;; -4.210 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.860 ; 2.359 ;; -4.210 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.860 ; 2.359 ;; -4.205 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.356 ;; -4.205 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.356 ;; -4.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.324 ;; -4.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.324 ;; -4.115 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.860 ; 2.264 ;; -4.115 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.860 ; 2.264 ;; -4.055 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.206 ;; -4.055 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -2.858 ; 2.206 ;; 0.024 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -0.043 ; 0.952 ;; 0.253 ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -0.043 ; 0.723 ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'T80se:z80_inst|MREQ_n' ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; -2.600 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[29][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.492 ; 2.780 ;; -2.594 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[10][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.053 ; 2.377 ;; -2.519 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[13][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.027 ; 1.587 ;; -2.515 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[5][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.224 ; 1.973 ;; -2.508 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[8][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.288 ; 1.951 ;; -2.487 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[29][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.469 ; 2.637 ;; -2.463 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[29][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.463 ; 2.608 ;; -2.437 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[11][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.368 ; 1.663 ;; -2.406 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[29][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.489 ; 2.575 ;; -2.368 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[2][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.149 ; 1.942 ;; -2.342 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[26][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.670 ; 2.691 ;; -2.306 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[5][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.012 ; 1.917 ;; -2.287 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[29][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.628 ; 2.750 ;; -2.279 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[0][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.232 ; 2.068 ;; -2.264 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[8][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.146 ; 1.806 ;; -2.257 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[3][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.856 ; 0.822 ;; -2.243 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[13][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.149 ; 1.929 ;; -2.218 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[5][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.014 ; 1.631 ;; -2.210 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[0][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.229 ; 1.810 ;; -2.205 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[5][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.111 ; 1.928 ;; -2.193 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[11][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.227 ; 1.375 ;; -2.185 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[30][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.819 ; 2.690 ;; -2.180 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[8][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.416 ; 1.327 ;; -2.171 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[21][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.947 ; 2.804 ;; -2.167 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[30][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.764 ; 2.607 ;; -2.157 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[24][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.206 ; 3.050 ;; -2.154 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[21][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.933 ; 2.773 ;; -2.153 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[5][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.221 ; 1.629 ;; -2.138 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[25][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.206 ; 3.027 ;; -2.135 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[10][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.110 ; 1.976 ;; -2.125 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[11][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.230 ; 1.339 ;; -2.120 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[30][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.807 ; 2.608 ;; -2.109 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[3][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.067 ; 2.009 ;; -2.103 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[24][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.226 ; 3.016 ;; -2.093 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[11][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.237 ; 1.277 ;; -2.088 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[29][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.628 ; 2.549 ;; -2.087 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[29][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.501 ; 2.417 ;; -2.086 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[3][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.858 ; 0.648 ;; -2.080 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[25][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.202 ; 2.957 ;; -2.072 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[11][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.038 ; 1.867 ;; -2.068 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[24][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.223 ; 3.127 ;; -2.066 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[20][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.312 ; 2.566 ;; -2.063 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[25][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.200 ; 2.944 ;; -2.054 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[16][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.476 ; 3.212 ;; -2.053 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[8][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.068 ; 1.711 ;; -2.051 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[25][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.355 ; 2.963 ;; -2.037 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[18][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.922 ; 2.641 ;; -2.030 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[15][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.059 ; 1.770 ;; -2.019 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[25][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.173 ; 2.874 ;; -2.010 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[8][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.317 ; 1.289 ;; -1.999 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[8][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.106 ; 1.720 ;; -1.994 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[0][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.597 ; 2.320 ;; -1.989 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[3][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.177 ; 1.373 ;; -1.972 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[7][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.209 ; 2.016 ;; -1.962 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[8][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.065 ; 1.868 ;; -1.960 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[26][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.667 ; 2.309 ;; -1.958 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[10][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.152 ; 1.363 ;; -1.955 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[3][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.179 ; 1.339 ;; -1.955 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[14][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.246 ; 1.637 ;; -1.954 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[22][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.618 ; 2.400 ;; -1.953 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[10][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.558 ; 0.815 ;; -1.952 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[20][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.127 ; 2.755 ;; -1.950 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[3][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.752 ; 0.883 ;; -1.944 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[13][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.148 ; 1.352 ;; -1.940 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[24][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.239 ; 3.007 ;; -1.936 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[26][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.656 ; 2.420 ;; -1.935 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[24][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.354 ; 3.123 ;; -1.928 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[29][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.609 ; 2.376 ;; -1.922 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[10][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.515 ; 1.136 ;; -1.920 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[21][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.947 ; 2.701 ;; -1.920 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[16][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.458 ; 3.214 ;; -1.919 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[21][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.952 ; 2.698 ;; -1.916 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[26][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.814 ; 2.571 ;; -1.913 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[18][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.028 ; 2.774 ;; -1.911 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[24][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.384 ; 3.134 ;; -1.909 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[18][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.088 ; 2.840 ;; -1.907 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[5][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.166 ; 1.568 ;; -1.906 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[20][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.121 ; 2.703 ;; -1.905 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[9][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.037 ; 1.663 ;; -1.901 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[17][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.352 ; 2.910 ;; -1.897 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[26][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.814 ; 2.552 ;; -1.891 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[11][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.031 ; 1.643 ;; -1.890 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[25][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.223 ; 2.802 ;; -1.887 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[22][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.751 ; 2.198 ;; -1.886 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[21][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.941 ; 2.508 ;; -1.884 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[6][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.288 ; 2.013 ;; -1.880 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[10][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.789 ; 0.918 ;; -1.878 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[3][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.752 ; 0.802 ;; -1.878 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[24][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.218 ; 2.924 ;; -1.878 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[2][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.176 ; 1.433 ;; -1.875 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[13][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.056 ; 1.766 ;; -1.873 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[17][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.315 ; 3.021 ;; -1.872 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[22][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.602 ; 2.155 ;; -1.867 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[21][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.092 ; 2.800 ;; -1.854 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[22][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.770 ; 2.457 ;; -1.853 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[20][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.149 ; 2.684 ;; -1.853 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[18][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.936 ; 2.616 ;; -1.851 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[15][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.442 ; 2.035 ;; -1.846 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[18][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.079 ; 2.766 ;; -1.843 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[9][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.310 ; 1.709 ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; -1.971 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.898 ;; -1.961 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.888 ;; -1.857 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.070 ; 2.786 ;; -1.847 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.070 ; 2.776 ;; -1.807 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.734 ;; -1.693 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.070 ; 2.622 ;; -1.690 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.617 ;; -1.680 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.068 ; 2.611 ;; -1.676 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.606 ;; -1.676 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.606 ;; -1.676 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.606 ;; -1.676 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.606 ;; -1.676 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.606 ;; -1.670 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.068 ; 2.601 ;; -1.666 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.596 ;; -1.666 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.596 ;; -1.666 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.596 ;; -1.666 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.596 ;; -1.666 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.596 ;; -1.639 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.067 ; 2.571 ;; -1.629 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.067 ; 2.561 ;; -1.576 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.070 ; 2.505 ;; -1.516 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.068 ; 2.447 ;; -1.512 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.442 ;; -1.512 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.442 ;; -1.512 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.442 ;; -1.512 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.442 ;; -1.512 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.442 ;; -1.480 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.407 ;; -1.475 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.067 ; 2.407 ;; -1.399 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.068 ; 2.330 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.325 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.325 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.325 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.325 ;; -1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.325 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.382 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.310 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.307 ;; -1.358 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.067 ; 2.290 ;; -1.350 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.070 ; 2.279 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.234 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.162 ;; -1.184 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.068 ; 2.115 ;; -1.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.103 ;; -1.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.103 ;; -1.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.103 ;; -1.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.103 ;; -1.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.069 ; 2.103 ;; -1.171 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.098 ;; -1.168 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.095 ;; -1.138 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.067 ; 2.070 ;; -1.132 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.059 ;; -1.132 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.059 ;; -1.129 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.056 ;; -1.129 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 2.056 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.124 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 2.052 ;; -1.099 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.068 ; 2.030 ;; -1.067 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.070 ; 1.996 ;; -1.023 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 1.950 ;; -0.984 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 1.911 ;; -0.984 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.072 ; 1.911 ;; -0.921 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 1.849 ;; -0.921 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 1.849 ;; -0.921 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 1.849 ;; -0.921 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 1.849 ;; -0.921 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 1.849 ;; -0.921 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 1.849 ;; -0.921 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 1.849 ;; -0.921 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.071 ; 1.849 ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+--------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; -0.703 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.678 ;; -0.703 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.678 ;; -0.703 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.678 ;; -0.703 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.678 ;; -0.698 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.039 ; 1.678 ;; -0.696 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.671 ;; -0.622 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.597 ;; -0.595 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.570 ;; -0.580 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.555 ;; -0.551 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.526 ;; -0.512 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.487 ;; -0.506 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.481 ;; -0.490 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.465 ;; -0.479 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.454 ;; -0.417 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.392 ;; -0.417 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.392 ;; -0.417 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.392 ;; -0.417 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.392 ;; -0.412 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.039 ; 1.392 ;; -0.046 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.039 ; 1.026 ;; -0.040 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.039 ; 1.020 ;; -0.040 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 1.015 ;; -0.024 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.039 ; 1.004 ;; -0.024 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 0.999 ;; 0.245 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.044 ; 0.730 ;+--------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+--------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; -0.480 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.045 ; 1.454 ;; -0.343 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.045 ; 1.317 ;; -0.158 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.045 ; 1.132 ;; -0.102 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.045 ; 1.076 ;; -0.030 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.500 ; 0.928 ; 1.690 ;; 0.002 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.045 ; 0.972 ;; 0.105 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.045 ; 0.869 ;; 0.229 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.045 ; 0.745 ;; 0.230 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.045 ; 0.744 ;; 0.297 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.464 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; 0.928 ; 1.696 ;+--------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; -0.373 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 1.349 ;; -0.221 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 1.197 ;; -0.100 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 1.076 ;; -0.061 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 1.037 ;; 0.004 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 0.972 ;; 0.066 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.500 ; 2.099 ; 2.765 ;; 0.103 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 0.873 ;; 0.106 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 0.870 ;; 0.231 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.043 ; 0.745 ;; 0.297 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.481 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; 2.099 ; 2.850 ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+--------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; -0.370 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.044 ; 1.345 ;; -0.221 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.044 ; 1.196 ;; -0.103 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.044 ; 1.078 ;; -0.046 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.044 ; 1.021 ;; 0.001 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.044 ; 0.974 ;; 0.042 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.500 ; 0.791 ; 1.481 ;; 0.106 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.044 ; 0.869 ;; 0.109 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.044 ; 0.866 ;; 0.230 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.044 ; 0.745 ;; 0.297 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.560 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; 0.791 ; 1.463 ;+--------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+--------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; -0.073 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 1.049 ;; -0.060 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 1.036 ;; -0.035 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 1.011 ;; -0.007 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.983 ;; 0.103 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.873 ;; 0.225 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.751 ;; 0.228 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.748 ;; 0.240 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.043 ; 0.736 ;; 0.297 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.039 ; 0.683 ;; 0.297 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.039 ; 0.683 ;+--------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'SW[16]' ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------+; -2.883 ; \random:rand_temp[14] ; T80se:z80_inst|DI_Reg[6] ; CLOCK_50 ; SW[16] ; 0.000 ; 4.655 ; 1.983 ;; -2.825 ; \random:rand_temp[14] ; T80se:z80_inst|T80:u0|IR[6] ; CLOCK_50 ; SW[16] ; 0.000 ; 4.655 ; 2.041 ;; -2.555 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.333 ; 5.192 ;; -2.401 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.347 ;; -2.366 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.382 ;; -2.331 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.417 ;; -2.288 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.460 ;; -2.284 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.464 ;; -2.247 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.343 ; 5.510 ;; -2.207 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.541 ;; -2.141 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.333 ; 5.106 ;; -2.130 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.618 ;; -1.997 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.251 ;; -1.969 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.279 ;; -1.954 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.794 ;; -1.912 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.336 ;; -1.852 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.343 ; 5.905 ;; -1.839 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 5.909 ;; -1.676 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.572 ;; -1.668 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.580 ;; -1.661 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.587 ;; -1.621 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.343 ; 5.636 ;; -1.613 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.635 ;; -1.500 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.248 ;; -1.490 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.758 ;; -1.386 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.342 ; 6.370 ;; -1.326 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.343 ; 6.431 ;; -1.312 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.334 ; 5.936 ;; -1.297 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.451 ;; -1.210 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 7.343 ; 6.047 ;; -1.208 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.322 ; 6.528 ;; -1.180 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.568 ;; -1.180 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.568 ;; -1.180 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.568 ;; -1.180 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.568 ;; -1.180 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.568 ;; -1.180 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.568 ;; -1.173 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.571 ;; -1.152 ; \random:rand_temp[11] ; T80se:z80_inst|T80:u0|IR[3] ; CLOCK_50 ; SW[16] ; 0.000 ; 4.654 ; 3.713 ;; -1.140 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.644 ; 6.948 ;; -1.140 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.649 ; 6.953 ;; -1.140 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.644 ; 6.948 ;; -1.135 ; T80se:z80_inst|MREQ_n ; LCDON_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.319 ; 6.598 ;; -1.120 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.624 ;; -1.120 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.624 ;; -1.120 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.624 ;; -1.120 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.624 ;; -1.120 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.624 ;; -1.120 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.624 ;; -1.120 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.624 ;; -1.120 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDG_sig[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.330 ; 6.624 ;; -1.117 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.271 ; 6.568 ;; -1.117 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.271 ; 6.568 ;; -1.117 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.271 ; 6.568 ;; -1.117 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.271 ; 6.568 ;; -1.117 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.271 ; 6.568 ;; -1.117 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.271 ; 6.568 ;; -1.117 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.271 ; 6.568 ;; -1.117 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.271 ; 6.568 ;; -1.105 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.647 ; 6.986 ;; -1.105 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.652 ; 6.991 ;; -1.105 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.647 ; 6.986 ;; -1.092 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.648 ; 7.000 ;; -1.092 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.653 ; 7.005 ;; -1.092 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.648 ; 7.000 ;; -1.088 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.626 ; 6.982 ;; -1.088 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.631 ; 6.987 ;; -1.088 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.626 ; 6.982 ;; -1.072 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.645 ; 7.017 ;; -1.072 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.650 ; 7.022 ;; -1.072 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.645 ; 7.017 ;; -1.064 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.646 ; 7.026 ;; -1.064 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.651 ; 7.031 ;; -1.064 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.646 ; 7.026 ;; -1.056 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.642 ; 7.030 ;; -1.056 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.647 ; 7.035 ;; -1.056 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.642 ; 7.030 ;; -1.043 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[10] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.705 ;; -1.043 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[13] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.705 ;; -1.042 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[11] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.706 ;; -1.041 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[14] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.707 ;; -1.039 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[8] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.709 ;; -1.038 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[9] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.710 ;; -1.037 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[12] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.711 ;; -1.037 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[15] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.334 ; 6.711 ;; -1.033 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER4_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.324 ; 6.705 ;; -1.033 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER4_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.324 ; 6.705 ;; -1.033 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER4_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.324 ; 6.705 ;; -1.033 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER4_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.324 ; 6.705 ;; -1.018 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.627 ; 7.053 ;; -1.018 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.632 ; 7.058 ;; -1.018 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.627 ; 7.053 ;; -1.010 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.630 ; 7.064 ;; -1.010 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.635 ; 7.069 ;; -1.010 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.630 ; 7.064 ;; -1.009 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER5_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.290 ; 6.695 ;; -1.009 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER5_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.290 ; 6.695 ;; -1.009 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER5_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.290 ; 6.695 ;; -1.009 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER5_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.290 ; 6.695 ;; -0.981 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 7.629 ; 7.092 ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; -0.303 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 4.044 ; 4.135 ;; -0.047 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.500 ; 4.044 ; 3.891 ;; 0.354 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.597 ;; 0.365 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.608 ;; 0.397 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.640 ;; 0.416 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.659 ;; 0.417 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.660 ;; 0.527 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.770 ;; 0.528 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.771 ;; 0.528 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.771 ;; 0.530 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.773 ;; 0.672 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 0.915 ;; 0.832 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.075 ;; 0.865 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.108 ;; 0.873 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.116 ;; 0.988 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.231 ;; 0.991 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.074 ; 1.236 ;; 0.993 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.236 ;; 1.006 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.074 ; 1.251 ;; 1.016 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.076 ; 1.263 ;; 1.020 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.074 ; 1.265 ;; 1.100 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.343 ;; 1.118 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.361 ;; 1.121 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.364 ;; 1.135 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.378 ;; 1.136 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.379 ;; 1.206 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.074 ; 1.451 ;; 1.213 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.074 ; 1.458 ;; 1.245 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.488 ;; 1.246 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.489 ;; 1.388 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.631 ;; 1.395 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.638 ;; 1.396 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.639 ;; 1.406 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.649 ;; 1.432 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.675 ;; 1.432 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.675 ;; 1.432 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.675 ;; 1.432 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.675 ;; 1.456 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.699 ;; 1.498 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 1.741 ;; 1.587 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.074 ; 1.832 ;; 1.619 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.076 ; 1.866 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.621 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.865 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.719 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 1.963 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.829 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.073 ;; 1.843 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.072 ; 2.086 ;; 1.856 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.077 ; 2.104 ;; 1.892 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.075 ; 2.138 ;; 1.892 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.075 ; 2.138 ;; 1.892 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.075 ; 2.138 ;; 1.892 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.075 ; 2.138 ;; 1.892 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.075 ; 2.138 ;; 1.895 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.077 ; 2.143 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.223 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 1.989 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.073 ; 2.233 ;; 2.031 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.075 ; 2.277 ;; 2.058 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.077 ; 2.306 ;; 2.092 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.075 ; 2.338 ;; 2.092 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.075 ; 2.338 ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'CLOCK_50' ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; -0.171 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; 0.000 ; 2.763 ; 2.996 ;; -0.165 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_EN ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.753 ; 2.992 ;; -0.152 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 0.000 ; 2.776 ; 3.038 ;; 0.061 ; clk_div:clkdiv_inst|clock_357Mhz_int ; clk_div:clkdiv_inst|clock_357Mhz ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.722 ; 0.954 ;; 0.063 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_ON ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.758 ; 3.225 ;; 0.080 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; 0.000 ; 2.763 ; 3.247 ;; 0.119 ; clk_div:clkdiv_inst|clock_10Mhz_int ; clk_div:clkdiv_inst|clock_10MHz ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.722 ; 1.012 ;; 0.140 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset1 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.753 ; 3.297 ;; 0.140 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.753 ; 3.297 ;; 0.140 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.753 ; 3.297 ;; 0.140 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.753 ; 3.297 ;; 0.140 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.753 ; 3.297 ;; 0.140 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.753 ; 3.297 ;; 0.142 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.return_home ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.754 ; 3.300 ;; 0.186 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.hold ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.747 ; 3.337 ;; 0.186 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.return_home ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.747 ; 3.337 ;; 0.186 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.print_string ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.747 ; 3.337 ;; 0.186 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.print_string ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.747 ; 3.337 ;; 0.190 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; -0.500 ; 2.776 ; 2.880 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.drop_LCD_EN ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset3 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.func_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.func_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_off ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_off ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_clear ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_clear ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_on ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_on ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.208 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_RS ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.748 ; 3.360 ;; 0.220 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[0] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.758 ; 3.382 ;; 0.220 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[1] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.758 ; 3.382 ;; 0.220 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[2] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.758 ; 3.382 ;; 0.220 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[3] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.758 ; 3.382 ;; 0.220 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[6] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.758 ; 3.382 ;; 0.291 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_EN ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 2.753 ; 2.948 ;; 0.305 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_1Khz_int ; CLOCK_50 ; 0.000 ; 1.560 ; 2.056 ;; 0.340 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[3] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.754 ; 3.498 ;; 0.340 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[4] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.754 ; 3.498 ;; 0.340 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[1] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.754 ; 3.498 ;; 0.340 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[2] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.754 ; 3.498 ;; 0.340 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[0] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.754 ; 3.498 ;; 0.354 ; clk_div:clkdiv_inst|count_10Mhz[1] ; clk_div:clkdiv_inst|count_10Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; clk_div:clkdiv_inst|count_10Mhz[2] ; clk_div:clkdiv_inst|count_10Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; clk_div:clkdiv_inst|clock_10Mhz_int ; clk_div:clkdiv_inst|clock_10Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; clk_div:clkdiv_inst|count_357Mhz[1] ; clk_div:clkdiv_inst|count_357Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; clk_div:clkdiv_inst|count_357Mhz[2] ; clk_div:clkdiv_inst|count_357Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|count_357Mhz[3] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; clk_div:clkdiv_inst|clock_357Mhz_int ; clk_div:clkdiv_inst|clock_357Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|next_command.reset2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|next_command.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|next_command.func_set ; LCD:lcd_inst|next_command.func_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|next_command.display_off ; LCD:lcd_inst|next_command.display_off ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|next_command.display_clear ; LCD:lcd_inst|next_command.display_clear ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|next_command.display_on ; LCD:lcd_inst|next_command.display_on ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|data_bus_value[0] ; LCD:lcd_inst|data_bus_value[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|data_bus_value[6] ; LCD:lcd_inst|data_bus_value[6] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|LCD_RS ; LCD:lcd_inst|LCD_RS ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; LCD:lcd_inst|LCD_ON ; LCD:lcd_inst|LCD_ON ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.597 ;; 0.355 ; LCD:lcd_inst|next_command.line2 ; LCD:lcd_inst|next_command.line2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.071 ; 0.597 ;; 0.355 ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|next_command.mode_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.071 ; 0.597 ;; 0.355 ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|data_bus_value[7] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.071 ; 0.597 ;; 0.364 ; clk_div:clkdiv_inst|count_10Mhz[0] ; clk_div:clkdiv_inst|count_10Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.073 ; 0.608 ;; 0.365 ; clk_div:clkdiv_inst|count_357Mhz[0] ; clk_div:clkdiv_inst|count_357Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.608 ;; 0.365 ; LCD:lcd_inst|state.drop_LCD_EN ; LCD:lcd_inst|state.drop_LCD_EN ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.608 ;; 0.375 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[4] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.747 ; 3.526 ;; 0.375 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[5] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 2.747 ; 3.526 ;; 0.383 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; -0.500 ; 2.763 ; 3.050 ;; 0.388 ; LCD:lcd_inst|clk_count_400hz[19] ; LCD:lcd_inst|clk_count_400hz[19] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.071 ; 0.630 ;; 0.399 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|count_357Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.642 ;; 0.402 ; LCD:lcd_inst|next_command.print_string ; LCD:lcd_inst|state.print_string ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.645 ;; 0.402 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|clock_357Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.645 ;; 0.403 ; LCD:lcd_inst|state.reset2 ; LCD:lcd_inst|next_command.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.646 ;; 0.404 ; LCD:lcd_inst|state.func_set ; LCD:lcd_inst|next_command.display_off ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.647 ;; 0.406 ; clk_div:clkdiv_inst|count_357Mhz[1] ; clk_div:clkdiv_inst|count_357Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.649 ;; 0.407 ; clk_div:clkdiv_inst|count_357Mhz[0] ; clk_div:clkdiv_inst|count_357Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.650 ;; 0.415 ; \random:rand_temp[4] ; \random:rand_temp[5] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.073 ; 0.659 ;; 0.415 ; \random:rand_temp[11] ; \random:rand_temp[12] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.073 ; 0.659 ;; 0.416 ; \random:rand_temp[3] ; \random:rand_temp[4] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.073 ; 0.660 ;; 0.416 ; \random:rand_temp[0] ; \random:rand_temp[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.073 ; 0.660 ;; 0.417 ; \random:rand_temp[1] ; \random:rand_temp[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.073 ; 0.661 ;; 0.418 ; LCD:lcd_inst|state.display_clear ; LCD:lcd_inst|next_command.display_on ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.661 ;; 0.421 ; LCD:lcd_inst|state.display_off ; LCD:lcd_inst|next_command.display_clear ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.664 ;; 0.432 ; ps2_read ; ps2_ascii_reg1[3] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.675 ;; 0.433 ; ps2_read ; ps2_ascii_reg1[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.676 ;; 0.458 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_ON ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 2.758 ; 3.120 ;; 0.471 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; -0.500 ; 2.763 ; 3.138 ;; 0.494 ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|state.reset2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.737 ;; 0.508 ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|state.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.751 ;; 0.508 ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|state.mode_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.071 ; 0.750 ;; 0.509 ; LCD:lcd_inst|next_command.display_off ; LCD:lcd_inst|state.display_off ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.072 ; 0.752 ;; 0.513 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset1 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 2.753 ; 3.170 ;; 0.513 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 2.753 ; 3.170 ;; 0.513 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 2.753 ; 3.170 ;; 0.513 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 2.753 ; 3.170 ;; 0.513 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 2.753 ; 3.170 ;; 0.513 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; -0.500 ; 2.753 ; 3.170 ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; 0.073 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 2.205 ; 2.662 ;; 0.387 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.387 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.398 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.039 ; 0.608 ;; 0.423 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.637 ;; 0.465 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; -0.500 ; 2.205 ; 2.554 ;; 0.590 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.804 ;; 0.590 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.804 ;; 0.627 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.841 ;; 0.639 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.853 ;; 0.726 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 0.940 ;; 0.846 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 1.060 ;; 0.995 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.043 ; 1.209 ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; 0.100 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.842 ; 1.326 ;; 0.387 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.387 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.398 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.039 ; 0.608 ;; 0.422 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.044 ; 0.637 ;; 0.584 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.044 ; 0.799 ;; 0.589 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.044 ; 0.804 ;; 0.596 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; -0.500 ; 0.842 ; 1.322 ;; 0.627 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.044 ; 0.842 ;; 0.641 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.044 ; 0.856 ;; 0.727 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.044 ; 0.942 ;; 0.844 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.044 ; 1.059 ;; 1.000 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.044 ; 1.215 ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; 0.181 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.985 ; 1.550 ;; 0.387 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.387 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.398 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.039 ; 0.608 ;; 0.420 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.045 ; 0.636 ;; 0.427 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.045 ; 0.643 ;; 0.579 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.045 ; 0.795 ;; 0.625 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.045 ; 0.841 ;; 0.652 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; -0.500 ; 0.985 ; 1.521 ;; 0.724 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.045 ; 0.940 ;; 0.784 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.045 ; 1.000 ;; 1.005 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.045 ; 1.221 ;; 1.142 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.045 ; 1.358 ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------++--------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'T80se:z80_inst|MREQ_n' ;+-------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; 0.336 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[19][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.260 ; 2.126 ;; 0.359 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[27][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.139 ; 2.028 ;; 0.444 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[19][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.266 ; 2.240 ;; 0.450 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[19][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.270 ; 2.250 ;; 0.475 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[19][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.107 ; 2.112 ;; 0.575 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[27][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.021 ; 2.126 ;; 0.585 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[19][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.107 ; 2.222 ;; 0.606 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[27][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.144 ; 2.280 ;; 0.611 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[19][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.260 ; 2.401 ;; 0.658 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[23][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.539 ; 1.727 ;; 0.659 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[19][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.091 ; 2.280 ;; 0.684 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[27][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.027 ; 2.241 ;; 0.687 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[27][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.029 ; 2.246 ;; 0.725 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[19][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.086 ; 2.341 ;; 0.731 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[27][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.037 ; 2.298 ;; 0.755 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[23][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.523 ; 1.808 ;; 0.757 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[27][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.033 ; 2.320 ;; 0.787 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[31][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.213 ; 2.530 ;; 0.790 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[28][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.855 ; 2.175 ;; 0.812 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[28][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.686 ; 2.028 ;; 0.825 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[14][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.355 ; 1.710 ;; 0.832 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[23][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.375 ; 1.737 ;; 0.839 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[20][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.983 ; 2.352 ;; 0.841 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[20][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.956 ; 2.327 ;; 0.850 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[28][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.838 ; 2.218 ;; 0.860 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[7][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.852 ; 1.242 ;; 0.866 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[1][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.343 ; 0.739 ;; 0.869 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[15][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.096 ; 1.495 ;; 0.872 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[6][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.929 ; 1.331 ;; 0.891 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[6][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.882 ; 1.303 ;; 0.894 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[31][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.184 ; 2.608 ;; 0.897 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[27][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.998 ; 2.425 ;; 0.897 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[28][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.698 ; 2.125 ;; 0.905 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[3][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.168 ; 0.603 ;; 0.908 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[17][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.034 ; 2.472 ;; 0.914 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[31][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.203 ; 2.647 ;; 0.922 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[9][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.515 ; 0.967 ;; 0.931 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[30][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.596 ; 2.057 ;; 0.932 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[25][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.060 ; 2.522 ;; 0.936 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[1][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.711 ; 1.177 ;; 0.943 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[9][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.656 ; 1.129 ;; 0.948 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[23][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.372 ; 1.850 ;; 0.948 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[15][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.232 ; 1.710 ;; 0.954 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[4][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.796 ; 1.280 ;; 0.957 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[12][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.159 ; 1.646 ;; 0.966 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[1][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.715 ; 1.211 ;; 0.966 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[28][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.728 ; 2.224 ;; 0.970 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[12][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.969 ; 1.469 ;; 0.976 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[17][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.019 ; 2.525 ;; 0.977 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[22][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.397 ; 1.904 ;; 0.978 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[23][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.520 ; 2.028 ;; 0.981 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[31][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.156 ; 2.667 ;; 1.000 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[28][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.701 ; 2.231 ;; 1.004 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[15][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.144 ; 1.678 ;; 1.006 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[17][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.032 ; 2.568 ;; 1.009 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[12][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.097 ; 1.636 ;; 1.011 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[18][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.752 ; 2.293 ;; 1.014 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[6][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.939 ; 1.483 ;; 1.018 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[6][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.068 ; 1.616 ;; 1.019 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[0][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.627 ; 1.176 ;; 1.020 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[28][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.698 ; 2.248 ;; 1.024 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[15][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.140 ; 1.694 ;; 1.031 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[31][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.198 ; 2.759 ;; 1.032 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[1][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.708 ; 1.270 ;; 1.035 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[21][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.598 ; 2.163 ;; 1.035 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[16][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.324 ; 2.889 ;; 1.035 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[14][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.074 ; 1.639 ;; 1.037 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[6][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.094 ; 1.661 ;; 1.039 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[23][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.541 ; 2.110 ;; 1.040 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[31][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.227 ; 2.797 ;; 1.040 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[12][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.128 ; 1.698 ;; 1.042 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[17][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.017 ; 2.589 ;; 1.043 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[9][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.754 ; 1.327 ;; 1.048 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[23][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.386 ; 1.964 ;; 1.050 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[1][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.713 ; 1.293 ;; 1.052 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[1][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.148 ; 0.730 ;; 1.052 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[20][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.951 ; 2.533 ;; 1.053 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[1][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.706 ; 1.289 ;; 1.057 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[31][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.210 ; 2.797 ;; 1.057 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[7][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.027 ; 1.614 ;; 1.062 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[16][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.176 ; 2.768 ;; 1.064 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[1][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.705 ; 1.299 ;; 1.065 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[14][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.900 ; 1.495 ;; 1.066 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[12][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.320 ; 1.916 ;; 1.074 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[9][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.706 ; 1.310 ;; 1.074 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[7][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.670 ; 1.274 ;; 1.081 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[14][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.035 ; 1.646 ;; 1.081 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[6][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.069 ; 1.680 ;; 1.082 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[16][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.183 ; 2.795 ;; 1.084 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[22][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.399 ; 2.013 ;; 1.089 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[17][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.024 ; 2.643 ;; 1.091 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[16][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.332 ; 2.953 ;; 1.091 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[0][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.117 ; 0.738 ;; 1.093 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[17][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.034 ; 2.657 ;; 1.095 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[21][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.771 ; 2.396 ;; 1.106 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[25][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.027 ; 2.663 ;; 1.106 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[20][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.806 ; 2.442 ;; 1.108 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[0][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.094 ; 0.732 ;; 1.111 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[31][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.231 ; 2.872 ;; 1.113 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[16][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 2.311 ; 2.954 ;+-------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_25MHz' ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; 0.348 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.331 ; 0.880 ;; 0.353 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.597 ;; 0.353 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.597 ;; 0.354 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.597 ;; 0.354 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.597 ;; 0.395 ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync_out ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.639 ;; 0.447 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.331 ; 0.979 ;; 0.462 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.331 ; 0.994 ;; 0.550 ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|address_reg_a[0] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|out_address_reg_a[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.794 ;; 0.575 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.819 ;; 0.599 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.842 ;; 0.604 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.848 ;; 0.606 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.850 ;; 0.610 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.853 ;; 0.614 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.858 ;; 0.618 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.862 ;; 0.620 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.320 ; 1.141 ;; 0.621 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.865 ;; 0.659 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.903 ;; 0.674 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.342 ; 1.217 ;; 0.684 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.342 ; 1.227 ;; 0.708 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.317 ; 1.226 ;; 0.730 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 0.975 ;; 0.735 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.979 ;; 0.735 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.314 ; 1.250 ;; 0.740 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.316 ; 1.257 ;; 0.742 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 0.986 ;; 0.743 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 0.986 ;; 0.749 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.315 ; 1.265 ;; 0.757 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.319 ; 1.277 ;; 0.763 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.311 ; 1.275 ;; 0.763 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.008 ;; 0.770 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.317 ; 1.288 ;; 0.782 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.317 ; 1.300 ;; 0.786 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.319 ; 1.306 ;; 0.822 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.066 ;; 0.825 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.070 ;; 0.825 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.070 ;; 0.851 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.062 ; 1.084 ;; 0.894 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.138 ;; 0.896 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.140 ;; 0.900 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.144 ;; 0.900 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.144 ;; 0.903 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.147 ;; 0.906 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.150 ;; 0.908 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.152 ;; 0.911 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.155 ;; 0.917 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.161 ;; 0.925 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 1.168 ;; 0.929 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.173 ;; 0.930 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.174 ;; 0.931 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.319 ; 1.451 ;; 0.936 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.180 ;; 0.936 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.181 ;; 0.947 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.191 ;; 0.953 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 1.196 ;; 0.955 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.199 ;; 0.955 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.199 ;; 0.977 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.317 ; 1.495 ;; 0.981 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.225 ;; 0.982 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.226 ;; 0.983 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.228 ;; 0.984 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.229 ;; 0.984 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.228 ;; 0.986 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.072 ; 1.229 ;; 0.995 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.239 ;; 0.999 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.243 ;; 1.001 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.246 ;; 1.002 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.246 ;; 1.010 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.254 ;; 1.010 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.254 ;; 1.018 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.262 ;; 1.021 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.265 ;; 1.025 ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_h ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.075 ; 1.271 ;; 1.027 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.271 ;; 1.031 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.316 ; 1.548 ;; 1.039 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.283 ;; 1.040 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.285 ;; 1.054 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.313 ; 1.568 ;; 1.058 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.063 ; 1.292 ;; 1.070 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.313 ; 1.584 ;; 1.107 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.302 ; 1.610 ;; 1.115 ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync_out ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.080 ; 1.366 ;; 1.117 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.361 ;; 1.120 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.364 ;; 1.126 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.370 ;; 1.128 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.301 ; 1.630 ;; 1.131 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.375 ;; 1.147 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.075 ; 1.393 ;; 1.153 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.074 ; 1.398 ;; 1.159 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.300 ; 1.660 ;; 1.159 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.300 ; 1.660 ;; 1.161 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.302 ; 1.664 ;; 1.163 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.298 ; 1.662 ;; 1.198 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.442 ;; 1.198 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.073 ; 1.442 ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; 0.387 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.387 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.387 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.039 ; 0.597 ;; 0.398 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.039 ; 0.608 ;; 0.417 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.631 ;; 0.425 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.639 ;; 0.427 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.641 ;; 0.588 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.802 ;; 0.628 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.842 ;; 0.639 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.853 ;; 0.677 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.891 ;; 0.687 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.043 ; 0.901 ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_100Hz' ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; 0.409 ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; 0.043 ; 0.623 ;; 0.608 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; 0.043 ; 0.822 ;; 4.667 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.236 ;; 4.667 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.236 ;; 4.696 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.614 ; 2.263 ;; 4.696 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.614 ; 2.263 ;; 4.748 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.611 ; 2.318 ;; 4.748 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.611 ; 2.318 ;; 4.759 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.328 ;; 4.759 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.328 ;; 4.788 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.613 ; 2.356 ;; 4.788 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.613 ; 2.356 ;; 4.821 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.390 ;; 4.821 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.390 ;; 4.839 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.408 ;; 4.839 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.408 ;; 5.232 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.801 ;; 5.232 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -2.612 ; 2.801 ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; 0.426 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.039 ; 0.636 ;; 0.438 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 0.653 ;; 0.617 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.039 ; 0.827 ;; 0.626 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.039 ; 0.836 ;; 0.633 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.039 ; 0.843 ;; 0.637 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.039 ; 0.847 ;; 0.660 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 0.875 ;; 0.726 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 0.941 ;; 0.897 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.112 ;; 0.899 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.114 ;; 0.908 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.123 ;; 0.909 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.124 ;; 0.919 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.134 ;; 0.920 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.135 ;; 0.998 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.213 ;; 1.007 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.222 ;; 1.009 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.224 ;; 1.018 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.233 ;; 1.093 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.308 ;; 1.093 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.308 ;; 1.093 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.308 ;; 1.093 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.308 ;; 1.379 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.594 ;; 1.379 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.594 ;; 1.379 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.044 ; 1.594 ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Hold: 'LCD:lcd_inst|clk_400hz_enable' ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; 2.100 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 1.306 ;; 2.108 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.782 ; 1.517 ;; 2.139 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 1.345 ;; 2.174 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.999 ; 1.366 ;; 2.237 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.077 ; 1.351 ;; 2.281 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.077 ; 1.395 ;; 2.375 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.782 ; 1.784 ;; 2.376 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.090 ; 1.477 ;; 2.415 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 1.621 ;; 2.417 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.782 ; 1.826 ;; 2.440 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.074 ; 1.557 ;; 2.464 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.058 ; 1.597 ;; 2.491 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 1.697 ;; 2.528 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.074 ; 1.645 ;; 2.564 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.999 ; 1.756 ;; 2.602 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.782 ; 2.011 ;; 2.673 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.999 ; 1.865 ;; 2.675 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.077 ; 1.789 ;; 2.779 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.058 ; 1.912 ;; 2.786 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.999 ; 1.978 ;; 2.805 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.058 ; 1.938 ;; 2.814 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 2.020 ;; 2.869 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 2.075 ;; 2.872 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 2.078 ;; 2.884 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.058 ; 2.017 ;; 2.888 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.074 ; 2.005 ;; 2.939 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.782 ; 2.348 ;; 2.964 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.090 ; 2.065 ;; 2.985 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.077 ; 2.099 ;; 2.993 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.999 ; 2.185 ;; 3.042 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.090 ; 2.143 ;; 3.063 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.074 ; 2.180 ;; 3.080 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 2.286 ;; 3.108 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.090 ; 2.209 ;; 3.109 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 2.315 ;; 3.146 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.090 ; 2.247 ;; 3.186 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.058 ; 2.319 ;; 3.193 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.077 ; 2.307 ;; 3.307 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -1.074 ; 2.424 ;; 3.319 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.985 ; 2.525 ;; 7.334 ; lcdvram[3][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -4.596 ; 2.419 ;; 7.337 ; lcdvram[11][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -4.712 ; 2.306 ;; 7.577 ; lcdvram[11][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.486 ; 1.772 ;; 7.626 ; lcdvram[15][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.944 ; 1.363 ;; 7.668 ; lcdvram[3][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -4.907 ; 2.442 ;; 7.687 ; lcdvram[10][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.473 ; 1.895 ;; 7.692 ; lcdvram[8][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.135 ; 2.238 ;; 7.696 ; lcdvram[3][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -4.996 ; 2.381 ;; 7.696 ; lcdvram[10][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -4.663 ; 2.714 ;; 7.795 ; lcdvram[8][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.362 ; 2.114 ;; 7.797 ; lcdvram[2][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.035 ; 2.443 ;; 7.819 ; lcdvram[3][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.473 ; 2.027 ;; 7.867 ; lcdvram[9][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.513 ; 2.035 ;; 7.879 ; lcdvram[15][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.852 ; 1.708 ;; 7.886 ; lcdvram[5][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.493 ; 2.074 ;; 7.906 ; lcdvram[3][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.218 ; 2.369 ;; 7.910 ; lcdvram[13][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.292 ; 2.299 ;; 7.979 ; lcdvram[5][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.637 ; 2.023 ;; 7.990 ; lcdvram[29][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.061 ; 1.610 ;; 7.998 ; lcdvram[14][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.084 ; 1.595 ;; 7.999 ; lcdvram[2][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -4.842 ; 2.838 ;; 8.013 ; lcdvram[8][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.513 ; 2.181 ;; 8.017 ; lcdvram[11][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.709 ; 1.989 ;; 8.023 ; lcdvram[0][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.262 ; 2.442 ;; 8.026 ; lcdvram[9][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.569 ; 2.138 ;; 8.084 ; lcdvram[5][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.534 ; 2.231 ;; 8.119 ; lcdvram[5][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.662 ; 2.138 ;; 8.125 ; lcdvram[2][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.303 ; 2.503 ;; 8.139 ; lcdvram[6][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.080 ; 1.740 ;; 8.139 ; lcdvram[12][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.743 ; 2.077 ;; 8.167 ; lcdvram[10][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.960 ; 1.888 ;; 8.180 ; lcdvram[13][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.511 ; 2.350 ;; 8.183 ; lcdvram[4][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.193 ; 2.671 ;; 8.192 ; lcdvram[9][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.556 ; 2.317 ;; 8.199 ; lcdvram[10][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.167 ; 2.713 ;; 8.220 ; lcdvram[15][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.709 ; 2.192 ;; 8.235 ; lcdvram[29][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.278 ; 1.638 ;; 8.237 ; lcdvram[14][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.076 ; 1.842 ;; 8.237 ; lcdvram[9][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.792 ; 2.126 ;; 8.253 ; lcdvram[5][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.583 ; 2.351 ;; 8.266 ; lcdvram[6][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.066 ; 1.881 ;; 8.272 ; lcdvram[10][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.149 ; 2.804 ;; 8.275 ; lcdvram[1][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.478 ; 2.478 ;; 8.276 ; lcdvram[14][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.971 ; 1.986 ;; 8.282 ; lcdvram[7][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.967 ; 1.996 ;; 8.287 ; lcdvram[5][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.287 ; 2.681 ;; 8.295 ; lcdvram[7][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.688 ; 2.288 ;; 8.304 ; lcdvram[8][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.579 ; 2.406 ;; 8.310 ; lcdvram[6][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.046 ; 1.945 ;; 8.319 ; lcdvram[7][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.024 ; 1.976 ;; 8.322 ; lcdvram[5][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.650 ; 2.353 ;; 8.323 ; lcdvram[8][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.812 ; 2.192 ;; 8.328 ; lcdvram[13][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.601 ; 2.408 ;; 8.328 ; lcdvram[15][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.139 ; 1.870 ;; 8.336 ; lcdvram[11][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.427 ; 2.590 ;; 8.348 ; lcdvram[10][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.858 ; 2.171 ;; 8.366 ; lcdvram[23][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -6.279 ; 1.768 ;; 8.368 ; lcdvram[5][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.504 ; 2.545 ;; 8.375 ; lcdvram[3][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -4.889 ; 3.167 ;; 8.378 ; lcdvram[11][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -5.423 ; 2.636 ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Recovery: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; -2.255 ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ; CLOCK_50 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 1.000 ; -1.511 ; 1.743 ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Removal: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; 2.789 ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ; CLOCK_50 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 0.000 ; -1.341 ; 1.639 ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'SW[16]' ;+--------+--------------+----------------+------------+--------+------------+---------------------------------------------------------------------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------+--------+------------+---------------------------------------------------------------------------------------------------------------+; -3.000 ; 1.000 ; 4.000 ; Port Rate ; SW[16] ; Rise ; SW[16] ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_we_reg ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_datain_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; SW[16] ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_we_reg ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; LCDON_reg ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|IORQ_n ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|MREQ_n ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|RD_n ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[10] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[11] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[12] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[13] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[14] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[15] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Alternate ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Arith16_r ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BTR_r ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[1] ;+--------+--------------+----------------+------------+--------+------------+---------------------------------------------------------------------------------------------------------------++-----------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'CLOCK_50' ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------+; -3.000 ; 1.000 ; 4.000 ; Port Rate ; CLOCK_50 ; Rise ; CLOCK_50 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_EN ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_ON ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_RS ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_400hz_enable ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[10] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[11] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[12] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[13] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[14] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[15] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[16] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[17] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[18] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[19] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_clear ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_off ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_on ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.func_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.line2 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.mode_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.print_string ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.reset2 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.reset3 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.return_home ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_clear ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_off ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_on ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.drop_LCD_EN ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.func_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.hold ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.line2 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.mode_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.print_string ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset1 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset2 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset3 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.return_home ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[10] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[11] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[12] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[13] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[14] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[15] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_100Hz ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_10MHz ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_10Mhz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_25Mhz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_357Mhz ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_357Mhz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; CLOCK_50 ; Rise ; ps2_read ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25MHz' ;+--------+--------------+----------------+------------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------+; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a13 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a13~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9~porta_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ;; -2.649 ; 1.000 ; 3.649 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|address_reg_a[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|out_address_reg_a[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync_out ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync_out ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_h ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_v ;; 0.215 ; 0.433 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|address_reg_a[0] ;; 0.215 ; 0.433 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|out_address_reg_a[0] ;; 0.215 ; 0.433 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ;; 0.215 ; 0.433 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ;; 0.217 ; 0.435 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ;; 0.217 ; 0.435 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ;; 0.217 ; 0.435 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ;+--------+--------------+----------------+------------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.226 ; 0.444 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.366 ; 0.552 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; 0.367 ; 0.553 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.484 ; 0.484 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[2]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[0]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[1]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[2]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[3]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|READ_CHAR|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[0]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[1]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[2]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[3]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[4]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[5]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[6]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[7]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[8]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[0]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[1]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[3]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[4]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[5]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[6]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[7]|clk ;; 0.490 ; 0.490 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|inclk[0] ;; 0.490 ; 0.490 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|outclk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered|q ;; 0.510 ; 0.510 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|inclk[0] ;; 0.510 ; 0.510 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|outclk ;; 0.514 ; 0.514 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[5]|clk ;; 0.515 ; 0.515 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[0]|clk ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------++--------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'LCD:lcd_inst|clk_400hz_enable' ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.203 ; 0.421 ; 0.218 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; 0.225 ; 0.443 ; 0.218 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.227 ; 0.445 ; 0.218 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; 0.244 ; 0.462 ; 0.218 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; 0.244 ; 0.462 ; 0.218 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; 0.244 ; 0.462 ; 0.218 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; 0.245 ; 0.463 ; 0.218 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; 0.246 ; 0.464 ; 0.218 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; 0.348 ; 0.534 ; 0.186 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; 0.349 ; 0.535 ; 0.186 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; 0.349 ; 0.535 ; 0.186 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; 0.350 ; 0.536 ; 0.186 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; 0.350 ; 0.536 ; 0.186 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; 0.366 ; 0.552 ; 0.186 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; 0.368 ; 0.554 ; 0.186 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.390 ; 0.576 ; 0.186 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; 0.461 ; 0.461 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4]|clk ;; 0.483 ; 0.483 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7]|clk ;; 0.485 ; 0.485 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2]|clk ;; 0.496 ; 0.496 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6]|clk ;; 0.497 ; 0.497 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0]|clk ;; 0.497 ; 0.497 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1]|clk ;; 0.498 ; 0.498 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3]|clk ;; 0.498 ; 0.498 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; lcd_inst|clk_400hz_enable|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; lcd_inst|clk_400hz_enable|q ;; 0.502 ; 0.502 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1]|clk ;; 0.502 ; 0.502 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3]|clk ;; 0.502 ; 0.502 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5]|clk ;; 0.503 ; 0.503 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0]|clk ;; 0.504 ; 0.504 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6]|clk ;; 0.514 ; 0.514 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2]|clk ;; 0.516 ; 0.516 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7]|clk ;; 0.538 ; 0.538 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4]|clk ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.290 ; 0.476 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; 0.290 ; 0.476 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; 0.290 ; 0.476 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; 0.290 ; 0.476 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; 0.290 ; 0.476 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; 0.290 ; 0.476 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.306 ; 0.524 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; 0.306 ; 0.524 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; 0.306 ; 0.524 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; 0.306 ; 0.524 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; 0.306 ; 0.524 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; 0.306 ; 0.524 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|clk ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[0]|clk ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[1]|clk ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[2]|clk ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[3]|clk ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[4]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_25Mhz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_25Mhz_int|q ;; 0.562 ; 0.562 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|clk ;; 0.562 ; 0.562 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[0]|clk ;; 0.562 ; 0.562 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[1]|clk ;; 0.562 ; 0.562 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[2]|clk ;; 0.562 ; 0.562 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[3]|clk ;; 0.562 ; 0.562 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[4]|clk ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.226 ; 0.444 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; 0.226 ; 0.444 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; 0.226 ; 0.444 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; 0.226 ; 0.444 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.366 ; 0.552 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; 0.366 ; 0.552 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; 0.366 ; 0.552 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; 0.366 ; 0.552 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.484 ; 0.484 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|clk ;; 0.484 ; 0.484 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[0]|clk ;; 0.484 ; 0.484 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[1]|clk ;; 0.484 ; 0.484 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_100Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_100Khz_int|q ;; 0.514 ; 0.514 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|clk ;; 0.514 ; 0.514 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[0]|clk ;; 0.514 ; 0.514 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[1]|clk ;; 0.514 ; 0.514 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[2]|clk ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.285 ; 0.471 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; 0.285 ; 0.471 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; 0.285 ; 0.471 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; 0.285 ; 0.471 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.311 ; 0.529 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; 0.311 ; 0.529 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; 0.311 ; 0.529 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; 0.311 ; 0.529 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.431 ; 0.431 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|clk ;; 0.431 ; 0.431 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[0]|clk ;; 0.431 ; 0.431 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[1]|clk ;; 0.431 ; 0.431 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|q ;; 0.567 ; 0.567 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|clk ;; 0.567 ; 0.567 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[0]|clk ;; 0.567 ; 0.567 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[1]|clk ;; 0.567 ; 0.567 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[2]|clk ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.249 ; 0.467 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; 0.249 ; 0.467 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; 0.249 ; 0.467 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; 0.249 ; 0.467 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.345 ; 0.531 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; 0.345 ; 0.531 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; 0.345 ; 0.531 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; 0.345 ; 0.531 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.493 ; 0.493 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_100hz_int|clk ;; 0.493 ; 0.493 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[0]|clk ;; 0.493 ; 0.493 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[1]|clk ;; 0.493 ; 0.493 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|q ;; 0.507 ; 0.507 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_100hz_int|clk ;; 0.507 ; 0.507 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[0]|clk ;; 0.507 ; 0.507 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[1]|clk ;; 0.507 ; 0.507 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[2]|clk ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------++----------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.258 ; 0.476 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; 0.258 ; 0.476 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; 0.258 ; 0.476 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; 0.258 ; 0.476 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.336 ; 0.522 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; 0.336 ; 0.522 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; 0.336 ; 0.522 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; 0.336 ; 0.522 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.484 ; 0.484 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_100Khz_int|clk ;; 0.484 ; 0.484 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[0]|clk ;; 0.484 ; 0.484 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[1]|clk ;; 0.484 ; 0.484 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|q ;; 0.516 ; 0.516 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_100Khz_int|clk ;; 0.516 ; 0.516 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[0]|clk ;; 0.516 ; 0.516 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[1]|clk ;; 0.516 ; 0.516 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[2]|clk ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------++----------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Hz' ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; -1.285 ; 1.000 ; 2.285 ; Min Period ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.243 ; 0.461 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; 0.243 ; 0.461 ; 0.218 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.351 ; 0.537 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; 0.351 ; 0.537 ; 0.186 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.499 ; 0.499 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[0]|clk ;; 0.499 ; 0.499 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[1]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; clkdiv_inst|clock_100Hz|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; clkdiv_inst|clock_100Hz|q ;; 0.501 ; 0.501 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[0]|clk ;; 0.501 ; 0.501 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[1]|clk ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------+; -1.285 ; 1.000 ; 2.285 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.254 ; 0.472 ; 0.218 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.340 ; 0.526 ; 0.186 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.488 ; 0.488 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|scan_ready|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|q ;; 0.512 ; 0.512 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|scan_ready|clk ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------++-----------------------------------------------------------------------------------------------------------------------+; Slow 1200mV 0C Model Minimum Pulse Width: 'T80se:z80_inst|MREQ_n' ;+--------+--------------+----------------+------------------+-----------------------+------------+----------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-----------------------+------------+----------------------+; -0.004 ; -0.004 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][5] ;; -0.002 ; -0.002 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][0] ;; -0.002 ; -0.002 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][2] ;; -0.002 ; -0.002 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][4] ;; -0.001 ; -0.001 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][3] ;; -0.001 ; -0.001 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][6] ;; 0.003 ; 0.003 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][0] ;; 0.009 ; 0.009 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][3]|dataa ;; 0.012 ; 0.012 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][0]|datac ;; 0.012 ; 0.012 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][2]|datac ;; 0.012 ; 0.012 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][4]|datac ;; 0.013 ; 0.013 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][6]|datac ;; 0.016 ; 0.016 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][6] ;; 0.017 ; 0.017 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][0]|datac ;; 0.020 ; 0.020 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][5] ;; 0.027 ; 0.027 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][6]|datac ;; 0.028 ; 0.028 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[8][7] ;; 0.030 ; 0.030 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][4] ;; 0.030 ; 0.030 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][5]|datad ;; 0.031 ; 0.031 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][1] ;; 0.031 ; 0.031 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][5] ;; 0.032 ; 0.032 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][3] ;; 0.035 ; 0.035 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][0] ;; 0.035 ; 0.035 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][7] ;; 0.040 ; 0.040 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[0][5]|datab ;; 0.040 ; 0.040 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][6] ;; 0.042 ; 0.042 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[13][4] ;; 0.045 ; 0.045 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][0]|dataa ;; 0.045 ; 0.045 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][7]|dataa ;; 0.045 ; 0.045 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][1]|datac ;; 0.045 ; 0.045 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][5]|datac ;; 0.047 ; 0.047 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][1] ;; 0.049 ; 0.049 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[13][7] ;; 0.052 ; 0.052 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][1] ;; 0.053 ; 0.053 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][0] ;; 0.054 ; 0.054 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][2] ;; 0.054 ; 0.054 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][4] ;; 0.054 ; 0.054 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][6] ;; 0.054 ; 0.054 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[9][2] ;; 0.055 ; 0.055 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][3] ;; 0.055 ; 0.055 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][0] ;; 0.055 ; 0.055 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][5] ;; 0.056 ; 0.056 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][2]|datab ;; 0.057 ; 0.057 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[3][7] ;; 0.058 ; 0.058 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][2] ;; 0.058 ; 0.058 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][4]|datab ;; 0.058 ; 0.058 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[1][3] ;; 0.061 ; 0.061 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][1]|datac ;; 0.062 ; 0.062 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[8][7]|datad ;; 0.063 ; 0.063 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][2] ;; 0.064 ; 0.064 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][4]|datad ;; 0.065 ; 0.065 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[2][6] ;; 0.065 ; 0.065 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[9][2]|datac ;; 0.066 ; 0.066 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][3] ;; 0.066 ; 0.066 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][4] ;; 0.067 ; 0.067 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][0] ;; 0.068 ; 0.068 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][2]|dataa ;; 0.068 ; 0.068 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][3]|dataa ;; 0.069 ; 0.069 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][1] ;; 0.070 ; 0.070 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[11][6] ;; 0.071 ; 0.071 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][3]|datab ;; 0.071 ; 0.071 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[3][7]|datac ;; 0.072 ; 0.072 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[10][1]|datab ;; 0.073 ; 0.073 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][0]|datab ;; 0.074 ; 0.074 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][1] ;; 0.074 ; 0.074 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][4] ;; 0.074 ; 0.074 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[0][6]|datad ;; 0.074 ; 0.074 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][7]|datab ;; 0.075 ; 0.075 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[0][2] ;; 0.075 ; 0.075 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][6] ;; 0.075 ; 0.075 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[2][2]|dataa ;; 0.075 ; 0.075 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[2][6]|dataa ;; 0.075 ; 0.075 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[9][6] ;; 0.076 ; 0.076 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[13][4]|datad ;; 0.076 ; 0.076 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[3][3] ;; 0.076 ; 0.076 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[3][5] ;; 0.077 ; 0.077 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][7] ;; 0.078 ; 0.078 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[0][0]|datac ;; 0.078 ; 0.078 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[1][3]|datab ;; 0.080 ; 0.080 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][2] ;; 0.080 ; 0.080 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][3]|datac ;; 0.080 ; 0.080 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][7] ;; 0.080 ; 0.080 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][3] ;; 0.080 ; 0.080 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][7] ;; 0.081 ; 0.081 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][7] ;; 0.081 ; 0.081 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][6] ;; 0.082 ; 0.082 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[10][5] ;; 0.082 ; 0.082 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][4] ;; 0.082 ; 0.082 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][6] ;; 0.083 ; 0.083 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][0] ;; 0.083 ; 0.083 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[8][6] ;; 0.086 ; 0.086 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][3] ;; 0.087 ; 0.087 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][0] ;; 0.087 ; 0.087 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[30][1] ;; 0.087 ; 0.087 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[3][3]|datac ;; 0.087 ; 0.087 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[3][5]|datac ;; 0.087 ; 0.087 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][7]|dataa ;; 0.087 ; 0.087 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][7] ;; 0.088 ; 0.088 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[0][1]|datac ;; 0.088 ; 0.088 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[0][4]|datac ;+--------+--------------+----------------+------------------+-----------------------+------------+----------------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Setup Times ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------+; PS2_CLK ; CLOCK_50 ; 3.137 ; 3.558 ; Rise ; CLOCK_50 ;; SW[*] ; CLOCK_50 ; 4.473 ; 4.960 ; Rise ; CLOCK_50 ;; SW[17] ; CLOCK_50 ; 4.473 ; 4.960 ; Rise ; CLOCK_50 ;; KEY[*] ; SW[16] ; 3.173 ; 3.474 ; Rise ; SW[16] ;; KEY[0] ; SW[16] ; 3.173 ; 3.474 ; Rise ; SW[16] ;; KEY[1] ; SW[16] ; 2.615 ; 2.936 ; Rise ; SW[16] ;; KEY[2] ; SW[16] ; 2.272 ; 2.555 ; Rise ; SW[16] ;; KEY[3] ; SW[16] ; 1.139 ; 1.512 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 2.869 ; 3.094 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 2.869 ; 3.094 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 2.557 ; 3.002 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 1.750 ; 2.248 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 1.904 ; 2.366 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 1.490 ; 1.924 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 1.465 ; 1.858 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 2.071 ; 2.490 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 1.910 ; 2.337 ; Rise ; SW[16] ;; SW[*] ; SW[16] ; 3.145 ; 3.500 ; Rise ; SW[16] ;; SW[0] ; SW[16] ; 3.145 ; 3.500 ; Rise ; SW[16] ;; SW[1] ; SW[16] ; 1.800 ; 2.124 ; Rise ; SW[16] ;; SW[2] ; SW[16] ; 2.414 ; 2.836 ; Rise ; SW[16] ;; SW[3] ; SW[16] ; 1.625 ; 2.027 ; Rise ; SW[16] ;; SW[4] ; SW[16] ; 0.818 ; 1.160 ; Rise ; SW[16] ;; SW[5] ; SW[16] ; 1.129 ; 1.470 ; Rise ; SW[16] ;; SW[6] ; SW[16] ; 1.799 ; 2.155 ; Rise ; SW[16] ;; SW[7] ; SW[16] ; 1.718 ; 2.028 ; Rise ; SW[16] ;; SW[8] ; SW[16] ; 2.871 ; 3.072 ; Rise ; SW[16] ;; SW[9] ; SW[16] ; 2.630 ; 3.052 ; Rise ; SW[16] ;; SW[10] ; SW[16] ; 2.087 ; 2.455 ; Rise ; SW[16] ;; SW[11] ; SW[16] ; 2.687 ; 3.041 ; Rise ; SW[16] ;; SW[12] ; SW[16] ; 0.978 ; 1.271 ; Rise ; SW[16] ;; SW[13] ; SW[16] ; 1.716 ; 2.041 ; Rise ; SW[16] ;; SW[14] ; SW[16] ; 1.751 ; 2.081 ; Rise ; SW[16] ;; SW[15] ; SW[16] ; 1.917 ; 2.193 ; Rise ; SW[16] ;; PS2_DAT ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 2.405 ; 2.698 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[*] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 3.325 ; 3.795 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[17] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 3.325 ; 3.795 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Hold Times ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------+; PS2_CLK ; CLOCK_50 ; -2.672 ; -3.078 ; Rise ; CLOCK_50 ;; SW[*] ; CLOCK_50 ; -2.579 ; -2.910 ; Rise ; CLOCK_50 ;; SW[17] ; CLOCK_50 ; -2.579 ; -2.910 ; Rise ; CLOCK_50 ;; KEY[*] ; SW[16] ; 0.056 ; -0.333 ; Rise ; SW[16] ;; KEY[0] ; SW[16] ; -1.864 ; -2.164 ; Rise ; SW[16] ;; KEY[1] ; SW[16] ; -1.335 ; -1.680 ; Rise ; SW[16] ;; KEY[2] ; SW[16] ; -1.105 ; -1.411 ; Rise ; SW[16] ;; KEY[3] ; SW[16] ; 0.056 ; -0.333 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; -0.412 ; -0.788 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; -1.836 ; -2.033 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; -1.346 ; -1.751 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; -0.683 ; -1.173 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; -0.687 ; -1.131 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; -0.453 ; -0.871 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; -0.412 ; -0.788 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; -0.945 ; -1.381 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; -0.907 ; -1.350 ; Rise ; SW[16] ;; SW[*] ; SW[16] ; 0.113 ; -0.210 ; Rise ; SW[16] ;; SW[0] ; SW[16] ; -1.857 ; -2.200 ; Rise ; SW[16] ;; SW[1] ; SW[16] ; -0.662 ; -0.948 ; Rise ; SW[16] ;; SW[2] ; SW[16] ; -1.275 ; -1.645 ; Rise ; SW[16] ;; SW[3] ; SW[16] ; -0.427 ; -0.809 ; Rise ; SW[16] ;; SW[4] ; SW[16] ; 0.113 ; -0.210 ; Rise ; SW[16] ;; SW[5] ; SW[16] ; -0.144 ; -0.462 ; Rise ; SW[16] ;; SW[6] ; SW[16] ; -0.770 ; -1.085 ; Rise ; SW[16] ;; SW[7] ; SW[16] ; -0.788 ; -1.097 ; Rise ; SW[16] ;; SW[8] ; SW[16] ; -1.843 ; -2.010 ; Rise ; SW[16] ;; SW[9] ; SW[16] ; -1.382 ; -1.756 ; Rise ; SW[16] ;; SW[10] ; SW[16] ; -1.008 ; -1.365 ; Rise ; SW[16] ;; SW[11] ; SW[16] ; -1.449 ; -1.753 ; Rise ; SW[16] ;; SW[12] ; SW[16] ; -0.040 ; -0.316 ; Rise ; SW[16] ;; SW[13] ; SW[16] ; -0.709 ; -1.016 ; Rise ; SW[16] ;; SW[14] ; SW[16] ; -0.725 ; -1.017 ; Rise ; SW[16] ;; SW[15] ; SW[16] ; -0.981 ; -1.258 ; Rise ; SW[16] ;; PS2_DAT ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.505 ; -0.839 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[*] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -1.117 ; -1.496 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[17] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -1.117 ; -1.496 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------++-------------------------------------------------------------------------------------------------------------------+; Clock to Output Times ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; LCD_DATA[*] ; CLOCK_50 ; 11.083 ; 11.108 ; Rise ; CLOCK_50 ;; LCD_DATA[0] ; CLOCK_50 ; 10.705 ; 10.397 ; Rise ; CLOCK_50 ;; LCD_DATA[1] ; CLOCK_50 ; 9.501 ; 9.362 ; Rise ; CLOCK_50 ;; LCD_DATA[2] ; CLOCK_50 ; 11.083 ; 10.908 ; Rise ; CLOCK_50 ;; LCD_DATA[3] ; CLOCK_50 ; 10.749 ; 11.108 ; Rise ; CLOCK_50 ;; LCD_DATA[4] ; CLOCK_50 ; 10.014 ; 10.124 ; Rise ; CLOCK_50 ;; LCD_DATA[5] ; CLOCK_50 ; 10.664 ; 11.078 ; Rise ; CLOCK_50 ;; LCD_DATA[6] ; CLOCK_50 ; 8.734 ; 8.584 ; Rise ; CLOCK_50 ;; LCD_DATA[7] ; CLOCK_50 ; 10.872 ; 10.407 ; Rise ; CLOCK_50 ;; LCD_EN ; CLOCK_50 ; 11.321 ; 11.709 ; Rise ; CLOCK_50 ;; LCD_ON ; CLOCK_50 ; 11.238 ; 10.826 ; Rise ; CLOCK_50 ;; LCD_RS ; CLOCK_50 ; 9.954 ; 9.781 ; Rise ; CLOCK_50 ;; HEX0[*] ; SW[16] ; 15.234 ; 15.014 ; Rise ; SW[16] ;; HEX0[0] ; SW[16] ; 13.907 ; 13.766 ; Rise ; SW[16] ;; HEX0[1] ; SW[16] ; 15.089 ; 15.014 ; Rise ; SW[16] ;; HEX0[2] ; SW[16] ; 14.130 ; 13.903 ; Rise ; SW[16] ;; HEX0[3] ; SW[16] ; 13.321 ; 13.204 ; Rise ; SW[16] ;; HEX0[4] ; SW[16] ; 13.188 ; 13.001 ; Rise ; SW[16] ;; HEX0[5] ; SW[16] ; 15.234 ; 14.752 ; Rise ; SW[16] ;; HEX0[6] ; SW[16] ; 13.331 ; 13.483 ; Rise ; SW[16] ;; HEX1[*] ; SW[16] ; 15.603 ; 14.924 ; Rise ; SW[16] ;; HEX1[0] ; SW[16] ; 13.113 ; 12.878 ; Rise ; SW[16] ;; HEX1[1] ; SW[16] ; 14.238 ; 13.754 ; Rise ; SW[16] ;; HEX1[2] ; SW[16] ; 13.274 ; 13.192 ; Rise ; SW[16] ;; HEX1[3] ; SW[16] ; 13.819 ; 13.448 ; Rise ; SW[16] ;; HEX1[4] ; SW[16] ; 13.309 ; 13.111 ; Rise ; SW[16] ;; HEX1[5] ; SW[16] ; 15.603 ; 14.924 ; Rise ; SW[16] ;; HEX1[6] ; SW[16] ; 13.883 ; 14.321 ; Rise ; SW[16] ;; HEX2[*] ; SW[16] ; 14.210 ; 13.676 ; Rise ; SW[16] ;; HEX2[0] ; SW[16] ; 13.702 ; 13.225 ; Rise ; SW[16] ;; HEX2[1] ; SW[16] ; 12.720 ; 12.481 ; Rise ; SW[16] ;; HEX2[2] ; SW[16] ; 14.210 ; 13.676 ; Rise ; SW[16] ;; HEX2[3] ; SW[16] ; 14.150 ; 13.653 ; Rise ; SW[16] ;; HEX2[4] ; SW[16] ; 14.157 ; 13.584 ; Rise ; SW[16] ;; HEX2[5] ; SW[16] ; 13.032 ; 12.723 ; Rise ; SW[16] ;; HEX2[6] ; SW[16] ; 12.677 ; 12.899 ; Rise ; SW[16] ;; HEX3[*] ; SW[16] ; 16.082 ; 15.260 ; Rise ; SW[16] ;; HEX3[0] ; SW[16] ; 14.228 ; 13.717 ; Rise ; SW[16] ;; HEX3[1] ; SW[16] ; 13.795 ; 13.569 ; Rise ; SW[16] ;; HEX3[2] ; SW[16] ; 16.082 ; 15.260 ; Rise ; SW[16] ;; HEX3[3] ; SW[16] ; 13.438 ; 13.238 ; Rise ; SW[16] ;; HEX3[4] ; SW[16] ; 14.298 ; 13.984 ; Rise ; SW[16] ;; HEX3[5] ; SW[16] ; 13.666 ; 13.434 ; Rise ; SW[16] ;; HEX3[6] ; SW[16] ; 12.752 ; 12.899 ; Rise ; SW[16] ;; HEX4[*] ; SW[16] ; 13.594 ; 13.261 ; Rise ; SW[16] ;; HEX4[0] ; SW[16] ; 13.594 ; 13.261 ; Rise ; SW[16] ;; HEX4[1] ; SW[16] ; 13.491 ; 13.224 ; Rise ; SW[16] ;; HEX4[2] ; SW[16] ; 12.299 ; 12.051 ; Rise ; SW[16] ;; HEX4[3] ; SW[16] ; 12.265 ; 12.086 ; Rise ; SW[16] ;; HEX4[4] ; SW[16] ; 12.480 ; 12.317 ; Rise ; SW[16] ;; HEX4[5] ; SW[16] ; 12.343 ; 12.102 ; Rise ; SW[16] ;; HEX4[6] ; SW[16] ; 11.811 ; 11.932 ; Rise ; SW[16] ;; HEX5[*] ; SW[16] ; 14.465 ; 14.001 ; Rise ; SW[16] ;; HEX5[0] ; SW[16] ; 13.615 ; 13.316 ; Rise ; SW[16] ;; HEX5[1] ; SW[16] ; 14.465 ; 14.001 ; Rise ; SW[16] ;; HEX5[2] ; SW[16] ; 12.835 ; 12.606 ; Rise ; SW[16] ;; HEX5[3] ; SW[16] ; 13.116 ; 12.838 ; Rise ; SW[16] ;; HEX5[4] ; SW[16] ; 12.815 ; 12.620 ; Rise ; SW[16] ;; HEX5[5] ; SW[16] ; 13.545 ; 13.211 ; Rise ; SW[16] ;; HEX5[6] ; SW[16] ; 12.687 ; 12.875 ; Rise ; SW[16] ;; HEX6[*] ; SW[16] ; 13.147 ; 12.614 ; Rise ; SW[16] ;; HEX6[0] ; SW[16] ; 12.373 ; 12.099 ; Rise ; SW[16] ;; HEX6[1] ; SW[16] ; 11.301 ; 11.146 ; Rise ; SW[16] ;; HEX6[2] ; SW[16] ; 11.307 ; 11.100 ; Rise ; SW[16] ;; HEX6[3] ; SW[16] ; 12.673 ; 12.350 ; Rise ; SW[16] ;; HEX6[4] ; SW[16] ; 11.331 ; 11.161 ; Rise ; SW[16] ;; HEX6[5] ; SW[16] ; 13.147 ; 12.614 ; Rise ; SW[16] ;; HEX6[6] ; SW[16] ; 11.498 ; 11.696 ; Rise ; SW[16] ;; HEX7[*] ; SW[16] ; 11.843 ; 12.057 ; Rise ; SW[16] ;; HEX7[0] ; SW[16] ; 11.785 ; 11.541 ; Rise ; SW[16] ;; HEX7[1] ; SW[16] ; 11.465 ; 11.291 ; Rise ; SW[16] ;; HEX7[2] ; SW[16] ; 11.644 ; 11.400 ; Rise ; SW[16] ;; HEX7[3] ; SW[16] ; 11.654 ; 11.441 ; Rise ; SW[16] ;; HEX7[4] ; SW[16] ; 11.572 ; 11.399 ; Rise ; SW[16] ;; HEX7[5] ; SW[16] ; 11.524 ; 11.368 ; Rise ; SW[16] ;; HEX7[6] ; SW[16] ; 11.843 ; 12.057 ; Rise ; SW[16] ;; LEDG[*] ; SW[16] ; 16.442 ; 16.149 ; Rise ; SW[16] ;; LEDG[0] ; SW[16] ; 12.561 ; 12.517 ; Rise ; SW[16] ;; LEDG[1] ; SW[16] ; 16.442 ; 16.149 ; Rise ; SW[16] ;; LEDG[2] ; SW[16] ; 14.294 ; 14.114 ; Rise ; SW[16] ;; LEDG[3] ; SW[16] ; 13.035 ; 12.904 ; Rise ; SW[16] ;; LEDG[4] ; SW[16] ; 13.678 ; 13.488 ; Rise ; SW[16] ;; LEDG[5] ; SW[16] ; 12.524 ; 12.424 ; Rise ; SW[16] ;; LEDG[6] ; SW[16] ; 13.596 ; 13.394 ; Rise ; SW[16] ;; LEDG[7] ; SW[16] ; 13.949 ; 13.725 ; Rise ; SW[16] ;; LEDR[*] ; SW[16] ; 16.646 ; 16.505 ; Rise ; SW[16] ;; LEDR[0] ; SW[16] ; 12.298 ; 12.230 ; Rise ; SW[16] ;; LEDR[1] ; SW[16] ; 15.458 ; 15.084 ; Rise ; SW[16] ;; LEDR[2] ; SW[16] ; 16.646 ; 16.505 ; Rise ; SW[16] ;; LEDR[3] ; SW[16] ; 13.524 ; 13.459 ; Rise ; SW[16] ;; LEDR[4] ; SW[16] ; 12.814 ; 12.744 ; Rise ; SW[16] ;; LEDR[5] ; SW[16] ; 14.928 ; 14.612 ; Rise ; SW[16] ;; LEDR[6] ; SW[16] ; 13.219 ; 13.181 ; Rise ; SW[16] ;; LEDR[7] ; SW[16] ; 13.867 ; 13.650 ; Rise ; SW[16] ;; LEDR[8] ; SW[16] ; 13.872 ; 13.642 ; Rise ; SW[16] ;; LEDR[9] ; SW[16] ; 13.531 ; 13.573 ; Rise ; SW[16] ;; LEDR[10] ; SW[16] ; 13.677 ; 13.493 ; Rise ; SW[16] ;; LEDR[11] ; SW[16] ; 13.352 ; 13.188 ; Rise ; SW[16] ;; LEDR[12] ; SW[16] ; 13.562 ; 13.411 ; Rise ; SW[16] ;; LEDR[13] ; SW[16] ; 13.728 ; 13.547 ; Rise ; SW[16] ;; LEDR[14] ; SW[16] ; 13.981 ; 13.768 ; Rise ; SW[16] ;; LEDR[15] ; SW[16] ; 14.557 ; 14.453 ; Rise ; SW[16] ;; SRAM_ADDR[*] ; SW[16] ; 14.089 ; 14.884 ; Rise ; SW[16] ;; SRAM_ADDR[0] ; SW[16] ; 10.250 ; 10.164 ; Rise ; SW[16] ;; SRAM_ADDR[1] ; SW[16] ; 10.298 ; 10.227 ; Rise ; SW[16] ;; SRAM_ADDR[2] ; SW[16] ; 11.632 ; 11.628 ; Rise ; SW[16] ;; SRAM_ADDR[3] ; SW[16] ; 11.091 ; 11.025 ; Rise ; SW[16] ;; SRAM_ADDR[4] ; SW[16] ; 11.554 ; 11.482 ; Rise ; SW[16] ;; SRAM_ADDR[5] ; SW[16] ; 11.174 ; 11.123 ; Rise ; SW[16] ;; SRAM_ADDR[6] ; SW[16] ; 10.406 ; 10.328 ; Rise ; SW[16] ;; SRAM_ADDR[7] ; SW[16] ; 10.637 ; 10.638 ; Rise ; SW[16] ;; SRAM_ADDR[8] ; SW[16] ; 11.197 ; 11.041 ; Rise ; SW[16] ;; SRAM_ADDR[9] ; SW[16] ; 11.650 ; 11.173 ; Rise ; SW[16] ;; SRAM_ADDR[10] ; SW[16] ; 11.162 ; 10.986 ; Rise ; SW[16] ;; SRAM_ADDR[11] ; SW[16] ; 9.782 ; 9.733 ; Rise ; SW[16] ;; SRAM_ADDR[12] ; SW[16] ; 12.367 ; 11.943 ; Rise ; SW[16] ;; SRAM_ADDR[13] ; SW[16] ; 10.417 ; 10.240 ; Rise ; SW[16] ;; SRAM_ADDR[14] ; SW[16] ; 11.468 ; 11.673 ; Rise ; SW[16] ;; SRAM_ADDR[15] ; SW[16] ; 14.089 ; 14.884 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 14.847 ; 14.708 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 12.768 ; 12.670 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 13.253 ; 13.231 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 14.847 ; 14.708 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 13.773 ; 13.684 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 14.318 ; 14.204 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 13.399 ; 13.304 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 14.446 ; 14.245 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 12.525 ; 12.477 ; Rise ; SW[16] ;; SRAM_OE_N ; SW[16] ; 13.622 ; 13.581 ; Rise ; SW[16] ;; SRAM_WE_N ; SW[16] ; 12.002 ; 12.102 ; Rise ; SW[16] ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; ; 6.881 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; ; 7.488 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; 6.941 ; ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; 7.380 ; ; Fall ; T80se:z80_inst|MREQ_n ;; VGA_B[*] ; clk_div:clkdiv_inst|clock_25MHz ; 10.336 ; 9.995 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[4] ; clk_div:clkdiv_inst|clock_25MHz ; 9.657 ; 9.364 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[5] ; clk_div:clkdiv_inst|clock_25MHz ; 9.096 ; 8.864 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[6] ; clk_div:clkdiv_inst|clock_25MHz ; 10.336 ; 9.995 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[7] ; clk_div:clkdiv_inst|clock_25MHz ; 9.378 ; 9.124 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; 3.662 ; ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_HS ; clk_div:clkdiv_inst|clock_25MHz ; 7.924 ; 7.819 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_VS ; clk_div:clkdiv_inst|clock_25MHz ; 7.370 ; 7.268 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; ; 3.498 ; Fall ; clk_div:clkdiv_inst|clock_25MHz ;+----------------+---------------------------------+--------+--------+------------+---------------------------------++-------------------------------------------------------------------------------------------------------------------+; Minimum Clock to Output Times ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; LCD_DATA[*] ; CLOCK_50 ; 8.409 ; 8.261 ; Rise ; CLOCK_50 ;; LCD_DATA[0] ; CLOCK_50 ; 10.301 ; 10.001 ; Rise ; CLOCK_50 ;; LCD_DATA[1] ; CLOCK_50 ; 9.146 ; 9.008 ; Rise ; CLOCK_50 ;; LCD_DATA[2] ; CLOCK_50 ; 10.665 ; 10.493 ; Rise ; CLOCK_50 ;; LCD_DATA[3] ; CLOCK_50 ; 10.339 ; 10.687 ; Rise ; CLOCK_50 ;; LCD_DATA[4] ; CLOCK_50 ; 9.634 ; 9.744 ; Rise ; CLOCK_50 ;; LCD_DATA[5] ; CLOCK_50 ; 10.258 ; 10.660 ; Rise ; CLOCK_50 ;; LCD_DATA[6] ; CLOCK_50 ; 8.409 ; 8.261 ; Rise ; CLOCK_50 ;; LCD_DATA[7] ; CLOCK_50 ; 10.532 ; 10.068 ; Rise ; CLOCK_50 ;; LCD_EN ; CLOCK_50 ; 10.889 ; 11.266 ; Rise ; CLOCK_50 ;; LCD_ON ; CLOCK_50 ; 10.882 ; 10.469 ; Rise ; CLOCK_50 ;; LCD_RS ; CLOCK_50 ; 9.580 ; 9.410 ; Rise ; CLOCK_50 ;; HEX0[*] ; SW[16] ; 12.255 ; 12.089 ; Rise ; SW[16] ;; HEX0[0] ; SW[16] ; 13.039 ; 12.846 ; Rise ; SW[16] ;; HEX0[1] ; SW[16] ; 14.231 ; 14.097 ; Rise ; SW[16] ;; HEX0[2] ; SW[16] ; 13.271 ; 12.994 ; Rise ; SW[16] ;; HEX0[3] ; SW[16] ; 12.380 ; 12.238 ; Rise ; SW[16] ;; HEX0[4] ; SW[16] ; 12.255 ; 12.089 ; Rise ; SW[16] ;; HEX0[5] ; SW[16] ; 14.276 ; 13.811 ; Rise ; SW[16] ;; HEX0[6] ; SW[16] ; 12.379 ; 12.552 ; Rise ; SW[16] ;; HEX1[*] ; SW[16] ; 12.228 ; 12.005 ; Rise ; SW[16] ;; HEX1[0] ; SW[16] ; 12.228 ; 12.005 ; Rise ; SW[16] ;; HEX1[1] ; SW[16] ; 13.331 ; 12.828 ; Rise ; SW[16] ;; HEX1[2] ; SW[16] ; 12.460 ; 12.352 ; Rise ; SW[16] ;; HEX1[3] ; SW[16] ; 12.853 ; 12.495 ; Rise ; SW[16] ;; HEX1[4] ; SW[16] ; 12.374 ; 12.186 ; Rise ; SW[16] ;; HEX1[5] ; SW[16] ; 14.629 ; 13.971 ; Rise ; SW[16] ;; HEX1[6] ; SW[16] ; 12.970 ; 13.451 ; Rise ; SW[16] ;; HEX2[*] ; SW[16] ; 11.755 ; 11.611 ; Rise ; SW[16] ;; HEX2[0] ; SW[16] ; 12.799 ; 12.339 ; Rise ; SW[16] ;; HEX2[1] ; SW[16] ; 11.878 ; 11.611 ; Rise ; SW[16] ;; HEX2[2] ; SW[16] ; 13.307 ; 12.866 ; Rise ; SW[16] ;; HEX2[3] ; SW[16] ; 13.184 ; 12.686 ; Rise ; SW[16] ;; HEX2[4] ; SW[16] ; 13.206 ; 12.709 ; Rise ; SW[16] ;; HEX2[5] ; SW[16] ; 12.102 ; 11.812 ; Rise ; SW[16] ;; HEX2[6] ; SW[16] ; 11.755 ; 11.997 ; Rise ; SW[16] ;; HEX3[*] ; SW[16] ; 11.809 ; 11.995 ; Rise ; SW[16] ;; HEX3[0] ; SW[16] ; 13.299 ; 12.806 ; Rise ; SW[16] ;; HEX3[1] ; SW[16] ; 12.904 ; 12.654 ; Rise ; SW[16] ;; HEX3[2] ; SW[16] ; 15.171 ; 14.433 ; Rise ; SW[16] ;; HEX3[3] ; SW[16] ; 12.485 ; 12.290 ; Rise ; SW[16] ;; HEX3[4] ; SW[16] ; 12.839 ; 12.587 ; Rise ; SW[16] ;; HEX3[5] ; SW[16] ; 12.231 ; 12.045 ; Rise ; SW[16] ;; HEX3[6] ; SW[16] ; 11.809 ; 11.995 ; Rise ; SW[16] ;; HEX4[*] ; SW[16] ; 10.910 ; 11.059 ; Rise ; SW[16] ;; HEX4[0] ; SW[16] ; 12.702 ; 12.381 ; Rise ; SW[16] ;; HEX4[1] ; SW[16] ; 12.651 ; 12.331 ; Rise ; SW[16] ;; HEX4[2] ; SW[16] ; 11.494 ; 11.311 ; Rise ; SW[16] ;; HEX4[3] ; SW[16] ; 11.295 ; 11.059 ; Rise ; SW[16] ;; HEX4[4] ; SW[16] ; 11.612 ; 11.427 ; Rise ; SW[16] ;; HEX4[5] ; SW[16] ; 11.481 ; 11.207 ; Rise ; SW[16] ;; HEX4[6] ; SW[16] ; 10.910 ; 11.080 ; Rise ; SW[16] ;; HEX5[*] ; SW[16] ; 11.738 ; 11.720 ; Rise ; SW[16] ;; HEX5[0] ; SW[16] ; 12.705 ; 12.416 ; Rise ; SW[16] ;; HEX5[1] ; SW[16] ; 13.623 ; 13.117 ; Rise ; SW[16] ;; HEX5[2] ; SW[16] ; 11.983 ; 11.821 ; Rise ; SW[16] ;; HEX5[3] ; SW[16] ; 12.095 ; 11.825 ; Rise ; SW[16] ;; HEX5[4] ; SW[16] ; 11.900 ; 11.720 ; Rise ; SW[16] ;; HEX5[5] ; SW[16] ; 12.586 ; 12.272 ; Rise ; SW[16] ;; HEX5[6] ; SW[16] ; 11.738 ; 11.963 ; Rise ; SW[16] ;; HEX6[*] ; SW[16] ; 10.464 ; 10.316 ; Rise ; SW[16] ;; HEX6[0] ; SW[16] ; 11.516 ; 11.255 ; Rise ; SW[16] ;; HEX6[1] ; SW[16] ; 10.508 ; 10.327 ; Rise ; SW[16] ;; HEX6[2] ; SW[16] ; 10.507 ; 10.383 ; Rise ; SW[16] ;; HEX6[3] ; SW[16] ; 11.766 ; 11.426 ; Rise ; SW[16] ;; HEX6[4] ; SW[16] ; 10.464 ; 10.316 ; Rise ; SW[16] ;; HEX6[5] ; SW[16] ; 12.275 ; 11.756 ; Rise ; SW[16] ;; HEX6[6] ; SW[16] ; 10.604 ; 10.839 ; Rise ; SW[16] ;; HEX7[*] ; SW[16] ; 10.694 ; 10.492 ; Rise ; SW[16] ;; HEX7[0] ; SW[16] ; 10.961 ; 10.715 ; Rise ; SW[16] ;; HEX7[1] ; SW[16] ; 10.694 ; 10.541 ; Rise ; SW[16] ;; HEX7[2] ; SW[16] ; 10.854 ; 10.653 ; Rise ; SW[16] ;; HEX7[3] ; SW[16] ; 10.771 ; 10.577 ; Rise ; SW[16] ;; HEX7[4] ; SW[16] ; 10.707 ; 10.532 ; Rise ; SW[16] ;; HEX7[5] ; SW[16] ; 10.696 ; 10.492 ; Rise ; SW[16] ;; HEX7[6] ; SW[16] ; 10.945 ; 11.196 ; Rise ; SW[16] ;; LEDG[*] ; SW[16] ; 12.022 ; 11.925 ; Rise ; SW[16] ;; LEDG[0] ; SW[16] ; 12.055 ; 12.012 ; Rise ; SW[16] ;; LEDG[1] ; SW[16] ; 15.780 ; 15.499 ; Rise ; SW[16] ;; LEDG[2] ; SW[16] ; 13.721 ; 13.547 ; Rise ; SW[16] ;; LEDG[3] ; SW[16] ; 12.512 ; 12.387 ; Rise ; SW[16] ;; LEDG[4] ; SW[16] ; 13.128 ; 12.946 ; Rise ; SW[16] ;; LEDG[5] ; SW[16] ; 12.022 ; 11.925 ; Rise ; SW[16] ;; LEDG[6] ; SW[16] ; 13.050 ; 12.856 ; Rise ; SW[16] ;; LEDG[7] ; SW[16] ; 13.390 ; 13.174 ; Rise ; SW[16] ;; LEDR[*] ; SW[16] ; 11.805 ; 11.739 ; Rise ; SW[16] ;; LEDR[0] ; SW[16] ; 11.805 ; 11.739 ; Rise ; SW[16] ;; LEDR[1] ; SW[16] ; 14.836 ; 14.476 ; Rise ; SW[16] ;; LEDR[2] ; SW[16] ; 15.976 ; 15.840 ; Rise ; SW[16] ;; LEDR[3] ; SW[16] ; 12.980 ; 12.916 ; Rise ; SW[16] ;; LEDR[4] ; SW[16] ; 12.298 ; 12.230 ; Rise ; SW[16] ;; LEDR[5] ; SW[16] ; 14.328 ; 14.024 ; Rise ; SW[16] ;; LEDR[6] ; SW[16] ; 12.687 ; 12.650 ; Rise ; SW[16] ;; LEDR[7] ; SW[16] ; 13.310 ; 13.100 ; Rise ; SW[16] ;; LEDR[8] ; SW[16] ; 13.313 ; 13.092 ; Rise ; SW[16] ;; LEDR[9] ; SW[16] ; 13.034 ; 13.076 ; Rise ; SW[16] ;; LEDR[10] ; SW[16] ; 13.126 ; 12.948 ; Rise ; SW[16] ;; LEDR[11] ; SW[16] ; 12.815 ; 12.656 ; Rise ; SW[16] ;; LEDR[12] ; SW[16] ; 13.017 ; 12.871 ; Rise ; SW[16] ;; LEDR[13] ; SW[16] ; 13.175 ; 13.000 ; Rise ; SW[16] ;; LEDR[14] ; SW[16] ; 13.419 ; 13.214 ; Rise ; SW[16] ;; LEDR[15] ; SW[16] ; 14.019 ; 13.920 ; Rise ; SW[16] ;; SRAM_ADDR[*] ; SW[16] ; 9.390 ; 9.338 ; Rise ; SW[16] ;; SRAM_ADDR[0] ; SW[16] ; 9.836 ; 9.749 ; Rise ; SW[16] ;; SRAM_ADDR[1] ; SW[16] ; 9.881 ; 9.809 ; Rise ; SW[16] ;; SRAM_ADDR[2] ; SW[16] ; 11.164 ; 11.156 ; Rise ; SW[16] ;; SRAM_ADDR[3] ; SW[16] ; 10.642 ; 10.575 ; Rise ; SW[16] ;; SRAM_ADDR[4] ; SW[16] ; 11.089 ; 11.015 ; Rise ; SW[16] ;; SRAM_ADDR[5] ; SW[16] ; 10.723 ; 10.670 ; Rise ; SW[16] ;; SRAM_ADDR[6] ; SW[16] ; 9.987 ; 9.907 ; Rise ; SW[16] ;; SRAM_ADDR[7] ; SW[16] ; 10.209 ; 10.205 ; Rise ; SW[16] ;; SRAM_ADDR[8] ; SW[16] ; 10.746 ; 10.592 ; Rise ; SW[16] ;; SRAM_ADDR[9] ; SW[16] ; 11.250 ; 10.775 ; Rise ; SW[16] ;; SRAM_ADDR[10] ; SW[16] ; 10.714 ; 10.540 ; Rise ; SW[16] ;; SRAM_ADDR[11] ; SW[16] ; 9.390 ; 9.338 ; Rise ; SW[16] ;; SRAM_ADDR[12] ; SW[16] ; 11.940 ; 11.516 ; Rise ; SW[16] ;; SRAM_ADDR[13] ; SW[16] ; 9.999 ; 9.825 ; Rise ; SW[16] ;; SRAM_ADDR[14] ; SW[16] ; 11.002 ; 11.204 ; Rise ; SW[16] ;; SRAM_ADDR[15] ; SW[16] ; 13.362 ; 14.168 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 12.021 ; 11.970 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 12.255 ; 12.157 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 12.721 ; 12.695 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 14.251 ; 14.114 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 13.220 ; 13.130 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 13.742 ; 13.629 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 12.861 ; 12.766 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 13.866 ; 13.669 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 12.021 ; 11.970 ; Rise ; SW[16] ;; SRAM_OE_N ; SW[16] ; 10.884 ; 10.819 ; Rise ; SW[16] ;; SRAM_WE_N ; SW[16] ; 10.452 ; 10.496 ; Rise ; SW[16] ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; ; 6.605 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; ; 7.192 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; 6.666 ; ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; 7.085 ; ; Fall ; T80se:z80_inst|MREQ_n ;; VGA_B[*] ; clk_div:clkdiv_inst|clock_25MHz ; 8.728 ; 8.501 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[4] ; clk_div:clkdiv_inst|clock_25MHz ; 9.268 ; 8.982 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[5] ; clk_div:clkdiv_inst|clock_25MHz ; 8.728 ; 8.501 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[6] ; clk_div:clkdiv_inst|clock_25MHz ; 9.917 ; 9.586 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[7] ; clk_div:clkdiv_inst|clock_25MHz ; 8.999 ; 8.751 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; 3.520 ; ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_HS ; clk_div:clkdiv_inst|clock_25MHz ; 7.601 ; 7.497 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_VS ; clk_div:clkdiv_inst|clock_25MHz ; 7.071 ; 6.970 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; ; 3.359 ; Fall ; clk_div:clkdiv_inst|clock_25MHz ;+----------------+---------------------------------+--------+--------+------------+---------------------------------++--------------------------------------------------------------------------------------------+; Output Enable Times ;+-------------+-----------------------+--------+--------+------------+-----------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-----------------------+--------+--------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 11.895 ; 11.750 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 12.394 ; 12.249 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 11.901 ; 11.756 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 11.895 ; 11.750 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 11.895 ; 11.750 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 12.545 ; 12.400 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 12.288 ; 12.143 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 12.288 ; 12.143 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 11.998 ; 11.853 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 7.281 ; 7.136 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 7.780 ; 7.635 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 7.287 ; 7.142 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 7.281 ; 7.136 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 7.281 ; 7.136 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 7.931 ; 7.786 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 7.674 ; 7.529 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 7.674 ; 7.529 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 7.384 ; 7.239 ; Rise ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+--------+--------+------------+-----------------------++--------------------------------------------------------------------------------------------+; Minimum Output Enable Times ;+-------------+-----------------------+--------+--------+------------+-----------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-----------------------+--------+--------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 10.281 ; 10.136 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 10.760 ; 10.615 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 10.286 ; 10.141 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 10.281 ; 10.136 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 10.281 ; 10.136 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 10.905 ; 10.760 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 10.658 ; 10.513 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 10.658 ; 10.513 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 10.379 ; 10.234 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 6.977 ; 6.832 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 7.456 ; 7.311 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 6.982 ; 6.837 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 6.977 ; 6.832 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 6.977 ; 6.832 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 7.601 ; 7.456 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 7.354 ; 7.209 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 7.354 ; 7.209 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 7.075 ; 6.930 ; Rise ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+--------+--------+------------+-----------------------++--------------------------------------------------------------------------------------------------+; Output Disable Times ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 11.763 ; 11.908 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 12.207 ; 12.352 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 11.769 ; 11.914 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 11.763 ; 11.908 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 11.763 ; 11.908 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 12.334 ; 12.479 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 12.094 ; 12.239 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 12.094 ; 12.239 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 11.805 ; 11.950 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 7.141 ; 7.286 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 7.585 ; 7.730 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 7.147 ; 7.292 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 7.141 ; 7.286 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 7.141 ; 7.286 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 7.712 ; 7.857 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 7.472 ; 7.617 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 7.472 ; 7.617 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 7.183 ; 7.328 ; Fall ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+-----------+-----------+------------+-----------------------++--------------------------------------------------------------------------------------------------+; Minimum Output Disable Times ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 10.204 ; 10.349 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 10.631 ; 10.776 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 10.209 ; 10.354 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 10.204 ; 10.349 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 10.204 ; 10.349 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 10.752 ; 10.897 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 10.522 ; 10.667 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 10.522 ; 10.667 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 10.244 ; 10.389 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 6.837 ; 6.982 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 7.264 ; 7.409 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 6.842 ; 6.987 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 6.837 ; 6.982 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 6.837 ; 6.982 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 7.385 ; 7.530 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 7.155 ; 7.300 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 7.155 ; 7.300 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 6.877 ; 7.022 ; Fall ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+---------------------------------------------; Slow 1200mV 0C Model Metastability Report ;---------------------------------------------No synchronizer chains to report.+--------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup Summary ;+-------------------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+--------+---------------+; LCD:lcd_inst|clk_400hz_enable ; -6.129 ; -46.157 ;; SW[16] ; -5.861 ; -1703.860 ;; CLOCK_50 ; -3.425 ; -58.119 ;; clk_div:clkdiv_inst|clock_100Hz ; -2.263 ; -4.526 ;; clk_div:clkdiv_inst|clock_25MHz ; -2.065 ; -71.920 ;; T80se:z80_inst|MREQ_n ; -0.791 ; -73.474 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.602 ; -6.551 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.090 ; 0.000 ;; clk_div:clkdiv_inst|clock_100Khz_int ; 0.108 ; 0.000 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.158 ; 0.000 ;; clk_div:clkdiv_inst|clock_10Khz_int ; 0.230 ; 0.000 ;; clk_div:clkdiv_inst|clock_1Khz_int ; 0.428 ; 0.000 ;+-------------------------------------------------------------+--------+---------------++--------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold Summary ;+-------------------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+--------+---------------+; SW[16] ; -1.533 ; -67.021 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.426 ; -0.426 ;; CLOCK_50 ; -0.335 ; -2.123 ;; T80se:z80_inst|MREQ_n ; -0.248 ; -1.794 ;; clk_div:clkdiv_inst|clock_100Khz_int ; -0.008 ; -0.008 ;; clk_div:clkdiv_inst|clock_10Khz_int ; 0.010 ; 0.000 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.061 ; 0.000 ;; clk_div:clkdiv_inst|clock_25MHz ; 0.140 ; 0.000 ;; clk_div:clkdiv_inst|clock_1Khz_int ; 0.201 ; 0.000 ;; clk_div:clkdiv_inst|clock_100Hz ; 0.210 ; 0.000 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.214 ; 0.000 ;; LCD:lcd_inst|clk_400hz_enable ; 1.167 ; 0.000 ;+-------------------------------------------------------------+--------+---------------++--------------------------------------------------------------------------+; Fast 1200mV 0C Model Recovery Summary ;+-------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------+--------+---------------+; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; -0.904 ; -0.904 ;+-------------------------------------------------+--------+---------------++-------------------------------------------------------------------------+; Fast 1200mV 0C Model Removal Summary ;+-------------------------------------------------+-------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------+-------+---------------+; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 1.565 ; 0.000 ;+-------------------------------------------------+-------+---------------++--------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width Summary ;+-------------------------------------------------------------+--------+---------------+; Clock ; Slack ; End Point TNS ;+-------------------------------------------------------------+--------+---------------+; SW[16] ; -3.000 ; -864.856 ;; CLOCK_50 ; -3.000 ; -141.504 ;; clk_div:clkdiv_inst|clock_25MHz ; -1.000 ; -93.000 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -1.000 ; -23.000 ;; LCD:lcd_inst|clk_400hz_enable ; -1.000 ; -8.000 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; -1.000 ; -6.000 ;; clk_div:clkdiv_inst|clock_100Khz_int ; -1.000 ; -4.000 ;; clk_div:clkdiv_inst|clock_10Khz_int ; -1.000 ; -4.000 ;; clk_div:clkdiv_inst|clock_1Khz_int ; -1.000 ; -4.000 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; -1.000 ; -4.000 ;; clk_div:clkdiv_inst|clock_100Hz ; -1.000 ; -2.000 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; -1.000 ; -1.000 ;; T80se:z80_inst|MREQ_n ; -0.120 ; -9.204 ;+-------------------------------------------------------------+--------+---------------++---------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'LCD:lcd_inst|clk_400hz_enable' ;+--------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; -6.129 ; lcdvram[28][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.522 ; 2.104 ;; -6.072 ; lcdvram[31][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.836 ; 1.733 ;; -5.950 ; lcdvram[31][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.792 ; 1.655 ;; -5.934 ; lcdvram[19][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.806 ; 1.625 ;; -5.907 ; lcdvram[20][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.644 ; 1.760 ;; -5.840 ; lcdvram[30][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.302 ; 2.035 ;; -5.812 ; lcdvram[22][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.262 ; 2.047 ;; -5.767 ; lcdvram[31][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.812 ; 1.452 ;; -5.712 ; lcdvram[19][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.766 ; 1.443 ;; -5.707 ; lcdvram[22][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.216 ; 1.988 ;; -5.703 ; lcdvram[6][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.162 ; 2.038 ;; -5.679 ; lcdvram[10][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.858 ; 2.318 ;; -5.676 ; lcdvram[22][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.237 ; 1.936 ;; -5.652 ; lcdvram[19][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.723 ; 1.426 ;; -5.649 ; lcdvram[16][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.785 ; 1.361 ;; -5.644 ; lcdvram[16][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.850 ; 1.291 ;; -5.635 ; lcdvram[17][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.698 ; 1.434 ;; -5.626 ; lcdvram[17][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.714 ; 1.409 ;; -5.614 ; lcdvram[17][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.713 ; 1.398 ;; -5.608 ; lcdvram[19][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.817 ; 1.288 ;; -5.607 ; lcdvram[16][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.803 ; 1.301 ;; -5.601 ; lcdvram[27][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.688 ; 1.410 ;; -5.579 ; lcdvram[0][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.156 ; 1.920 ;; -5.574 ; lcdvram[3][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.810 ; 2.261 ;; -5.571 ; lcdvram[28][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.569 ; 1.499 ;; -5.568 ; lcdvram[20][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.635 ; 1.430 ;; -5.567 ; lcdvram[18][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.402 ; 1.662 ;; -5.562 ; lcdvram[18][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.533 ; 1.526 ;; -5.561 ; lcdvram[28][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.498 ; 1.560 ;; -5.559 ; lcdvram[17][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.652 ; 1.404 ;; -5.555 ; lcdvram[27][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.641 ; 1.411 ;; -5.553 ; lcdvram[19][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.771 ; 1.279 ;; -5.552 ; lcdvram[17][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.659 ; 1.390 ;; -5.545 ; lcdvram[6][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.006 ; 2.036 ;; -5.534 ; lcdvram[16][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.790 ; 1.241 ;; -5.529 ; lcdvram[23][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.279 ; 1.747 ;; -5.524 ; lcdvram[19][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.662 ; 1.359 ;; -5.522 ; lcdvram[25][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.620 ; 1.399 ;; -5.517 ; lcdvram[20][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.576 ; 1.438 ;; -5.497 ; lcdvram[6][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.079 ; 1.915 ;; -5.494 ; lcdvram[20][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.579 ; 1.412 ;; -5.490 ; lcdvram[24][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.702 ; 1.285 ;; -5.478 ; lcdvram[23][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.261 ; 1.714 ;; -5.460 ; lcdvram[6][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.255 ; 1.702 ;; -5.457 ; lcdvram[4][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.889 ; 2.065 ;; -5.456 ; lcdvram[24][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.640 ; 1.313 ;; -5.455 ; lcdvram[27][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.692 ; 1.260 ;; -5.453 ; lcdvram[28][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.453 ; 1.497 ;; -5.449 ; lcdvram[17][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.684 ; 1.262 ;; -5.444 ; lcdvram[22][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.140 ; 1.801 ;; -5.443 ; lcdvram[1][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.740 ; 2.200 ;; -5.433 ; lcdvram[16][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.794 ; 1.136 ;; -5.431 ; lcdvram[17][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.688 ; 1.240 ;; -5.428 ; lcdvram[31][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.771 ; 1.154 ;; -5.426 ; lcdvram[30][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.309 ; 1.614 ;; -5.424 ; lcdvram[1][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.839 ; 2.082 ;; -5.388 ; lcdvram[27][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.684 ; 1.201 ;; -5.384 ; lcdvram[18][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.519 ; 1.362 ;; -5.379 ; lcdvram[16][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.750 ; 1.126 ;; -5.369 ; lcdvram[20][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.622 ; 1.244 ;; -5.362 ; lcdvram[18][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.472 ; 1.387 ;; -5.357 ; lcdvram[25][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.622 ; 1.232 ;; -5.353 ; lcdvram[19][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.745 ; 1.105 ;; -5.353 ; lcdvram[31][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.823 ; 1.027 ;; -5.348 ; lcdvram[0][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.926 ; 1.919 ;; -5.346 ; lcdvram[18][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.457 ; 1.386 ;; -5.344 ; lcdvram[24][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.666 ; 1.175 ;; -5.343 ; lcdvram[16][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.786 ; 1.054 ;; -5.338 ; lcdvram[24][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.549 ; 1.286 ;; -5.337 ; lcdvram[21][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.442 ; 1.392 ;; -5.332 ; lcdvram[25][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.582 ; 1.247 ;; -5.317 ; lcdvram[28][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.573 ; 1.241 ;; -5.307 ; lcdvram[31][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.776 ; 1.028 ;; -5.305 ; lcdvram[4][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.854 ; 1.948 ;; -5.304 ; lcdvram[21][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.431 ; 1.370 ;; -5.300 ; lcdvram[27][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.680 ; 1.117 ;; -5.299 ; lcdvram[20][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.494 ; 1.302 ;; -5.292 ; lcdvram[29][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.083 ; 1.706 ;; -5.289 ; lcdvram[25][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.706 ; 1.080 ;; -5.288 ; lcdvram[25][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.586 ; 1.199 ;; -5.286 ; lcdvram[2][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.680 ; 2.103 ;; -5.280 ; lcdvram[17][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.529 ; 1.248 ;; -5.274 ; lcdvram[7][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.850 ; 1.921 ;; -5.269 ; lcdvram[27][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.646 ; 1.120 ;; -5.246 ; lcdvram[22][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.192 ; 1.551 ;; -5.239 ; lcdvram[24][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.528 ; 1.208 ;; -5.236 ; lcdvram[26][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.258 ; 1.475 ;; -5.236 ; lcdvram[20][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.575 ; 1.158 ;; -5.224 ; lcdvram[25][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.718 ; 1.003 ;; -5.218 ; lcdvram[30][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.211 ; 1.504 ;; -5.203 ; lcdvram[26][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.346 ; 1.354 ;; -5.201 ; lcdvram[21][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.506 ; 1.192 ;; -5.195 ; lcdvram[0][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.750 ; 1.942 ;; -5.191 ; lcdvram[27][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.694 ; 0.994 ;; -5.188 ; lcdvram[4][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.902 ; 1.783 ;; -5.186 ; lcdvram[23][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.285 ; 1.398 ;; -5.185 ; lcdvram[24][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.629 ; 1.053 ;; -5.181 ; lcdvram[31][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -4.633 ; 1.045 ;; -5.179 ; lcdvram[8][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.732 ; 1.944 ;; -5.179 ; lcdvram[7][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0.500 ; -3.795 ; 1.881 ;+--------+----------------+------------------+-----------------------+-------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'SW[16]' ;+--------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------+; -5.861 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.049 ; 6.799 ;; -5.857 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.049 ; 6.795 ;; -5.854 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.045 ; 6.796 ;; -5.852 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.045 ; 6.794 ;; -5.835 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.049 ; 6.773 ;; -5.831 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.049 ; 6.769 ;; -5.828 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.045 ; 6.770 ;; -5.826 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.045 ; 6.768 ;; -5.820 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.503 ; 5.304 ;; -5.792 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.710 ;; -5.788 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.706 ;; -5.788 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.046 ; 6.729 ;; -5.785 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.707 ;; -5.785 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.703 ;; -5.783 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.705 ;; -5.781 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.699 ;; -5.779 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.067 ; 6.699 ;; -5.779 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.697 ;; -5.778 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.700 ;; -5.776 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.698 ;; -5.775 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.067 ; 6.695 ;; -5.775 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.693 ;; -5.772 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.063 ; 6.696 ;; -5.772 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.694 ;; -5.770 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.063 ; 6.694 ;; -5.770 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.692 ;; -5.768 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.686 ;; -5.766 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.508 ; 5.245 ;; -5.764 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.682 ;; -5.762 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.046 ; 6.703 ;; -5.761 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.683 ;; -5.760 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.509 ; 5.238 ;; -5.760 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][4] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.699 ;; -5.760 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][4] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.699 ;; -5.759 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.681 ;; -5.757 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][6] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.696 ;; -5.754 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][6] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.693 ;; -5.751 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.509 ; 5.229 ;; -5.743 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.662 ;; -5.739 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.658 ;; -5.738 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[7][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.656 ;; -5.737 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.044 ; 6.680 ;; -5.736 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.064 ; 6.659 ;; -5.734 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][7] ; SW[16] ; SW[16] ; 1.000 ; -0.069 ; 6.652 ;; -5.734 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.064 ; 6.657 ;; -5.734 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][4] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.673 ;; -5.734 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][4] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.673 ;; -5.731 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.653 ;; -5.731 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][6] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.670 ;; -5.729 ; T80se:z80_inst|T80:u0|MCycle[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][7] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.651 ;; -5.728 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][6] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.667 ;; -5.719 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.066 ; 6.640 ;; -5.712 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.066 ; 6.633 ;; -5.711 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][6] ; SW[16] ; SW[16] ; 1.000 ; -0.045 ; 6.653 ;; -5.711 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.044 ; 6.654 ;; -5.707 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[9] ; SW[16] ; SW[16] ; 1.000 ; -1.495 ; 5.199 ;; -5.706 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.064 ; 6.629 ;; -5.706 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.066 ; 6.627 ;; -5.703 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[8] ; SW[16] ; SW[16] ; 1.000 ; -1.495 ; 5.195 ;; -5.699 ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|T80:u0|A[15] ; SW[16] ; SW[16] ; 1.000 ; -1.503 ; 5.183 ;; -5.699 ; T80se:z80_inst|T80:u0|F[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.503 ; 5.183 ;; -5.695 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.066 ; 6.616 ;; -5.694 ; T80se:z80_inst|T80:u0|F[0] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.503 ; 5.178 ;; -5.692 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.631 ;; -5.691 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][4] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.610 ;; -5.691 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][4] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.610 ;; -5.691 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][3] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.630 ;; -5.689 ; T80se:z80_inst|T80:u0|F[7] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.503 ; 5.173 ;; -5.688 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][6] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.607 ;; -5.685 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][6] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.604 ;; -5.685 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[6][6] ; SW[16] ; SW[16] ; 1.000 ; -0.045 ; 6.627 ;; -5.684 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][4] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.603 ;; -5.684 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][4] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.603 ;; -5.682 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.503 ; 5.166 ;; -5.681 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|A[14] ; SW[16] ; SW[16] ; 1.000 ; -1.509 ; 5.159 ;; -5.681 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][6] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.600 ;; -5.679 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][7] ; SW[16] ; SW[16] ; 1.000 ; -0.049 ; 6.617 ;; -5.679 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][7] ; SW[16] ; SW[16] ; 1.000 ; -0.049 ; 6.617 ;; -5.678 ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][6] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.597 ;; -5.678 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][4] ; SW[16] ; SW[16] ; 1.000 ; -0.066 ; 6.599 ;; -5.678 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][4] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.597 ;; -5.678 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][4] ; SW[16] ; SW[16] ; 1.000 ; -0.066 ; 6.599 ;; -5.678 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][4] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.597 ;; -5.675 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][6] ; SW[16] ; SW[16] ; 1.000 ; -0.066 ; 6.596 ;; -5.675 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][6] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.594 ;; -5.673 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][3] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.612 ;; -5.672 ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][6] ; SW[16] ; SW[16] ; 1.000 ; -0.066 ; 6.593 ;; -5.672 ; T80se:z80_inst|T80:u0|MCycle[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][6] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.591 ;; -5.672 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][1] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.611 ;; -5.672 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][5] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.611 ;; -5.672 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][3] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.611 ;; -5.671 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][5] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.610 ;; -5.670 ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][6] ; SW[16] ; SW[16] ; 1.000 ; -0.065 ; 6.592 ;; -5.669 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[5][3] ; SW[16] ; SW[16] ; 1.000 ; -0.046 ; 6.610 ;; -5.669 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[4][3] ; SW[16] ; SW[16] ; 1.000 ; -0.046 ; 6.610 ;; -5.669 ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[1][1] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.608 ;; -5.668 ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][7] ; SW[16] ; SW[16] ; 1.000 ; -0.064 ; 6.591 ;; -5.667 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[0][4] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.586 ;; -5.667 ; T80se:z80_inst|T80:u0|MCycle[1] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[3][4] ; SW[16] ; SW[16] ; 1.000 ; -0.068 ; 6.586 ;; -5.666 ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|T80:u0|T80_Reg:Regs|RegsH[2][3] ; SW[16] ; SW[16] ; 1.000 ; -0.048 ; 6.605 ;+--------+---------------------------------+------------------------------------------------+--------------+-------------+--------------+------------+------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'CLOCK_50' ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; -3.425 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.797 ; 3.605 ;; -3.412 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.797 ; 3.592 ;; -3.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.550 ;; -3.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.550 ;; -3.379 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.550 ;; -3.344 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.515 ;; -3.344 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.515 ;; -3.344 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.515 ;; -3.329 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.500 ;; -3.329 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.500 ;; -3.329 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.500 ;; -3.329 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.500 ;; -3.293 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.464 ;; -3.293 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.464 ;; -3.293 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.464 ;; -3.293 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.464 ;; -3.189 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.797 ; 3.369 ;; -3.177 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.799 ; 3.355 ;; -3.151 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.797 ; 3.331 ;; -3.131 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 3.300 ;; -3.131 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 3.300 ;; -3.131 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 3.300 ;; -3.121 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.292 ;; -3.121 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.292 ;; -3.121 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.292 ;; -3.112 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.797 ; 3.292 ;; -3.110 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.796 ; 3.291 ;; -3.105 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.276 ;; -3.105 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.276 ;; -3.105 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.276 ;; -3.081 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 3.250 ;; -3.081 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 3.250 ;; -3.081 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 3.250 ;; -3.081 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 3.250 ;; -3.069 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.240 ;; -3.069 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.240 ;; -3.069 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.240 ;; -3.069 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.240 ;; -3.066 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.237 ;; -3.066 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.237 ;; -3.066 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.237 ;; -3.055 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.226 ;; -3.055 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.226 ;; -3.055 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.226 ;; -3.055 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.226 ;; -3.042 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.805 ; 3.214 ;; -3.042 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.805 ; 3.214 ;; -3.042 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.805 ; 3.214 ;; -3.016 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.187 ;; -3.016 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.187 ;; -3.016 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.187 ;; -3.016 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 3.187 ;; -2.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.805 ; 3.151 ;; -2.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.805 ; 3.151 ;; -2.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.805 ; 3.151 ;; -2.979 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.805 ; 3.151 ;; -2.798 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 2.969 ;; -2.729 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 2.900 ;; -2.575 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 2.746 ;; -2.481 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 2.650 ;; -2.420 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 2.591 ;; -2.416 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.806 ; 2.587 ;; -2.375 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.805 ; 2.547 ;; -2.112 ; LCDON_reg ; LCD:lcd_inst|LCD_ON ; SW[16] ; CLOCK_50 ; 1.000 ; -2.435 ; 0.644 ;; -2.095 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.799 ; 2.273 ;; -2.049 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 2.218 ;; -2.049 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 2.218 ;; -2.049 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 2.218 ;; -1.999 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 2.168 ;; -1.999 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 2.168 ;; -1.999 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 2.168 ;; -1.999 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_ascii_reg1[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 2.168 ;; -1.367 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 1.000 ; -0.808 ; 1.536 ;; -1.232 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[2] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 0.857 ; 3.076 ;; -1.186 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[1] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 0.848 ; 3.021 ;; -1.186 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[6] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 0.848 ; 3.021 ;; -1.186 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[5] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 0.848 ; 3.021 ;; -1.136 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[7] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 0.848 ; 2.971 ;; -1.136 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[3] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 0.848 ; 2.971 ;; -1.136 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[0] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 0.848 ; 2.971 ;; -1.136 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2_ascii_reg1[4] ; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 1.000 ; 0.848 ; 2.971 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[0] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[1] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[2] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[3] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[4] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[5] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[6] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[7] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[8] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.091 ; LCD:lcd_inst|clk_count_400hz[7] ; LCD:lcd_inst|clk_count_400hz[9] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.037 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[0] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[1] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[2] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[3] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[4] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[5] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[6] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[7] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;; -1.087 ; LCD:lcd_inst|clk_count_400hz[8] ; LCD:lcd_inst|clk_count_400hz[8] ; CLOCK_50 ; CLOCK_50 ; 1.000 ; -0.041 ; 2.033 ;+--------+----------------------------------------------------+---------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_100Hz' ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; -2.263 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.569 ;; -2.263 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.569 ;; -1.977 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.283 ;; -1.977 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.283 ;; -1.940 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.246 ;; -1.940 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.246 ;; -1.939 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.245 ;; -1.939 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.245 ;; -1.927 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.693 ; 1.231 ;; -1.927 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.693 ; 1.231 ;; -1.905 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.690 ; 1.212 ;; -1.905 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.690 ; 1.212 ;; -1.902 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.208 ;; -1.902 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.691 ; 1.208 ;; -1.877 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.693 ; 1.181 ;; -1.877 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -1.693 ; 1.181 ;; 0.480 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -0.024 ; 0.503 ;; 0.615 ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 1.000 ; -0.024 ; 0.368 ;+--------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_25MHz' ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; -2.065 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.186 ; 2.866 ;; -2.064 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.186 ; 2.865 ;; -2.062 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.186 ; 2.863 ;; -1.978 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.180 ; 2.785 ;; -1.977 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.180 ; 2.784 ;; -1.975 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.180 ; 2.782 ;; -1.880 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.186 ; 2.681 ;; -1.793 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.180 ; 2.600 ;; -1.764 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.889 ; 1.874 ;; -1.752 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.889 ; 1.862 ;; -1.728 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.821 ; 1.906 ;; -1.725 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.922 ; 1.802 ;; -1.718 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.816 ; 1.901 ;; -1.704 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.799 ; 1.904 ;; -1.652 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.663 ; 1.988 ;; -1.608 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.696 ; 1.911 ;; -1.589 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.642 ; 1.946 ;; -1.589 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.889 ; 1.699 ;; -1.543 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.918 ; 1.624 ;; -1.539 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.828 ; 1.710 ;; -1.539 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.830 ; 1.708 ;; -1.525 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.920 ; 1.604 ;; -1.514 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.911 ; 1.602 ;; -1.513 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.906 ; 1.606 ;; -1.510 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.906 ; 1.603 ;; -1.491 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.803 ; 1.687 ;; -1.448 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.692 ; 1.755 ;; -1.445 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.694 ; 1.750 ;; -1.423 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.680 ; 1.742 ;; -1.422 ; T80se:z80_inst|T80:u0|A[8] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.685 ; 1.736 ;; -1.407 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.889 ; 1.517 ;; -1.386 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.659 ; 1.726 ;; -1.385 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.646 ; 1.738 ;; -1.382 ; T80se:z80_inst|T80:u0|A[13] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.664 ; 1.717 ;; -1.378 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.922 ; 1.455 ;; -1.367 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.911 ; 1.455 ;; -1.356 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.911 ; 1.444 ;; -1.355 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.920 ; 1.434 ;; -1.347 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.078 ; 2.434 ;; -1.347 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.080 ; 2.436 ;; -1.346 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.832 ; 1.513 ;; -1.344 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.918 ; 1.425 ;; -1.341 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.078 ; 2.428 ;; -1.341 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.080 ; 2.430 ;; -1.337 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.893 ; 1.443 ;; -1.336 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.920 ; 1.415 ;; -1.335 ; T80se:z80_inst|T80:u0|A[5] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.906 ; 1.428 ;; -1.334 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.078 ; 2.421 ;; -1.334 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.080 ; 2.423 ;; -1.325 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.081 ; 2.415 ;; -1.322 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.078 ; 2.409 ;; -1.322 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.080 ; 2.411 ;; -1.319 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.081 ; 2.409 ;; -1.316 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.078 ; 2.403 ;; -1.316 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.080 ; 2.405 ;; -1.312 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.081 ; 2.402 ;; -1.309 ; T80se:z80_inst|T80:u0|A[2] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.893 ; 1.415 ;; -1.309 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.893 ; 1.415 ;; -1.300 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.094 ; 2.403 ;; -1.300 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.016 ; 2.293 ;; -1.300 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.081 ; 2.390 ;; -1.299 ; T80se:z80_inst|T80:u0|A[9] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.663 ; 1.635 ;; -1.298 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.022 ; 2.285 ;; -1.295 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.094 ; 2.398 ;; -1.294 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.081 ; 2.384 ;; -1.292 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.018 ; 2.283 ;; -1.290 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.014 ; 2.285 ;; -1.288 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.094 ; 2.391 ;; -1.286 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.012 ; 2.283 ;; -1.282 ; T80se:z80_inst|T80:u0|A[9] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.685 ; 1.596 ;; -1.282 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.082 ; 2.373 ;; -1.280 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.094 ; 2.383 ;; -1.277 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.082 ; 2.368 ;; -1.276 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.819 ; 1.456 ;; -1.274 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.094 ; 2.377 ;; -1.272 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.098 ; 2.379 ;; -1.270 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.082 ; 2.361 ;; -1.270 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.082 ; 2.361 ;; -1.267 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.098 ; 2.374 ;; -1.264 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.082 ; 2.355 ;; -1.260 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.098 ; 2.367 ;; -1.257 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.078 ; 2.344 ;; -1.257 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.080 ; 2.346 ;; -1.256 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.020 ; 2.245 ;; -1.253 ; T80se:z80_inst|T80:u0|A[7] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.666 ; 1.586 ;; -1.252 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.098 ; 2.359 ;; -1.248 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.096 ; 2.353 ;; -1.247 ; T80se:z80_inst|T80:u0|A[10] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.812 ; 1.434 ;; -1.246 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.098 ; 2.353 ;; -1.245 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.887 ; 1.357 ;; -1.243 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.096 ; 2.348 ;; -1.237 ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.017 ; 2.229 ;; -1.236 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.096 ; 2.341 ;; -1.235 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.081 ; 2.325 ;; -1.228 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.096 ; 2.333 ;; -1.222 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.096 ; 2.327 ;; -1.219 ; T80se:z80_inst|T80:u0|A[3] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.915 ; 1.303 ;; -1.218 ; T80se:z80_inst|T80:u0|A[12] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.642 ; 1.575 ;; -1.215 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; 0.094 ; 2.318 ;; -1.210 ; T80se:z80_inst|T80:u0|A[4] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9~porta_address_reg0 ; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 1.000 ; -0.888 ; 1.321 ;+--------+---------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'T80se:z80_inst|MREQ_n' ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; -0.791 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[10][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.498 ; 1.379 ;; -0.776 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[29][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.797 ; 1.640 ;; -0.764 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[8][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.281 ; 1.127 ;; -0.749 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[29][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.771 ; 1.569 ;; -0.715 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[5][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.378 ; 1.145 ;; -0.711 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[11][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.228 ; 0.950 ;; -0.683 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[13][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.506 ; 0.889 ;; -0.681 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[2][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.363 ; 1.124 ;; -0.679 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[29][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.776 ; 1.504 ;; -0.676 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[26][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.900 ; 1.628 ;; -0.654 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[0][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.581 ; 1.223 ;; -0.623 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[30][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.953 ; 1.628 ;; -0.622 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[29][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.862 ; 1.635 ;; -0.619 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[3][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.097 ; 0.432 ;; -0.609 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[29][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.791 ; 1.449 ;; -0.606 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[30][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.913 ; 1.567 ;; -0.597 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[8][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.384 ; 1.034 ;; -0.586 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[5][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.510 ; 1.109 ;; -0.563 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[21][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.062 ; 1.677 ;; -0.560 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[8][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.197 ; 0.745 ;; -0.560 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[30][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.956 ; 1.565 ;; -0.557 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[13][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.400 ; 1.108 ;; -0.546 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[0][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.309 ; 0.999 ;; -0.542 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[10][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.524 ; 1.148 ;; -0.540 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[11][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.316 ; 0.767 ;; -0.539 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[24][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.222 ; 1.814 ;; -0.530 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[5][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.427 ; 1.107 ;; -0.527 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[3][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.099 ; 0.339 ;; -0.521 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[3][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.468 ; 1.139 ;; -0.510 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[11][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.439 ; 1.099 ;; -0.508 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[21][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.048 ; 1.609 ;; -0.498 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[11][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.309 ; 0.717 ;; -0.495 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[11][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.314 ; 0.737 ;; -0.495 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[5][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.491 ; 0.900 ;; -0.470 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[8][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.496 ; 0.981 ;; -0.465 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[24][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.288 ; 1.903 ;; -0.461 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[18][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.078 ; 1.592 ;; -0.460 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[8][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.256 ; 0.730 ;; -0.459 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[5][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.380 ; 0.903 ;; -0.456 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[16][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.377 ; 1.982 ;; -0.454 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[25][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.264 ; 1.771 ;; -0.451 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[8][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.403 ; 0.998 ;; -0.451 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[22][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.845 ; 1.439 ;; -0.450 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[3][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.327 ; 0.765 ;; -0.450 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[29][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.860 ; 1.460 ;; -0.448 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[10][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.084 ; 0.443 ;; -0.447 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[25][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.258 ; 1.754 ;; -0.434 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[8][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.511 ; 1.099 ;; -0.430 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[24][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.242 ; 1.725 ;; -0.427 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[10][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.106 ; 0.623 ;; -0.424 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[20][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.178 ; 1.650 ;; -0.423 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[7][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.594 ; 1.168 ;; -0.423 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[3][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.326 ; 0.737 ;; -0.421 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[15][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.527 ; 0.997 ;; -0.421 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[29][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.803 ; 1.368 ;; -0.418 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[3][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.009 ; 0.473 ;; -0.418 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[0][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.834 ; 1.342 ;; -0.410 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[20][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.293 ; 1.499 ;; -0.409 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[20][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.184 ; 1.642 ;; -0.407 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[10][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.375 ; 0.769 ;; -0.404 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[26][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.890 ; 1.437 ;; -0.403 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[9][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.468 ; 0.950 ;; -0.399 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[25][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.258 ; 1.706 ;; -0.396 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[21][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.069 ; 1.608 ;; -0.394 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[24][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.256 ; 1.794 ;; -0.393 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[18][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.164 ; 1.712 ;; -0.386 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[11][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.463 ; 0.928 ;; -0.385 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[26][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.965 ; 1.504 ;; -0.379 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[25][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.233 ; 1.662 ;; -0.378 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[3][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.008 ; 0.418 ;; -0.378 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[22][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.903 ; 1.269 ;; -0.373 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[10][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.020 ; 0.496 ;; -0.372 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[14][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.602 ; 0.896 ;; -0.370 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[24][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.235 ; 1.752 ;; -0.367 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[13][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.399 ; 0.754 ;; -0.367 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[13][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.507 ; 1.025 ;; -0.362 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[16][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.392 ; 1.804 ;; -0.361 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[29][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.842 ; 1.357 ;; -0.360 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[9][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.631 ; 0.979 ;; -0.359 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[2][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.348 ; 0.797 ;; -0.358 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[26][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.896 ; 1.304 ;; -0.356 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[30][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.958 ; 1.458 ;; -0.352 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[11][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; -0.014 ; 0.428 ;; -0.352 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[22][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.921 ; 1.423 ;; -0.351 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[25][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.271 ; 1.675 ;; -0.349 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[22][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.884 ; 1.387 ;; -0.348 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[22][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.917 ; 1.416 ;; -0.346 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[10][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.597 ; 1.098 ;; -0.337 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[5][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.409 ; 0.889 ;; -0.337 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[20][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.212 ; 1.598 ;; -0.335 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[24][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.317 ; 1.806 ;; -0.334 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[7][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.495 ; 0.878 ;; -0.334 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[28][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.120 ; 1.504 ;; -0.331 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[15][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.725 ; 1.137 ;; -0.331 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[21][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.058 ; 1.438 ;; -0.331 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[18][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.096 ; 1.571 ;; -0.327 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[25][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.339 ; 1.654 ;; -0.327 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[21][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.137 ; 1.618 ;; -0.326 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[9][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 0.601 ; 0.942 ;; -0.324 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[24][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; 0.500 ; 1.223 ; 1.690 ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; -0.602 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.548 ;; -0.599 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.545 ;; -0.522 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.470 ;; -0.519 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.467 ;; -0.506 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.452 ;; -0.454 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.400 ;; -0.445 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.395 ;; -0.442 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.392 ;; -0.436 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.384 ;; -0.436 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.384 ;; -0.436 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.384 ;; -0.436 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.384 ;; -0.436 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.384 ;; -0.433 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.381 ;; -0.433 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.381 ;; -0.433 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.381 ;; -0.433 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.381 ;; -0.433 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.381 ;; -0.426 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.374 ;; -0.419 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.369 ;; -0.416 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.366 ;; -0.374 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.322 ;; -0.355 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.301 ;; -0.349 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.299 ;; -0.340 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.288 ;; -0.340 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.288 ;; -0.340 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.288 ;; -0.340 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.288 ;; -0.340 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.288 ;; -0.323 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.273 ;; -0.297 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.247 ;; -0.288 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.236 ;; -0.288 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.236 ;; -0.288 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.236 ;; -0.288 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.236 ;; -0.288 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.236 ;; -0.276 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.224 ;; -0.271 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.221 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.226 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.172 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.223 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.169 ;; -0.199 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.149 ;; -0.190 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.138 ;; -0.190 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.138 ;; -0.190 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.138 ;; -0.190 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.138 ;; -0.190 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.039 ; 1.138 ;; -0.173 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.037 ; 1.123 ;; -0.146 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.092 ;; -0.142 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.088 ;; -0.131 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.038 ; 1.080 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.130 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.076 ;; -0.111 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.040 ; 1.058 ;; -0.102 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.048 ;; -0.101 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.047 ;; -0.098 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.044 ;; -0.097 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.043 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.078 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.024 ;; -0.068 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 1.014 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.035 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.981 ;; -0.024 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.000 ; -0.041 ; 0.970 ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; 0.090 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.893 ;; 0.129 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.854 ;; 0.129 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.854 ;; 0.129 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.854 ;; 0.129 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.854 ;; 0.131 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.022 ; 0.854 ;; 0.140 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.843 ;; 0.154 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.829 ;; 0.158 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.825 ;; 0.169 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.814 ;; 0.200 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.783 ;; 0.208 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.775 ;; 0.232 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.751 ;; 0.237 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.746 ;; 0.288 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.695 ;; 0.288 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.695 ;; 0.288 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.695 ;; 0.288 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.695 ;; 0.290 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.022 ; 0.695 ;; 0.438 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.022 ; 0.547 ;; 0.440 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.543 ;; 0.445 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.022 ; 0.540 ;; 0.448 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.535 ;; 0.453 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.022 ; 0.532 ;; 0.598 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 1.000 ; -0.024 ; 0.385 ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; 0.108 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.500 ; 1.101 ; 1.605 ;; 0.264 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.024 ; 0.719 ;; 0.353 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.024 ; 0.630 ;; 0.429 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.024 ; 0.554 ;; 0.431 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.024 ; 0.552 ;; 0.462 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.024 ; 0.521 ;; 0.521 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.024 ; 0.462 ;; 0.523 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.024 ; 0.460 ;; 0.597 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.024 ; 0.386 ;; 0.626 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.765 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1.000 ; 1.101 ; 1.448 ;+-------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; 0.158 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.500 ; 0.470 ; 0.924 ;; 0.194 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.023 ; 0.790 ;; 0.281 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.023 ; 0.703 ;; 0.365 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.023 ; 0.619 ;; 0.428 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.023 ; 0.556 ;; 0.462 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.023 ; 0.522 ;; 0.519 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.023 ; 0.465 ;; 0.598 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.023 ; 0.386 ;; 0.604 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.023 ; 0.380 ;; 0.626 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.749 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1.000 ; 0.470 ; 0.833 ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; 0.230 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.500 ; 0.418 ; 0.800 ;; 0.263 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.024 ; 0.720 ;; 0.354 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.024 ; 0.629 ;; 0.426 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.024 ; 0.557 ;; 0.436 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.024 ; 0.547 ;; 0.462 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.024 ; 0.521 ;; 0.524 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.024 ; 0.459 ;; 0.526 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.024 ; 0.457 ;; 0.598 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.024 ; 0.385 ;; 0.626 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.805 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1.000 ; 0.418 ; 0.725 ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Setup: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; 0.428 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.023 ; 0.556 ;; 0.432 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.023 ; 0.552 ;; 0.451 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.023 ; 0.533 ;; 0.457 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.023 ; 0.527 ;; 0.519 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.023 ; 0.465 ;; 0.594 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.023 ; 0.390 ;; 0.596 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.023 ; 0.388 ;; 0.607 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.023 ; 0.377 ;; 0.626 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.022 ; 0.359 ;; 0.626 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 1.000 ; -0.022 ; 0.359 ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'SW[16]' ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------+; -1.533 ; \random:rand_temp[14] ; T80se:z80_inst|DI_Reg[6] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 1.019 ;; -1.530 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.937 ; 2.626 ;; -1.492 ; \random:rand_temp[14] ; T80se:z80_inst|T80:u0|IR[6] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 1.060 ;; -1.443 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 2.714 ;; -1.425 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 2.732 ;; -1.398 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 2.759 ;; -1.269 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 2.888 ;; -1.267 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 2.890 ;; -1.228 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 2.929 ;; -1.217 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 2.940 ;; -1.197 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.944 ; 2.966 ;; -1.174 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 2.983 ;; -1.124 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 3.033 ;; -1.089 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.943 ; 3.073 ;; -0.909 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 3.248 ;; -0.866 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.937 ; 2.790 ;; -0.850 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.944 ; 3.313 ;; -0.801 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.942 ; 3.360 ;; -0.781 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.938 ; 3.376 ;; -0.736 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.115 ; 3.618 ;; -0.736 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.117 ; 3.620 ;; -0.736 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.115 ; 3.618 ;; -0.734 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 2.923 ;; -0.730 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.118 ; 3.627 ;; -0.730 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.120 ; 3.629 ;; -0.730 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.118 ; 3.627 ;; -0.718 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.119 ; 3.640 ;; -0.718 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.121 ; 3.642 ;; -0.718 ; T80se:z80_inst|MREQ_n ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.119 ; 3.640 ;; -0.701 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.116 ; 3.654 ;; -0.701 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.118 ; 3.656 ;; -0.701 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.116 ; 3.654 ;; -0.701 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.096 ; 3.634 ;; -0.701 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.098 ; 3.636 ;; -0.701 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.096 ; 3.634 ;; -0.697 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 2.960 ;; -0.695 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.113 ; 3.657 ;; -0.695 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.115 ; 3.659 ;; -0.695 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.113 ; 3.657 ;; -0.695 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 2.962 ;; -0.694 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.118 ; 3.663 ;; -0.694 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.120 ; 3.665 ;; -0.694 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.118 ; 3.663 ;; -0.682 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 2.975 ;; -0.668 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 2.989 ;; -0.664 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 2.993 ;; -0.657 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 3.000 ;; -0.655 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.098 ; 3.682 ;; -0.655 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.100 ; 3.684 ;; -0.655 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.098 ; 3.682 ;; -0.654 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.099 ; 3.684 ;; -0.652 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.924 ; 3.491 ;; -0.646 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.100 ; 3.693 ;; -0.646 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.102 ; 3.695 ;; -0.646 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~porta_we_reg ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.100 ; 3.693 ;; -0.643 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.516 ;; -0.643 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.516 ;; -0.643 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.516 ;; -0.643 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[4] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.516 ;; -0.643 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[5] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.516 ;; -0.643 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.516 ;; -0.643 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[7] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.944 ; 3.020 ;; -0.633 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_address_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.099 ; 3.705 ;; -0.633 ; T80se:z80_inst|MREQ_n ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~porta_datain_reg0 ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 4.101 ; 3.707 ;; -0.619 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.931 ; 3.531 ;; -0.579 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.943 ; 3.083 ;; -0.575 ; \random:rand_temp[11] ; T80se:z80_inst|T80:u0|IR[3] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.427 ; 1.976 ;; -0.547 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|T80:u0|IR[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 3.110 ;; -0.507 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[8] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.652 ;; -0.507 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[9] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.652 ;; -0.507 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[10] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.652 ;; -0.507 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[11] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.652 ;; -0.507 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[12] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.652 ;; -0.507 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[13] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.652 ;; -0.507 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[14] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.652 ;; -0.507 ; T80se:z80_inst|MREQ_n ; \pinout_process:LEDR_sig[15] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.940 ; 3.652 ;; -0.466 ; \random:rand_temp[10] ; T80se:z80_inst|DI_Reg[2] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.086 ;; -0.446 ; \random:rand_temp[12] ; T80se:z80_inst|T80:u0|IR[4] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.106 ;; -0.443 ; \random:rand_temp[11] ; T80se:z80_inst|DI_Reg[3] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.109 ;; -0.433 ; \random:rand_temp[13] ; T80se:z80_inst|T80:u0|IR[5] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.119 ;; -0.426 ; \random:rand_temp[8] ; T80se:z80_inst|T80:u0|IR[0] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.433 ; 2.131 ;; -0.425 ; \random:rand_temp[6] ; T80se:z80_inst|DI_Reg[6] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.127 ;; -0.423 ; ps2_ascii_reg1[5] ; ps2_ascii_reg[5] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.445 ; 2.146 ;; -0.422 ; ps2_ascii_reg1[2] ; ps2_ascii_reg[2] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.130 ;; -0.416 ; \random:rand_temp[12] ; T80se:z80_inst|DI_Reg[4] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.136 ;; -0.414 ; T80se:z80_inst|MREQ_n ; T80se:z80_inst|DI_Reg[6] ; T80se:z80_inst|MREQ_n ; SW[16] ; -0.500 ; 3.938 ; 3.243 ;; -0.413 ; ps2_ascii_reg1[1] ; ps2_ascii_reg[1] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.437 ; 2.148 ;; -0.403 ; ps2_ascii_reg1[3] ; ps2_ascii_reg[3] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.437 ; 2.158 ;; -0.401 ; \random:rand_temp[8] ; T80se:z80_inst|DI_Reg[0] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.429 ; 2.152 ;; -0.393 ; \random:rand_temp[13] ; T80se:z80_inst|DI_Reg[5] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.159 ;; -0.389 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.878 ; 3.708 ;; -0.389 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.878 ; 3.708 ;; -0.389 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.878 ; 3.708 ;; -0.389 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER2_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.878 ; 3.708 ;; -0.389 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[0] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.878 ; 3.708 ;; -0.389 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[1] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.878 ; 3.708 ;; -0.389 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[2] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.878 ; 3.708 ;; -0.389 ; T80se:z80_inst|MREQ_n ; \pinout_process:NUMBER3_sig[3] ; T80se:z80_inst|MREQ_n ; SW[16] ; 0.000 ; 3.878 ; 3.708 ;; -0.387 ; ps2_ascii_reg1[6] ; ps2_ascii_reg[6] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.445 ; 2.182 ;; -0.386 ; \random:rand_temp[4] ; T80se:z80_inst|T80:u0|IR[4] ; CLOCK_50 ; SW[16] ; 0.000 ; 2.428 ; 2.166 ;+--------+-----------------------+---------------------------------------------------------------------------------------------------------------+-----------------------+-------------+--------------+------------+------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+; -0.426 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 2.303 ; 2.076 ;; 0.182 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.307 ;; 0.189 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.314 ;; 0.189 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.315 ;; 0.199 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.325 ;; 0.201 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.327 ;; 0.259 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.385 ;; 0.259 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.385 ;; 0.260 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.386 ;; 0.261 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.387 ;; 0.318 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.444 ;; 0.320 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.500 ; 2.303 ; 2.322 ;; 0.412 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.537 ;; 0.423 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.548 ;; 0.424 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.549 ;; 0.473 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 0.601 ;; 0.483 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.608 ;; 0.485 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.043 ; 0.612 ;; 0.486 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 0.614 ;; 0.490 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.615 ;; 0.516 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.046 ; 0.646 ;; 0.534 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.659 ;; 0.549 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.674 ;; 0.549 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.674 ;; 0.585 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 0.713 ;; 0.589 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 0.717 ;; 0.619 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.744 ;; 0.620 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.745 ;; 0.668 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.793 ;; 0.669 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.794 ;; 0.720 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.845 ;; 0.720 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.845 ;; 0.720 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.845 ;; 0.720 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.845 ;; 0.748 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.873 ;; 0.749 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.874 ;; 0.751 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.876 ;; 0.754 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.879 ;; 0.777 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.902 ;; 0.800 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 0.928 ;; 0.800 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 0.925 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.806 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 0.932 ;; 0.815 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.046 ; 0.945 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.903 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.029 ;; 0.918 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.041 ; 1.043 ;; 0.934 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.046 ; 1.064 ;; 0.944 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 1.072 ;; 0.944 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 1.072 ;; 0.944 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 1.072 ;; 0.944 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 1.072 ;; 0.944 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 1.072 ;; 0.948 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.046 ; 1.078 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 0.957 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.083 ;; 1.027 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.043 ; 1.154 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.029 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.155 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.034 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.042 ; 1.160 ;; 1.056 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.046 ; 1.186 ;; 1.066 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 1.194 ;; 1.066 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 0.000 ; 0.044 ; 1.194 ;+--------+--------------------------------------------------+----------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'CLOCK_50' ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------+; -0.335 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 0.000 ; 1.570 ; 1.454 ;; -0.204 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_EN ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.543 ; 1.548 ;; -0.157 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; 0.000 ; 1.560 ; 1.612 ;; -0.135 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_ON ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.551 ; 1.625 ;; -0.074 ; clk_div:clkdiv_inst|clock_357Mhz_int ; clk_div:clkdiv_inst|clock_357Mhz ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.445 ; 0.455 ;; -0.074 ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; 0.000 ; 1.560 ; 1.695 ;; -0.074 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.return_home ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.544 ; 1.679 ;; -0.073 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset1 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.543 ; 1.679 ;; -0.073 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.543 ; 1.679 ;; -0.073 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.line2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.543 ; 1.679 ;; -0.073 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.543 ; 1.679 ;; -0.073 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.mode_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.543 ; 1.679 ;; -0.073 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.543 ; 1.679 ;; -0.034 ; clk_div:clkdiv_inst|clock_10Mhz_int ; clk_div:clkdiv_inst|clock_10MHz ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.445 ; 0.495 ;; -0.031 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.hold ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.540 ; 1.718 ;; -0.031 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.return_home ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.540 ; 1.718 ;; -0.031 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.print_string ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.540 ; 1.718 ;; -0.031 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.print_string ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.540 ; 1.718 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.drop_LCD_EN ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset2 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.reset3 ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.func_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.func_set ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_off ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_off ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_clear ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_clear ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|next_command.display_on ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|state.display_on ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.025 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|LCD_RS ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.541 ; 1.725 ;; -0.020 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[0] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.551 ; 1.740 ;; -0.020 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[1] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.551 ; 1.740 ;; -0.020 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[2] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.551 ; 1.740 ;; -0.020 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[3] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.551 ; 1.740 ;; -0.020 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[6] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.551 ; 1.740 ;; -0.012 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[4] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.540 ; 1.737 ;; -0.012 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|data_bus_value[5] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.540 ; 1.737 ;; 0.011 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[3] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.544 ; 1.764 ;; 0.011 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[4] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.544 ; 1.764 ;; 0.011 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[1] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.544 ; 1.764 ;; 0.011 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[2] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.544 ; 1.764 ;; 0.011 ; LCD:lcd_inst|clk_400hz_enable ; LCD:lcd_inst|char_count_sig[0] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 1.544 ; 1.764 ;; 0.037 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_1Khz_int ; CLOCK_50 ; 0.000 ; 0.936 ; 1.077 ;; 0.180 ; clk_div:clkdiv_inst|count_10Mhz[1] ; clk_div:clkdiv_inst|count_10Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.307 ;; 0.180 ; clk_div:clkdiv_inst|count_10Mhz[2] ; clk_div:clkdiv_inst|count_10Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.307 ;; 0.180 ; clk_div:clkdiv_inst|clock_10Mhz_int ; clk_div:clkdiv_inst|clock_10Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.307 ;; 0.180 ; clk_div:clkdiv_inst|count_357Mhz[1] ; clk_div:clkdiv_inst|count_357Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.307 ;; 0.180 ; clk_div:clkdiv_inst|count_357Mhz[2] ; clk_div:clkdiv_inst|count_357Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.307 ;; 0.180 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|count_357Mhz[3] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.307 ;; 0.180 ; clk_div:clkdiv_inst|clock_357Mhz_int ; clk_div:clkdiv_inst|clock_357Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.307 ;; 0.182 ; LCD:lcd_inst|next_command.line2 ; LCD:lcd_inst|next_command.line2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|next_command.reset2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|next_command.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|next_command.func_set ; LCD:lcd_inst|next_command.func_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|next_command.display_off ; LCD:lcd_inst|next_command.display_off ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|next_command.display_clear ; LCD:lcd_inst|next_command.display_clear ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|next_command.display_on ; LCD:lcd_inst|next_command.display_on ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|next_command.mode_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|data_bus_value[0] ; LCD:lcd_inst|data_bus_value[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|data_bus_value[6] ; LCD:lcd_inst|data_bus_value[6] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|data_bus_value[7] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|LCD_RS ; LCD:lcd_inst|LCD_RS ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.182 ; LCD:lcd_inst|LCD_ON ; LCD:lcd_inst|LCD_ON ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.307 ;; 0.187 ; clk_div:clkdiv_inst|count_357Mhz[0] ; clk_div:clkdiv_inst|count_357Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.314 ;; 0.188 ; clk_div:clkdiv_inst|count_10Mhz[0] ; clk_div:clkdiv_inst|count_10Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.314 ;; 0.189 ; LCD:lcd_inst|state.drop_LCD_EN ; LCD:lcd_inst|state.drop_LCD_EN ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.314 ;; 0.193 ; LCD:lcd_inst|next_command.print_string ; LCD:lcd_inst|state.print_string ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.318 ;; 0.193 ; LCD:lcd_inst|state.reset2 ; LCD:lcd_inst|next_command.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.318 ;; 0.193 ; LCD:lcd_inst|clk_count_400hz[19] ; LCD:lcd_inst|clk_count_400hz[19] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.318 ;; 0.194 ; LCD:lcd_inst|state.func_set ; LCD:lcd_inst|next_command.display_off ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.319 ;; 0.199 ; \random:rand_temp[4] ; \random:rand_temp[5] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.325 ;; 0.200 ; \random:rand_temp[3] ; \random:rand_temp[4] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.326 ;; 0.200 ; \random:rand_temp[11] ; \random:rand_temp[12] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.326 ;; 0.201 ; \random:rand_temp[0] ; \random:rand_temp[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.327 ;; 0.201 ; \random:rand_temp[1] ; \random:rand_temp[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.327 ;; 0.202 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|clock_357Mhz_int ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.329 ;; 0.202 ; LCD:lcd_inst|state.display_clear ; LCD:lcd_inst|next_command.display_on ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.327 ;; 0.203 ; clk_div:clkdiv_inst|count_357Mhz[0] ; clk_div:clkdiv_inst|count_357Mhz[1] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.330 ;; 0.204 ; clk_div:clkdiv_inst|count_357Mhz[1] ; clk_div:clkdiv_inst|count_357Mhz[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.331 ;; 0.204 ; LCD:lcd_inst|state.display_off ; LCD:lcd_inst|next_command.display_clear ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.329 ;; 0.204 ; clk_div:clkdiv_inst|count_357Mhz[3] ; clk_div:clkdiv_inst|count_357Mhz[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.331 ;; 0.216 ; next_char_sig[3] ; LCD:lcd_inst|data_bus_value[1] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 0.766 ; 1.086 ;; 0.220 ; next_char_sig[7] ; LCD:lcd_inst|data_bus_value[7] ; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 0.000 ; 0.775 ; 1.099 ;; 0.223 ; ps2_read ; ps2_ascii_reg1[3] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.349 ;; 0.224 ; ps2_read ; ps2_ascii_reg1[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.350 ;; 0.248 ; LCD:lcd_inst|next_command.mode_set ; LCD:lcd_inst|state.mode_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.373 ;; 0.249 ; LCD:lcd_inst|next_command.reset2 ; LCD:lcd_inst|state.reset2 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.374 ;; 0.249 ; LCD:lcd_inst|next_command.reset3 ; LCD:lcd_inst|state.reset3 ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.374 ;; 0.250 ; LCD:lcd_inst|next_command.display_off ; LCD:lcd_inst|state.display_off ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.375 ;; 0.258 ; \random:rand_temp[10] ; \random:rand_temp[11] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.384 ;; 0.258 ; \random:rand_temp[15] ; \random:rand_temp[0] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.384 ;; 0.259 ; \random:rand_temp[9] ; \random:rand_temp[10] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.043 ; 0.386 ;; 0.259 ; \random:rand_temp[2] ; \random:rand_temp[3] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.385 ;; 0.261 ; \random:rand_temp[6] ; \random:rand_temp[7] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.387 ;; 0.264 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|filter[7] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|filter[6] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.390 ;; 0.266 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|filter[5] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|filter[4] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.392 ;; 0.266 ; LCD:lcd_inst|state.reset3 ; LCD:lcd_inst|next_command.func_set ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.041 ; 0.391 ;; 0.267 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|filter[3] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|filter[2] ; CLOCK_50 ; CLOCK_50 ; 0.000 ; 0.042 ; 0.393 ;+--------+-------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+-------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'T80se:z80_inst|MREQ_n' ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------+; -0.248 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[19][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.826 ; 1.108 ;; -0.220 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[27][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.751 ; 1.061 ;; -0.182 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[19][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.836 ; 1.184 ;; -0.177 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[19][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.834 ; 1.187 ;; -0.177 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[19][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.752 ; 1.105 ;; -0.124 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[27][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.701 ; 1.107 ;; -0.117 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[19][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.757 ; 1.170 ;; -0.094 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[19][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.830 ; 1.266 ;; -0.091 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[27][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.757 ; 1.196 ;; -0.070 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[19][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.735 ; 1.195 ;; -0.062 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[27][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.711 ; 1.179 ;; -0.052 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[27][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.709 ; 1.187 ;; -0.040 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[27][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.718 ; 1.208 ;; -0.037 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[31][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.841 ; 1.334 ;; -0.037 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[19][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.730 ; 1.223 ;; -0.037 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[27][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.722 ; 1.215 ;; -0.029 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[23][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.391 ; 0.892 ;; 0.009 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[28][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.603 ; 1.142 ;; 0.020 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[20][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.652 ; 1.202 ;; 0.024 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[28][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.504 ; 1.058 ;; 0.027 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[23][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.371 ; 0.928 ;; 0.033 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[17][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.732 ; 1.295 ;; 0.040 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[31][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.819 ; 1.389 ;; 0.042 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[20][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.678 ; 1.250 ;; 0.044 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[31][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.831 ; 1.405 ;; 0.058 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[6][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.086 ; 0.674 ;; 0.061 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[28][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.580 ; 1.171 ;; 0.063 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[6][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.061 ; 0.654 ;; 0.064 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[23][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.303 ; 0.897 ;; 0.067 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[25][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.740 ; 1.337 ;; 0.067 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[28][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.517 ; 1.114 ;; 0.072 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[27][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.687 ; 1.289 ;; 0.084 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[31][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.865 ; 1.479 ;; 0.084 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[28][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.546 ; 1.160 ;; 0.085 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[31][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.795 ; 1.410 ;; 0.086 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[14][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.284 ; 0.900 ;; 0.088 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[17][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.722 ; 1.340 ;; 0.094 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[31][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.860 ; 1.484 ;; 0.097 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[31][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.836 ; 1.463 ;; 0.105 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[17][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.730 ; 1.365 ;; 0.117 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[6][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.176 ; 0.823 ;; 0.120 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[15][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.119 ; 0.769 ;; 0.121 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[6][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.097 ; 0.748 ;; 0.123 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[18][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.545 ; 1.198 ;; 0.127 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[17][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.722 ; 1.379 ;; 0.128 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[16][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.876 ; 1.534 ;; 0.131 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[28][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.511 ; 1.172 ;; 0.132 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[23][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.302 ; 0.964 ;; 0.137 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[31][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.840 ; 1.507 ;; 0.138 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[7][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.960 ; 0.628 ;; 0.141 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[6][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.186 ; 0.857 ;; 0.142 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[20][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.659 ; 1.331 ;; 0.144 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[17][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.739 ; 1.413 ;; 0.146 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[16][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.803 ; 1.479 ;; 0.148 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[16][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.884 ; 1.562 ;; 0.150 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[28][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.508 ; 1.188 ;; 0.152 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[6][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.176 ; 0.858 ;; 0.156 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[25][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.725 ; 1.411 ;; 0.158 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[17][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.721 ; 1.409 ;; 0.158 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[1][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.902 ; 0.590 ;; 0.161 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[16][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.809 ; 1.500 ;; 0.162 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[1][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.905 ; 0.597 ;; 0.165 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[23][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.366 ; 1.061 ;; 0.168 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[15][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.202 ; 0.900 ;; 0.169 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[30][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.385 ; 1.084 ;; 0.170 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[23][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.316 ; 1.016 ;; 0.175 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[16][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.864 ; 1.569 ;; 0.178 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[1][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.666 ; 0.374 ;; 0.178 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[20][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.582 ; 1.290 ;; 0.181 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[16][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.805 ; 1.516 ;; 0.182 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[21][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.429 ; 1.141 ;; 0.184 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[6][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.417 ; 1.131 ;; 0.188 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[23][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.387 ; 1.105 ;; 0.191 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[22][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.270 ; 0.991 ;; 0.192 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[12][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.124 ; 0.846 ;; 0.193 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[18][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.539 ; 1.262 ;; 0.194 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[17][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.722 ; 1.446 ;; 0.198 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[15][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.138 ; 0.866 ;; 0.200 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[16][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.797 ; 1.527 ;; 0.201 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[14][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.108 ; 0.839 ;; 0.204 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[25][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.644 ; 1.378 ;; 0.204 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[20][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.677 ; 1.411 ;; 0.205 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[21][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.526 ; 1.261 ;; 0.207 ; T80se:z80_inst|T80:u0|DO[0] ; lcdvram[1][0] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.898 ; 0.635 ;; 0.208 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[9][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.818 ; 0.556 ;; 0.208 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[15][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.145 ; 0.883 ;; 0.210 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[4][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.912 ; 0.652 ;; 0.215 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[28][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.515 ; 1.260 ;; 0.217 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[9][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.733 ; 0.480 ;; 0.217 ; T80se:z80_inst|T80:u0|DO[4] ; lcdvram[1][4] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.902 ; 0.649 ;; 0.217 ; T80se:z80_inst|T80:u0|DO[3] ; lcdvram[12][3] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.010 ; 0.757 ;; 0.219 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[25][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.652 ; 1.401 ;; 0.219 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[12][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.089 ; 0.838 ;; 0.221 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[18][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.540 ; 1.291 ;; 0.223 ; T80se:z80_inst|T80:u0|DO[6] ; lcdvram[1][6] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.894 ; 0.647 ;; 0.224 ; T80se:z80_inst|T80:u0|DO[5] ; lcdvram[21][5] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.447 ; 1.201 ;; 0.226 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[7][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.065 ; 0.821 ;; 0.226 ; T80se:z80_inst|T80:u0|DO[7] ; lcdvram[20][7] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.593 ; 1.349 ;; 0.229 ; T80se:z80_inst|T80:u0|DO[1] ; lcdvram[23][1] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 1.285 ; 1.044 ;; 0.231 ; T80se:z80_inst|T80:u0|DO[2] ; lcdvram[1][2] ; SW[16] ; T80se:z80_inst|MREQ_n ; -0.500 ; 0.894 ; 0.655 ;+--------+-----------------------------+----------------+--------------+-----------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------+; -0.008 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 1.158 ; 1.339 ;; 0.201 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.201 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.208 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.022 ; 0.314 ;; 0.214 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.024 ; 0.322 ;; 0.284 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.024 ; 0.392 ;; 0.289 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.024 ; 0.397 ;; 0.316 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.024 ; 0.424 ;; 0.324 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.024 ; 0.432 ;; 0.365 ; clk_div:clkdiv_inst|count_10Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.024 ; 0.473 ;; 0.429 ; clk_div:clkdiv_inst|count_10Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.024 ; 0.537 ;; 0.495 ; clk_div:clkdiv_inst|count_10Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 0.000 ; 0.024 ; 0.603 ;; 0.638 ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; -0.500 ; 1.158 ; 1.485 ;+--------+-------------------------------------+-------------------------------------+--------------------------------------+--------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; 0.010 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.446 ; 0.645 ;; 0.201 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.201 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.208 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.022 ; 0.314 ;; 0.214 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.024 ; 0.322 ;; 0.286 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.024 ; 0.394 ;; 0.289 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.024 ; 0.397 ;; 0.315 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.024 ; 0.423 ;; 0.324 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.024 ; 0.432 ;; 0.367 ; clk_div:clkdiv_inst|count_1Khz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.024 ; 0.475 ;; 0.428 ; clk_div:clkdiv_inst|count_1Khz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.024 ; 0.536 ;; 0.498 ; clk_div:clkdiv_inst|count_1Khz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 0.000 ; 0.024 ; 0.606 ;; 0.581 ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; -0.500 ; 0.446 ; 0.716 ;+-------+------------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------+; 0.061 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.500 ; 0.750 ;; 0.201 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.201 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.208 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.022 ; 0.314 ;; 0.216 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.023 ; 0.323 ;; 0.222 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.023 ; 0.329 ;; 0.284 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.023 ; 0.391 ;; 0.317 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.023 ; 0.424 ;; 0.367 ; clk_div:clkdiv_inst|count_100Khz[1] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.023 ; 0.474 ;; 0.387 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.023 ; 0.494 ;; 0.497 ; clk_div:clkdiv_inst|count_100Khz[2] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.023 ; 0.604 ;; 0.559 ; clk_div:clkdiv_inst|count_100Khz[0] ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 0.000 ; 0.023 ; 0.666 ;; 0.645 ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; -0.500 ; 0.500 ; 0.834 ;+-------+--------------------------------------+--------------------------------------+--------------------------------------+------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_25MHz' ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------+; 0.140 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.189 ; 0.433 ;; 0.181 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.307 ;; 0.181 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.307 ;; 0.181 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.307 ;; 0.181 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.307 ;; 0.181 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.307 ;; 0.181 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.307 ;; 0.181 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.307 ;; 0.181 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.307 ;; 0.188 ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync_out ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.314 ;; 0.200 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.189 ; 0.493 ;; 0.202 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.189 ; 0.495 ;; 0.264 ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|address_reg_a[0] ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|out_address_reg_a[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.390 ;; 0.271 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.398 ;; 0.283 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.041 ; 0.408 ;; 0.290 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.041 ; 0.415 ;; 0.290 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.183 ; 0.577 ;; 0.301 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.427 ;; 0.305 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.431 ;; 0.309 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.435 ;; 0.310 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.436 ;; 0.311 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.437 ;; 0.322 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.195 ; 0.621 ;; 0.323 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.195 ; 0.622 ;; 0.330 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.179 ; 0.613 ;; 0.335 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.461 ;; 0.340 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.467 ;; 0.347 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.474 ;; 0.347 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.474 ;; 0.353 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.178 ; 0.635 ;; 0.353 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.176 ; 0.633 ;; 0.366 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.174 ; 0.644 ;; 0.367 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.041 ; 0.492 ;; 0.368 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.178 ; 0.650 ;; 0.370 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.181 ; 0.655 ;; 0.371 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.044 ; 0.499 ;; 0.376 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.180 ; 0.660 ;; 0.380 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.181 ; 0.665 ;; 0.389 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.180 ; 0.673 ;; 0.404 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.531 ;; 0.405 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.532 ;; 0.406 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.533 ;; 0.419 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.037 ; 0.540 ;; 0.437 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.041 ; 0.562 ;; 0.443 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.044 ; 0.571 ;; 0.444 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.571 ;; 0.449 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.576 ;; 0.453 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.041 ; 0.578 ;; 0.455 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.581 ;; 0.457 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.583 ;; 0.458 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.584 ;; 0.459 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.585 ;; 0.460 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.586 ;; 0.461 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.044 ; 0.589 ;; 0.462 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.588 ;; 0.463 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.589 ;; 0.464 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.591 ;; 0.464 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.590 ;; 0.465 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.181 ; 0.750 ;; 0.466 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.592 ;; 0.468 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.594 ;; 0.469 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.595 ;; 0.470 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.041 ; 0.595 ;; 0.471 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.597 ;; 0.474 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.601 ;; 0.481 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.607 ;; 0.486 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.180 ; 0.770 ;; 0.494 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.620 ;; 0.494 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.621 ;; 0.495 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.621 ;; 0.497 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.623 ;; 0.497 ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_h ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.044 ; 0.625 ;; 0.518 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.644 ;; 0.518 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.644 ;; 0.521 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.647 ;; 0.524 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.650 ;; 0.525 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.651 ;; 0.526 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.652 ;; 0.529 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.178 ; 0.811 ;; 0.532 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.658 ;; 0.535 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.038 ; 0.657 ;; 0.535 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.661 ;; 0.537 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.663 ;; 0.545 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.176 ; 0.825 ;; 0.546 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.176 ; 0.826 ;; 0.555 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.682 ;; 0.563 ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync_out ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.048 ; 0.695 ;; 0.571 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.164 ; 0.839 ;; 0.574 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.045 ; 0.703 ;; 0.587 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.163 ; 0.854 ;; 0.589 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.715 ;; 0.590 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.716 ;; 0.592 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.043 ; 0.719 ;; 0.596 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.164 ; 0.864 ;; 0.600 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.726 ;; 0.601 ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.727 ;; 0.603 ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.042 ; 0.729 ;; 0.605 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.161 ; 0.870 ;; 0.605 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.161 ; 0.870 ;; 0.609 ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 0.000 ; 0.159 ; 0.872 ;+-------+----------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------+---------------------------------+---------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------+; 0.201 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.201 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.201 ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.022 ; 0.307 ;; 0.208 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.022 ; 0.314 ;; 0.216 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.023 ; 0.323 ;; 0.217 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.023 ; 0.324 ;; 0.219 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.023 ; 0.326 ;; 0.288 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.023 ; 0.395 ;; 0.319 ; clk_div:clkdiv_inst|count_100hz[1] ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.023 ; 0.426 ;; 0.325 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.023 ; 0.432 ;; 0.344 ; clk_div:clkdiv_inst|count_100hz[0] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.023 ; 0.451 ;; 0.346 ; clk_div:clkdiv_inst|count_100hz[2] ; clk_div:clkdiv_inst|clock_100hz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 0.000 ; 0.023 ; 0.453 ;+-------+-------------------------------------+-------------------------------------+------------------------------------+------------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_100Hz' ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------+; 0.210 ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; 0.024 ; 0.318 ;; 0.308 ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; 0.024 ; 0.416 ;; 2.578 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.121 ;; 2.578 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.121 ;; 2.613 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.553 ; 1.154 ;; 2.613 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.553 ; 1.154 ;; 2.638 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.181 ;; 2.638 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.181 ;; 2.643 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.186 ;; 2.643 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.186 ;; 2.657 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.200 ;; 2.657 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.200 ;; 2.666 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.553 ; 1.207 ;; 2.666 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.553 ; 1.207 ;; 2.675 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.218 ;; 2.675 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.218 ;; 2.877 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[0] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.420 ;; 2.877 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ; ps2kbd:ps2_kbd_inst|caps[1] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 0.000 ; -1.551 ; 1.420 ;+-------+----------------------------------------------------+-----------------------------+-------------------------------------------------------------+---------------------------------+--------------+------------+------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------+; 0.214 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.322 ;; 0.215 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.022 ; 0.321 ;; 0.309 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.022 ; 0.415 ;; 0.315 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.022 ; 0.421 ;; 0.318 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.022 ; 0.424 ;; 0.321 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.022 ; 0.427 ;; 0.334 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.442 ;; 0.349 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.457 ;; 0.456 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.564 ;; 0.465 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.573 ;; 0.468 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.576 ;; 0.468 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.576 ;; 0.471 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.579 ;; 0.474 ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.582 ;; 0.519 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.627 ;; 0.522 ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.630 ;; 0.527 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.635 ;; 0.527 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.635 ;; 0.527 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.635 ;; 0.527 ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.635 ;; 0.531 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.639 ;; 0.534 ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|count_1Mhz[4] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.642 ;; 0.661 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[2] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.769 ;; 0.661 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[1] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.769 ;; 0.661 ; clk_div:clkdiv_inst|count_1Mhz[3] ; clk_div:clkdiv_inst|count_1Mhz[0] ; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 0.000 ; 0.024 ; 0.769 ;+-------+-----------------------------------+------------------------------------+-------------------------------------+-------------------------------------+--------------+------------+------------++------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Hold: 'LCD:lcd_inst|clk_400hz_enable' ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------+; 1.167 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.615 ; 0.656 ;; 1.181 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.517 ; 0.768 ;; 1.195 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.625 ; 0.674 ;; 1.207 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.618 ; 0.693 ;; 1.236 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.661 ; 0.679 ;; 1.248 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.661 ; 0.691 ;; 1.311 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.672 ; 0.743 ;; 1.320 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.625 ; 0.799 ;; 1.330 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.517 ; 0.917 ;; 1.333 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.517 ; 0.920 ;; 1.351 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.615 ; 0.840 ;; 1.352 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.674 ; 0.782 ;; 1.356 ; LCD:lcd_inst|char_count_sig[4] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.654 ; 0.806 ;; 1.398 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.674 ; 0.828 ;; 1.408 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.618 ; 0.894 ;; 1.430 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.517 ; 1.017 ;; 1.459 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.661 ; 0.902 ;; 1.464 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.618 ; 0.950 ;; 1.509 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.615 ; 0.998 ;; 1.518 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.618 ; 1.004 ;; 1.519 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.654 ; 0.969 ;; 1.523 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.654 ; 0.973 ;; 1.556 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.654 ; 1.006 ;; 1.573 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.625 ; 1.052 ;; 1.577 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.674 ; 1.007 ;; 1.582 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.625 ; 1.061 ;; 1.594 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.672 ; 1.026 ;; 1.602 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[1] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.618 ; 1.088 ;; 1.607 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[4] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.517 ; 1.194 ;; 1.610 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.661 ; 1.053 ;; 1.628 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.672 ; 1.060 ;; 1.661 ; LCD:lcd_inst|char_count_sig[1] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.615 ; 1.150 ;; 1.664 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[5] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.615 ; 1.153 ;; 1.665 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.672 ; 1.097 ;; 1.666 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.674 ; 1.096 ;; 1.693 ; LCD:lcd_inst|char_count_sig[0] ; next_char_sig[7] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.672 ; 1.125 ;; 1.708 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[0] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.661 ; 1.151 ;; 1.716 ; LCD:lcd_inst|char_count_sig[3] ; next_char_sig[3] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.654 ; 1.166 ;; 1.783 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[2] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.674 ; 1.213 ;; 1.797 ; LCD:lcd_inst|char_count_sig[2] ; next_char_sig[6] ; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 0.000 ; -0.625 ; 1.276 ;; 4.507 ; lcdvram[3][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -2.861 ; 1.240 ;; 4.535 ; lcdvram[11][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -2.944 ; 1.185 ;; 4.698 ; lcdvram[3][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.111 ; 1.181 ;; 4.711 ; lcdvram[3][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.063 ; 1.242 ;; 4.726 ; lcdvram[11][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.433 ; 0.887 ;; 4.743 ; lcdvram[8][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.214 ; 1.123 ;; 4.747 ; lcdvram[10][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -2.938 ; 1.403 ;; 4.769 ; lcdvram[2][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.130 ; 1.233 ;; 4.773 ; lcdvram[10][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.417 ; 0.950 ;; 4.784 ; lcdvram[15][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.705 ; 0.673 ;; 4.793 ; lcdvram[8][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.332 ; 1.055 ;; 4.808 ; lcdvram[3][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.378 ; 1.024 ;; 4.830 ; lcdvram[3][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.208 ; 1.216 ;; 4.890 ; lcdvram[9][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.457 ; 1.027 ;; 4.911 ; lcdvram[5][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.480 ; 1.025 ;; 4.921 ; lcdvram[13][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.361 ; 1.154 ;; 4.922 ; lcdvram[15][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.683 ; 0.833 ;; 4.931 ; lcdvram[2][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.047 ; 1.478 ;; 4.936 ; lcdvram[11][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.541 ; 0.989 ;; 4.943 ; lcdvram[9][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.441 ; 1.096 ;; 4.944 ; lcdvram[0][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.287 ; 1.251 ;; 4.947 ; lcdvram[8][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.433 ; 1.108 ;; 4.953 ; lcdvram[4][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.198 ; 1.349 ;; 4.954 ; lcdvram[10][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.175 ; 1.373 ;; 4.959 ; lcdvram[5][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.547 ; 1.006 ;; 4.971 ; lcdvram[14][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.791 ; 0.774 ;; 4.984 ; lcdvram[12][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.559 ; 1.019 ;; 4.990 ; lcdvram[2][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.318 ; 1.266 ;; 5.008 ; lcdvram[29][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.800 ; 0.802 ;; 5.008 ; lcdvram[5][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.487 ; 1.115 ;; 5.021 ; lcdvram[9][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.439 ; 1.176 ;; 5.023 ; lcdvram[10][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.160 ; 1.457 ;; 5.041 ; lcdvram[10][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.699 ; 0.936 ;; 5.046 ; lcdvram[5][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.561 ; 1.079 ;; 5.049 ; lcdvram[3][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.003 ; 1.640 ;; 5.059 ; lcdvram[15][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.578 ; 1.075 ;; 5.079 ; lcdvram[1][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.416 ; 1.257 ;; 5.086 ; lcdvram[14][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.693 ; 0.987 ;; 5.088 ; lcdvram[9][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.605 ; 1.077 ;; 5.091 ; lcdvram[8][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.475 ; 1.210 ;; 5.092 ; lcdvram[14][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.755 ; 0.931 ;; 5.095 ; lcdvram[13][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.470 ; 1.219 ;; 5.098 ; lcdvram[7][7] ; next_char_sig[7] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.703 ; 0.989 ;; 5.104 ; lcdvram[5][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.514 ; 1.184 ;; 5.108 ; lcdvram[11][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.363 ; 1.339 ;; 5.113 ; lcdvram[8][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.613 ; 1.094 ;; 5.117 ; lcdvram[2][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.483 ; 1.228 ;; 5.119 ; lcdvram[11][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.367 ; 1.346 ;; 5.129 ; lcdvram[10][2] ; next_char_sig[2] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.644 ; 1.079 ;; 5.132 ; lcdvram[7][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.734 ; 0.992 ;; 5.139 ; lcdvram[29][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.911 ; 0.822 ;; 5.143 ; lcdvram[13][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.561 ; 1.176 ;; 5.143 ; lcdvram[7][6] ; next_char_sig[6] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.566 ; 1.171 ;; 5.147 ; lcdvram[5][4] ; next_char_sig[4] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.369 ; 1.372 ;; 5.149 ; lcdvram[6][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.851 ; 0.892 ;; 5.152 ; lcdvram[15][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.822 ; 0.924 ;; 5.153 ; lcdvram[5][3] ; next_char_sig[3] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.471 ; 1.276 ;; 5.155 ; lcdvram[5][1] ; next_char_sig[1] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.545 ; 1.204 ;; 5.159 ; lcdvram[14][5] ; next_char_sig[5] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.581 ; 1.172 ;; 5.163 ; lcdvram[13][0] ; next_char_sig[0] ; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; -0.500 ; -3.506 ; 1.251 ;+-------+--------------------------------+------------------+-----------------------+-------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Recovery: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; -0.904 ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ; CLOCK_50 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 1.000 ; -0.915 ; 0.976 ;+--------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Removal: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------+; 1.565 ; ps2_read ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ; CLOCK_50 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 0.000 ; -0.816 ; 0.853 ;+-------+-----------+--------------------------------------------------+--------------+-------------------------------------------------+--------------+------------+------------++---------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'SW[16]' ;+--------+--------------+----------------+------------+--------+------------+-----------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------+--------+------------+-----------------------------------+; -3.000 ; 1.000 ; 4.000 ; Port Rate ; SW[16] ; Rise ; SW[16] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; LCDON_reg ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|DI_Reg[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|IORQ_n ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|MREQ_n ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|RD_n ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ACC[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|ALU_Op_r[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[10] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[11] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[12] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[13] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[14] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[15] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[8] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|A[9] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Alternate ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Ap[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Arith16_r ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BTR_r ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusA[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|BusB[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|DO[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|F[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|F[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|F[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|F[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|F[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|F[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|F[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|F[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Fp[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Fp[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Fp[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Fp[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Fp[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Fp[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Fp[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Fp[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|Halt_FF ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|IR[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|IR[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|IR[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|IR[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|IR[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|IR[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; SW[16] ; Rise ; T80se:z80_inst|T80:u0|IR[6] ;+--------+--------------+----------------+------------+--------+------------+-----------------------------------++-----------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'CLOCK_50' ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------+; -3.000 ; 1.000 ; 4.000 ; Port Rate ; CLOCK_50 ; Rise ; CLOCK_50 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_EN ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_ON ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|LCD_RS ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|char_count_sig[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_400hz_enable ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[10] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[11] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[12] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[13] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[14] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[15] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[16] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[17] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[18] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[19] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[8] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|clk_count_400hz[9] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|data_bus_value[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_clear ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_off ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.display_on ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.func_set ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.line2 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.mode_set ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.print_string ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.reset2 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.reset3 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|next_command.return_home ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_clear ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_off ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.display_on ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.drop_LCD_EN ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.func_set ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.hold ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.line2 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.mode_set ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.print_string ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset1 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset2 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.reset3 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; LCD:lcd_inst|state.return_home ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[10] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[11] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[12] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[13] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[14] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[15] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[8] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; \random:rand_temp[9] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_100Hz ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_10MHz ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_10Mhz_int ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_25Mhz_int ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_357Mhz ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|clock_357Mhz_int ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_10Mhz[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; clk_div:clkdiv_inst|count_357Mhz[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_ascii_reg1[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; CLOCK_50 ; Rise ; ps2_read ;+--------+--------------+----------------+------------+----------+------------+-----------------------------------------++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25MHz' ;+--------+--------------+----------------+-----------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+-----------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a4~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|address_reg_a[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|out_address_reg_a[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a0~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a11~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a12~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a13 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a13~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a14~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a15~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a1~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a2~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a4~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a6~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a7~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a9~porta_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|blue_out[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[8] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|h_count[9] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|horiz_sync_out ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[8] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_column[9] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|pixel_row[8] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[8] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|v_count[9] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|vert_sync_out ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_h ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; video:video_inst|VGA_SYNC:vga_sync_inst|video_on_v ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a0~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a1~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a2~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a3~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a4~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a5~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a6~portb_address_reg0 ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; vram:vram_inst|altsyncram:altsyncram_component|altsyncram_oal1:auto_generated|ram_block1a7~portb_address_reg0 ;; 0.194 ; 0.424 ; 0.230 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5~porta_address_reg0 ;; 0.194 ; 0.424 ; 0.230 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8~porta_address_reg0 ;; 0.195 ; 0.425 ; 0.230 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; charram:cram|altsyncram:altsyncram_component|altsyncram_l4o1:auto_generated|ram_block1a0~portb_address_reg0 ;; 0.195 ; 0.425 ; 0.230 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a10~porta_address_reg0 ;; 0.195 ; 0.425 ; 0.230 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a3~porta_address_reg0 ;; 0.195 ; 0.425 ; 0.230 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a5 ;; 0.195 ; 0.425 ; 0.230 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25MHz ; Rise ; rom:rom_inst|altsyncram:altsyncram_component|altsyncram_f0a1:auto_generated|ram_block1a8 ;+--------+--------------+----------------+-----------------+---------------------------------+------------+---------------------------------------------------------------------------------------------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered' ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.156 ; 0.340 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; 0.156 ; 0.340 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; 0.156 ; 0.340 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; 0.156 ; 0.340 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; 0.156 ; 0.340 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; 0.156 ; 0.340 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; 0.156 ; 0.340 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; 0.157 ; 0.341 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.158 ; 0.342 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; 0.336 ; 0.336 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[0]|clk ;; 0.336 ; 0.336 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[1]|clk ;; 0.336 ; 0.336 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[2]|clk ;; 0.336 ; 0.336 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[3]|clk ;; 0.336 ; 0.336 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|READ_CHAR|clk ;; 0.336 ; 0.336 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|clk ;; 0.336 ; 0.336 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[5]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[0]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[1]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[2]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[3]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[4]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[5]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[6]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[7]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|SHIFTIN[8]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[0]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[1]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[3]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[4]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[6]|clk ;; 0.337 ; 0.337 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[7]|clk ;; 0.338 ; 0.338 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|scan_code[2]|clk ;; 0.352 ; 0.352 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|inclk[0] ;; 0.352 ; 0.352 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|outclk ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[0] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[1] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[2] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|INCNT[3] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|READ_CHAR ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[0] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[1] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[2] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[3] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[4] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[5] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[6] ;; 0.435 ; 0.651 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_code[7] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[0] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[1] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[2] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[3] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[4] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[5] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[6] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[7] ;; 0.436 ; 0.652 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|SHIFTIN[8] ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered|q ;; 0.643 ; 0.643 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|inclk[0] ;; 0.643 ; 0.643 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|keyboard_clk_filtered~clkctrl|outclk ;; 0.657 ; 0.657 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[0]|clk ;; 0.657 ; 0.657 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; Rise ; ps2_kbd_inst|kbd_inst|INCNT[1]|clk ;+--------+--------------+----------------+------------------+-------------------------------------------------------------+------------+--------------------------------------------------------------++--------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'LCD:lcd_inst|clk_400hz_enable' ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.209 ; 0.393 ; 0.184 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; 0.215 ; 0.399 ; 0.184 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; 0.217 ; 0.401 ; 0.184 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; 0.217 ; 0.401 ; 0.184 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; 0.222 ; 0.406 ; 0.184 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; 0.223 ; 0.407 ; 0.184 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; 0.226 ; 0.410 ; 0.184 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; 0.235 ; 0.419 ; 0.184 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.360 ; 0.576 ; 0.216 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7] ;; 0.368 ; 0.584 ; 0.216 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0] ;; 0.371 ; 0.587 ; 0.216 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2] ;; 0.373 ; 0.589 ; 0.216 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3] ;; 0.377 ; 0.593 ; 0.216 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1] ;; 0.377 ; 0.593 ; 0.216 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5] ;; 0.379 ; 0.595 ; 0.216 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4] ;; 0.385 ; 0.601 ; 0.216 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6] ;; 0.389 ; 0.389 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6]|clk ;; 0.395 ; 0.395 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4]|clk ;; 0.397 ; 0.397 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1]|clk ;; 0.397 ; 0.397 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5]|clk ;; 0.402 ; 0.402 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3]|clk ;; 0.403 ; 0.403 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2]|clk ;; 0.406 ; 0.406 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0]|clk ;; 0.415 ; 0.415 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; lcd_inst|clk_400hz_enable|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; lcd_inst|clk_400hz_enable|q ;; 0.582 ; 0.582 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[7]|clk ;; 0.590 ; 0.590 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[0]|clk ;; 0.593 ; 0.593 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[2]|clk ;; 0.595 ; 0.595 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[3]|clk ;; 0.599 ; 0.599 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[1]|clk ;; 0.599 ; 0.599 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[5]|clk ;; 0.601 ; 0.601 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[4]|clk ;; 0.607 ; 0.607 ; 0.000 ; High Pulse Width ; LCD:lcd_inst|clk_400hz_enable ; Rise ; next_char_sig[6]|clk ;+--------+--------------+----------------+------------------+-------------------------------+------------+-----------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_25Mhz_int' ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.279 ; 0.463 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; 0.279 ; 0.463 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; 0.279 ; 0.463 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; 0.279 ; 0.463 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; 0.279 ; 0.463 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; 0.279 ; 0.463 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.318 ; 0.534 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_1Mhz_int ;; 0.318 ; 0.534 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[0] ;; 0.318 ; 0.534 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[1] ;; 0.318 ; 0.534 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[2] ;; 0.318 ; 0.534 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[3] ;; 0.318 ; 0.534 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clk_div:clkdiv_inst|count_1Mhz[4] ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|clk ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[0]|clk ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[1]|clk ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[2]|clk ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[3]|clk ;; 0.459 ; 0.459 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[4]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_25Mhz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_25Mhz_int|q ;; 0.540 ; 0.540 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|clk ;; 0.540 ; 0.540 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[0]|clk ;; 0.540 ; 0.540 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[1]|clk ;; 0.540 ; 0.540 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[2]|clk ;; 0.540 ; 0.540 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[3]|clk ;; 0.540 ; 0.540 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_25Mhz_int ; Rise ; clkdiv_inst|count_1Mhz[4]|clk ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Khz_int' ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.179 ; 0.363 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; 0.179 ; 0.363 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; 0.179 ; 0.363 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; 0.179 ; 0.363 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.359 ; 0.359 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|clk ;; 0.359 ; 0.359 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[0]|clk ;; 0.359 ; 0.359 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[1]|clk ;; 0.359 ; 0.359 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[2]|clk ;; 0.414 ; 0.630 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|clock_10Khz_int ;; 0.414 ; 0.630 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[0] ;; 0.414 ; 0.630 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[1] ;; 0.414 ; 0.630 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clk_div:clkdiv_inst|count_10Khz[2] ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_100Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_100Khz_int|q ;; 0.636 ; 0.636 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|clk ;; 0.636 ; 0.636 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[0]|clk ;; 0.636 ; 0.636 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[1]|clk ;; 0.636 ; 0.636 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Khz_int ; Rise ; clkdiv_inst|count_10Khz[2]|clk ;+--------+--------------+----------------+------------------+--------------------------------------+------------+-------------------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_10Khz_int' ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.274 ; 0.458 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; 0.274 ; 0.458 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; 0.274 ; 0.458 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; 0.274 ; 0.458 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.323 ; 0.539 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|clock_1Khz_int ;; 0.323 ; 0.539 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[0] ;; 0.323 ; 0.539 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[1] ;; 0.323 ; 0.539 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clk_div:clkdiv_inst|count_1Khz[2] ;; 0.454 ; 0.454 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|clk ;; 0.454 ; 0.454 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[0]|clk ;; 0.454 ; 0.454 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[1]|clk ;; 0.454 ; 0.454 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_10Khz_int|q ;; 0.545 ; 0.545 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|clk ;; 0.545 ; 0.545 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[0]|clk ;; 0.545 ; 0.545 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[1]|clk ;; 0.545 ; 0.545 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_10Khz_int ; Rise ; clkdiv_inst|count_1Khz[2]|clk ;+--------+--------------+----------------+------------------+-------------------------------------+------------+------------------------------------++---------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Khz_int' ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.256 ; 0.440 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; 0.256 ; 0.440 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; 0.256 ; 0.440 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; 0.256 ; 0.440 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.339 ; 0.555 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|clock_100hz_int ;; 0.339 ; 0.555 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[0] ;; 0.339 ; 0.555 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[1] ;; 0.339 ; 0.555 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clk_div:clkdiv_inst|count_100hz[2] ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_100hz_int|clk ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[0]|clk ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[1]|clk ;; 0.436 ; 0.436 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_1Khz_int|q ;; 0.561 ; 0.561 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|clock_100hz_int|clk ;; 0.561 ; 0.561 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[0]|clk ;; 0.561 ; 0.561 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[1]|clk ;; 0.561 ; 0.561 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Khz_int ; Rise ; clkdiv_inst|count_100hz[2]|clk ;+--------+--------------+----------------+------------------+------------------------------------+------------+-------------------------------------++----------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_1Mhz_int' ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.272 ; 0.456 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; 0.272 ; 0.456 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; 0.272 ; 0.456 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; 0.272 ; 0.456 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.324 ; 0.540 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|clock_100Khz_int ;; 0.324 ; 0.540 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[0] ;; 0.324 ; 0.540 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[1] ;; 0.324 ; 0.540 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clk_div:clkdiv_inst|count_100Khz[2] ;; 0.452 ; 0.452 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_100Khz_int|clk ;; 0.452 ; 0.452 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[0]|clk ;; 0.452 ; 0.452 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[1]|clk ;; 0.452 ; 0.452 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[2]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_1Mhz_int|q ;; 0.546 ; 0.546 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|clock_100Khz_int|clk ;; 0.546 ; 0.546 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[0]|clk ;; 0.546 ; 0.546 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[1]|clk ;; 0.546 ; 0.546 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_1Mhz_int ; Rise ; clkdiv_inst|count_100Khz[2]|clk ;+--------+--------------+----------------+------------------+------------------------------------+------------+--------------------------------------++----------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'clk_div:clkdiv_inst|clock_100Hz' ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; -1.000 ; 1.000 ; 2.000 ; Min Period ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.259 ; 0.443 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; 0.259 ; 0.443 ; 0.184 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.338 ; 0.554 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[0] ;; 0.338 ; 0.554 ; 0.216 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2kbd:ps2_kbd_inst|caps[1] ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[0]|clk ;; 0.439 ; 0.439 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[1]|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; clkdiv_inst|clock_100Hz|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; clkdiv_inst|clock_100Hz|q ;; 0.560 ; 0.560 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[0]|clk ;; 0.560 ; 0.560 ; 0.000 ; High Pulse Width ; clk_div:clkdiv_inst|clock_100Hz ; Rise ; ps2_kbd_inst|caps[1]|clk ;+--------+--------------+----------------+------------------+---------------------------------+------------+-----------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set' ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------+; -1.000 ; 1.000 ; 2.000 ; Min Period ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.243 ; 0.427 ; 0.184 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.351 ; 0.567 ; 0.216 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|scan_ready ;; 0.423 ; 0.423 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|scan_ready|clk ;; 0.500 ; 0.500 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|q ;; 0.500 ; 0.500 ; 0.000 ; Low Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|ready_set|q ;; 0.573 ; 0.573 ; 0.000 ; High Pulse Width ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; Rise ; ps2_kbd_inst|kbd_inst|scan_ready|clk ;+--------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------++-----------------------------------------------------------------------------------------------------------------------+; Fast 1200mV 0C Model Minimum Pulse Width: 'T80se:z80_inst|MREQ_n' ;+--------+--------------+----------------+------------------+-----------------------+------------+----------------------+; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;+--------+--------------+----------------+------------------+-----------------------+------------+----------------------+; -0.120 ; -0.120 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[6][4] ;; -0.115 ; -0.115 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[6][4]|dataa ;; -0.101 ; -0.101 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[6][0] ;; -0.096 ; -0.096 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[6][6] ;; -0.089 ; -0.089 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[6][1] ;; -0.089 ; -0.089 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[6][5] ;; -0.085 ; -0.085 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[6][0]|dataa ;; -0.084 ; -0.084 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[6][1]|datab ;; -0.084 ; -0.084 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[6][5]|datab ;; -0.080 ; -0.080 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[6][6]|dataa ;; -0.079 ; -0.079 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[6][2] ;; -0.079 ; -0.079 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[6][3] ;; -0.077 ; -0.077 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[14][6] ;; -0.076 ; -0.076 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[6][2]|datac ;; -0.076 ; -0.076 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[6][3]|datac ;; -0.075 ; -0.075 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[6][7] ;; -0.072 ; -0.072 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[6][7]|datac ;; -0.069 ; -0.069 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[14][6]|dataa ;; -0.067 ; -0.067 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][2] ;; -0.066 ; -0.066 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][6] ;; -0.064 ; -0.064 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][2]|datac ;; -0.063 ; -0.063 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][6]|datac ;; -0.063 ; -0.063 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[14][2] ;; -0.061 ; -0.061 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][7] ;; -0.060 ; -0.060 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[14][2]|datac ;; -0.058 ; -0.058 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[14][7] ;; -0.058 ; -0.058 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[31][1]|datad ;; -0.058 ; -0.058 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[31][6]|datad ;; -0.058 ; -0.058 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[31][7]|datad ;; -0.055 ; -0.055 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[14][1]|datad ;; -0.055 ; -0.055 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[31][0]|datad ;; -0.055 ; -0.055 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[31][3]|datad ;; -0.055 ; -0.055 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[31][5]|datad ;; -0.054 ; -0.054 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[31][2]|datad ;; -0.054 ; -0.054 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[31][4]|datad ;; -0.053 ; -0.053 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[31][1] ;; -0.053 ; -0.053 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[31][6] ;; -0.053 ; -0.053 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[31][7] ;; -0.051 ; -0.051 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][6] ;; -0.051 ; -0.051 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][1] ;; -0.051 ; -0.051 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[8][0] ;; -0.050 ; -0.050 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][1] ;; -0.050 ; -0.050 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][4] ;; -0.050 ; -0.050 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[14][1] ;; -0.050 ; -0.050 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[31][0] ;; -0.050 ; -0.050 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[31][3] ;; -0.050 ; -0.050 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[31][5] ;; -0.049 ; -0.049 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][0] ;; -0.049 ; -0.049 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[31][2] ;; -0.049 ; -0.049 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[31][4] ;; -0.048 ; -0.048 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[14][4] ;; -0.048 ; -0.048 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][4] ;; -0.048 ; -0.048 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][6]|datac ;; -0.048 ; -0.048 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[5][5] ;; -0.048 ; -0.048 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[8][0]|datac ;; -0.047 ; -0.047 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][1]|datac ;; -0.047 ; -0.047 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][4]|datac ;; -0.046 ; -0.046 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[14][0] ;; -0.046 ; -0.046 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][3] ;; -0.046 ; -0.046 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][7] ;; -0.046 ; -0.046 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[7][1]|datab ;; -0.045 ; -0.045 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[14][4]|datac ;; -0.045 ; -0.045 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][0] ;; -0.044 ; -0.044 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][0]|datab ;; -0.044 ; -0.044 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[12][7]|datab ;; -0.044 ; -0.044 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[15][2] ;; -0.044 ; -0.044 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[8][2] ;; -0.044 ; -0.044 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[9][0] ;; -0.041 ; -0.041 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[14][0]|datab ;; -0.041 ; -0.041 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[14][7]|datab ;; -0.041 ; -0.041 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][7]|dataa ;; -0.041 ; -0.041 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][5] ;; -0.040 ; -0.040 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][0]|dataa ;; -0.040 ; -0.040 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[4][1] ;; -0.039 ; -0.039 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][2]|dataa ;; -0.039 ; -0.039 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[17][2] ;; -0.038 ; -0.038 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[15][3]|dataa ;; -0.038 ; -0.038 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[17][5] ;; -0.038 ; -0.038 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[17][7] ;; -0.038 ; -0.038 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[27][5] ;; -0.038 ; -0.038 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][5]|datac ;; -0.038 ; -0.038 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][3] ;; -0.038 ; -0.038 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[7][7] ;; -0.037 ; -0.037 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[12][3] ;; -0.037 ; -0.037 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[27][4] ;; -0.037 ; -0.037 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[4][1]|datac ;; -0.036 ; -0.036 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[17][0] ;; -0.036 ; -0.036 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[17][1] ;; -0.036 ; -0.036 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[17][2]|datac ;; -0.036 ; -0.036 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[17][3] ;; -0.036 ; -0.036 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[17][4] ;; -0.036 ; -0.036 ; 0.000 ; High Pulse Width ; T80se:z80_inst|MREQ_n ; Fall ; lcdvram[17][6] ;; -0.036 ; -0.036 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[8][2]|dataa ;; -0.036 ; -0.036 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[9][0]|dataa ;; -0.035 ; -0.035 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[17][5]|datac ;; -0.035 ; -0.035 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[17][7]|datac ;; -0.035 ; -0.035 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[27][5]|datac ;; -0.035 ; -0.035 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[5][6]|datad ;; -0.035 ; -0.035 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[7][3]|datac ;; -0.035 ; -0.035 ; 0.000 ; Low Pulse Width ; T80se:z80_inst|MREQ_n ; Rise ; lcdvram[7][7]|datac ;+--------+--------------+----------------+------------------+-----------------------+------------+----------------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Setup Times ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------+; PS2_CLK ; CLOCK_50 ; 1.691 ; 2.646 ; Rise ; CLOCK_50 ;; SW[*] ; CLOCK_50 ; 2.474 ; 3.338 ; Rise ; CLOCK_50 ;; SW[17] ; CLOCK_50 ; 2.474 ; 3.338 ; Rise ; CLOCK_50 ;; KEY[*] ; SW[16] ; 1.772 ; 2.603 ; Rise ; SW[16] ;; KEY[0] ; SW[16] ; 1.772 ; 2.603 ; Rise ; SW[16] ;; KEY[1] ; SW[16] ; 1.499 ; 2.385 ; Rise ; SW[16] ;; KEY[2] ; SW[16] ; 1.350 ; 2.184 ; Rise ; SW[16] ;; KEY[3] ; SW[16] ; 0.720 ; 1.487 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 1.544 ; 2.610 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 1.544 ; 2.610 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 1.441 ; 2.513 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 1.072 ; 2.111 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 1.159 ; 2.253 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 0.888 ; 1.878 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 0.893 ; 1.837 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 1.230 ; 2.192 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 1.151 ; 2.117 ; Rise ; SW[16] ;; SW[*] ; SW[16] ; 1.745 ; 2.700 ; Rise ; SW[16] ;; SW[0] ; SW[16] ; 1.745 ; 2.700 ; Rise ; SW[16] ;; SW[1] ; SW[16] ; 1.004 ; 1.965 ; Rise ; SW[16] ;; SW[2] ; SW[16] ; 1.431 ; 2.401 ; Rise ; SW[16] ;; SW[3] ; SW[16] ; 0.934 ; 1.975 ; Rise ; SW[16] ;; SW[4] ; SW[16] ; 0.476 ; 1.466 ; Rise ; SW[16] ;; SW[5] ; SW[16] ; 0.634 ; 1.635 ; Rise ; SW[16] ;; SW[6] ; SW[16] ; 0.994 ; 2.023 ; Rise ; SW[16] ;; SW[7] ; SW[16] ; 0.945 ; 1.985 ; Rise ; SW[16] ;; SW[8] ; SW[16] ; 1.525 ; 2.587 ; Rise ; SW[16] ;; SW[9] ; SW[16] ; 1.466 ; 2.470 ; Rise ; SW[16] ;; SW[10] ; SW[16] ; 1.177 ; 2.201 ; Rise ; SW[16] ;; SW[11] ; SW[16] ; 1.489 ; 2.531 ; Rise ; SW[16] ;; SW[12] ; SW[16] ; 0.506 ; 1.502 ; Rise ; SW[16] ;; SW[13] ; SW[16] ; 0.952 ; 2.011 ; Rise ; SW[16] ;; SW[14] ; SW[16] ; 0.943 ; 1.962 ; Rise ; SW[16] ;; SW[15] ; SW[16] ; 1.022 ; 2.076 ; Rise ; SW[16] ;; PS2_DAT ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.161 ; 2.114 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[*] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.756 ; 2.671 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[17] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1.756 ; 2.671 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Hold Times ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------+; PS2_CLK ; CLOCK_50 ; -1.427 ; -2.367 ; Rise ; CLOCK_50 ;; SW[*] ; CLOCK_50 ; -1.376 ; -2.299 ; Rise ; CLOCK_50 ;; SW[17] ; CLOCK_50 ; -1.376 ; -2.299 ; Rise ; CLOCK_50 ;; KEY[*] ; SW[16] ; 0.059 ; -0.720 ; Rise ; SW[16] ;; KEY[0] ; SW[16] ; -1.040 ; -1.861 ; Rise ; SW[16] ;; KEY[1] ; SW[16] ; -0.753 ; -1.654 ; Rise ; SW[16] ;; KEY[2] ; SW[16] ; -0.546 ; -1.375 ; Rise ; SW[16] ;; KEY[3] ; SW[16] ; 0.059 ; -0.720 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; -0.265 ; -1.201 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; -0.954 ; -2.000 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; -0.775 ; -1.821 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; -0.392 ; -1.379 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; -0.438 ; -1.502 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; -0.290 ; -1.270 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; -0.265 ; -1.201 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; -0.553 ; -1.480 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; -0.483 ; -1.414 ; Rise ; SW[16] ;; SW[*] ; SW[16] ; 0.042 ; -0.940 ; Rise ; SW[16] ;; SW[0] ; SW[16] ; -1.020 ; -1.964 ; Rise ; SW[16] ;; SW[1] ; SW[16] ; -0.373 ; -1.314 ; Rise ; SW[16] ;; SW[2] ; SW[16] ; -0.631 ; -1.580 ; Rise ; SW[16] ;; SW[3] ; SW[16] ; -0.221 ; -1.233 ; Rise ; SW[16] ;; SW[4] ; SW[16] ; 0.042 ; -0.940 ; Rise ; SW[16] ;; SW[5] ; SW[16] ; -0.075 ; -1.059 ; Rise ; SW[16] ;; SW[6] ; SW[16] ; -0.412 ; -1.416 ; Rise ; SW[16] ;; SW[7] ; SW[16] ; -0.386 ; -1.374 ; Rise ; SW[16] ;; SW[8] ; SW[16] ; -0.931 ; -1.977 ; Rise ; SW[16] ;; SW[9] ; SW[16] ; -0.749 ; -1.710 ; Rise ; SW[16] ;; SW[10] ; SW[16] ; -0.490 ; -1.462 ; Rise ; SW[16] ;; SW[11] ; SW[16] ; -0.692 ; -1.694 ; Rise ; SW[16] ;; SW[12] ; SW[16] ; 0.014 ; -0.974 ; Rise ; SW[16] ;; SW[13] ; SW[16] ; -0.380 ; -1.420 ; Rise ; SW[16] ;; SW[14] ; SW[16] ; -0.363 ; -1.353 ; Rise ; SW[16] ;; SW[15] ; SW[16] ; -0.459 ; -1.458 ; Rise ; SW[16] ;; PS2_DAT ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.208 ; -1.068 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[*] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.539 ; -1.466 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[17] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.539 ; -1.466 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------++-----------------------------------------------------------------------------------------------------------------+; Clock to Output Times ;+----------------+---------------------------------+-------+-------+------------+---------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+----------------+---------------------------------+-------+-------+------------+---------------------------------+; LCD_DATA[*] ; CLOCK_50 ; 6.718 ; 6.738 ; Rise ; CLOCK_50 ;; LCD_DATA[0] ; CLOCK_50 ; 6.075 ; 6.387 ; Rise ; CLOCK_50 ;; LCD_DATA[1] ; CLOCK_50 ; 5.481 ; 5.753 ; Rise ; CLOCK_50 ;; LCD_DATA[2] ; CLOCK_50 ; 6.323 ; 6.717 ; Rise ; CLOCK_50 ;; LCD_DATA[3] ; CLOCK_50 ; 6.611 ; 6.272 ; Rise ; CLOCK_50 ;; LCD_DATA[4] ; CLOCK_50 ; 6.159 ; 5.818 ; Rise ; CLOCK_50 ;; LCD_DATA[5] ; CLOCK_50 ; 6.580 ; 6.248 ; Rise ; CLOCK_50 ;; LCD_DATA[6] ; CLOCK_50 ; 5.057 ; 5.266 ; Rise ; CLOCK_50 ;; LCD_DATA[7] ; CLOCK_50 ; 6.718 ; 6.738 ; Rise ; CLOCK_50 ;; LCD_EN ; CLOCK_50 ; 6.957 ; 6.571 ; Rise ; CLOCK_50 ;; LCD_ON ; CLOCK_50 ; 6.887 ; 6.986 ; Rise ; CLOCK_50 ;; LCD_RS ; CLOCK_50 ; 5.710 ; 6.004 ; Rise ; CLOCK_50 ;; HEX0[*] ; SW[16] ; 8.978 ; 8.900 ; Rise ; SW[16] ;; HEX0[0] ; SW[16] ; 7.692 ; 7.910 ; Rise ; SW[16] ;; HEX0[1] ; SW[16] ; 8.577 ; 8.855 ; Rise ; SW[16] ;; HEX0[2] ; SW[16] ; 7.793 ; 7.991 ; Rise ; SW[16] ;; HEX0[3] ; SW[16] ; 7.424 ; 7.588 ; Rise ; SW[16] ;; HEX0[4] ; SW[16] ; 7.346 ; 7.462 ; Rise ; SW[16] ;; HEX0[5] ; SW[16] ; 8.978 ; 8.900 ; Rise ; SW[16] ;; HEX0[6] ; SW[16] ; 7.647 ; 7.482 ; Rise ; SW[16] ;; HEX1[*] ; SW[16] ; 9.106 ; 9.006 ; Rise ; SW[16] ;; HEX1[0] ; SW[16] ; 7.274 ; 7.359 ; Rise ; SW[16] ;; HEX1[1] ; SW[16] ; 7.829 ; 7.925 ; Rise ; SW[16] ;; HEX1[2] ; SW[16] ; 7.404 ; 7.582 ; Rise ; SW[16] ;; HEX1[3] ; SW[16] ; 7.645 ; 7.740 ; Rise ; SW[16] ;; HEX1[4] ; SW[16] ; 7.433 ; 7.542 ; Rise ; SW[16] ;; HEX1[5] ; SW[16] ; 9.106 ; 9.006 ; Rise ; SW[16] ;; HEX1[6] ; SW[16] ; 8.352 ; 8.466 ; Rise ; SW[16] ;; HEX2[*] ; SW[16] ; 7.793 ; 7.862 ; Rise ; SW[16] ;; HEX2[0] ; SW[16] ; 7.536 ; 7.573 ; Rise ; SW[16] ;; HEX2[1] ; SW[16] ; 7.056 ; 7.118 ; Rise ; SW[16] ;; HEX2[2] ; SW[16] ; 7.793 ; 7.862 ; Rise ; SW[16] ;; HEX2[3] ; SW[16] ; 7.759 ; 7.846 ; Rise ; SW[16] ;; HEX2[4] ; SW[16] ; 7.759 ; 7.778 ; Rise ; SW[16] ;; HEX2[5] ; SW[16] ; 7.236 ; 7.272 ; Rise ; SW[16] ;; HEX2[6] ; SW[16] ; 7.253 ; 7.175 ; Rise ; SW[16] ;; HEX3[*] ; SW[16] ; 9.350 ; 9.196 ; Rise ; SW[16] ;; HEX3[0] ; SW[16] ; 7.794 ; 7.870 ; Rise ; SW[16] ;; HEX3[1] ; SW[16] ; 7.597 ; 7.766 ; Rise ; SW[16] ;; HEX3[2] ; SW[16] ; 9.350 ; 9.196 ; Rise ; SW[16] ;; HEX3[3] ; SW[16] ; 7.448 ; 7.567 ; Rise ; SW[16] ;; HEX3[4] ; SW[16] ; 7.818 ; 8.040 ; Rise ; SW[16] ;; HEX3[5] ; SW[16] ; 7.500 ; 7.697 ; Rise ; SW[16] ;; HEX3[6] ; SW[16] ; 7.267 ; 7.146 ; Rise ; SW[16] ;; HEX4[*] ; SW[16] ; 7.517 ; 7.600 ; Rise ; SW[16] ;; HEX4[0] ; SW[16] ; 7.517 ; 7.600 ; Rise ; SW[16] ;; HEX4[1] ; SW[16] ; 7.426 ; 7.581 ; Rise ; SW[16] ;; HEX4[2] ; SW[16] ; 6.868 ; 6.865 ; Rise ; SW[16] ;; HEX4[3] ; SW[16] ; 6.851 ; 6.903 ; Rise ; SW[16] ;; HEX4[4] ; SW[16] ; 6.937 ; 7.017 ; Rise ; SW[16] ;; HEX4[5] ; SW[16] ; 6.853 ; 6.882 ; Rise ; SW[16] ;; HEX4[6] ; SW[16] ; 6.687 ; 6.654 ; Rise ; SW[16] ;; HEX5[*] ; SW[16] ; 8.561 ; 8.425 ; Rise ; SW[16] ;; HEX5[0] ; SW[16] ; 7.538 ; 7.645 ; Rise ; SW[16] ;; HEX5[1] ; SW[16] ; 8.561 ; 8.425 ; Rise ; SW[16] ;; HEX5[2] ; SW[16] ; 7.118 ; 7.187 ; Rise ; SW[16] ;; HEX5[3] ; SW[16] ; 7.300 ; 7.350 ; Rise ; SW[16] ;; HEX5[4] ; SW[16] ; 7.119 ; 7.205 ; Rise ; SW[16] ;; HEX5[5] ; SW[16] ; 7.502 ; 7.582 ; Rise ; SW[16] ;; HEX5[6] ; SW[16] ; 7.242 ; 7.146 ; Rise ; SW[16] ;; HEX6[*] ; SW[16] ; 7.863 ; 7.567 ; Rise ; SW[16] ;; HEX6[0] ; SW[16] ; 6.868 ; 6.866 ; Rise ; SW[16] ;; HEX6[1] ; SW[16] ; 6.323 ; 6.285 ; Rise ; SW[16] ;; HEX6[2] ; SW[16] ; 6.317 ; 6.251 ; Rise ; SW[16] ;; HEX6[3] ; SW[16] ; 7.008 ; 7.031 ; Rise ; SW[16] ;; HEX6[4] ; SW[16] ; 6.340 ; 6.294 ; Rise ; SW[16] ;; HEX6[5] ; SW[16] ; 7.863 ; 7.567 ; Rise ; SW[16] ;; HEX6[6] ; SW[16] ; 6.490 ; 6.503 ; Rise ; SW[16] ;; HEX7[*] ; SW[16] ; 6.728 ; 6.702 ; Rise ; SW[16] ;; HEX7[0] ; SW[16] ; 6.558 ; 6.522 ; Rise ; SW[16] ;; HEX7[1] ; SW[16] ; 6.394 ; 6.369 ; Rise ; SW[16] ;; HEX7[2] ; SW[16] ; 6.512 ; 6.474 ; Rise ; SW[16] ;; HEX7[3] ; SW[16] ; 6.538 ; 6.494 ; Rise ; SW[16] ;; HEX7[4] ; SW[16] ; 6.472 ; 6.449 ; Rise ; SW[16] ;; HEX7[5] ; SW[16] ; 6.452 ; 6.435 ; Rise ; SW[16] ;; HEX7[6] ; SW[16] ; 6.728 ; 6.702 ; Rise ; SW[16] ;; LEDG[*] ; SW[16] ; 8.985 ; 9.433 ; Rise ; SW[16] ;; LEDG[0] ; SW[16] ; 6.933 ; 7.135 ; Rise ; SW[16] ;; LEDG[1] ; SW[16] ; 8.985 ; 9.433 ; Rise ; SW[16] ;; LEDG[2] ; SW[16] ; 7.854 ; 8.171 ; Rise ; SW[16] ;; LEDG[3] ; SW[16] ; 7.182 ; 7.400 ; Rise ; SW[16] ;; LEDG[4] ; SW[16] ; 7.548 ; 7.788 ; Rise ; SW[16] ;; LEDG[5] ; SW[16] ; 6.929 ; 7.110 ; Rise ; SW[16] ;; LEDG[6] ; SW[16] ; 7.495 ; 7.727 ; Rise ; SW[16] ;; LEDG[7] ; SW[16] ; 7.694 ; 7.946 ; Rise ; SW[16] ;; LEDR[*] ; SW[16] ; 9.160 ; 9.688 ; Rise ; SW[16] ;; LEDR[0] ; SW[16] ; 6.810 ; 6.987 ; Rise ; SW[16] ;; LEDR[1] ; SW[16] ; 8.444 ; 8.784 ; Rise ; SW[16] ;; LEDR[2] ; SW[16] ; 9.160 ; 9.688 ; Rise ; SW[16] ;; LEDR[3] ; SW[16] ; 7.431 ; 7.722 ; Rise ; SW[16] ;; LEDR[4] ; SW[16] ; 7.066 ; 7.283 ; Rise ; SW[16] ;; LEDR[5] ; SW[16] ; 8.178 ; 8.484 ; Rise ; SW[16] ;; LEDR[6] ; SW[16] ; 7.302 ; 7.564 ; Rise ; SW[16] ;; LEDR[7] ; SW[16] ; 7.640 ; 7.882 ; Rise ; SW[16] ;; LEDR[8] ; SW[16] ; 7.614 ; 7.865 ; Rise ; SW[16] ;; LEDR[9] ; SW[16] ; 7.767 ; 8.018 ; Rise ; SW[16] ;; LEDR[10] ; SW[16] ; 7.531 ; 7.784 ; Rise ; SW[16] ;; LEDR[11] ; SW[16] ; 7.364 ; 7.596 ; Rise ; SW[16] ;; LEDR[12] ; SW[16] ; 7.499 ; 7.747 ; Rise ; SW[16] ;; LEDR[13] ; SW[16] ; 7.564 ; 7.818 ; Rise ; SW[16] ;; LEDR[14] ; SW[16] ; 7.695 ; 7.973 ; Rise ; SW[16] ;; LEDR[15] ; SW[16] ; 8.295 ; 8.591 ; Rise ; SW[16] ;; SRAM_ADDR[*] ; SW[16] ; 8.566 ; 8.561 ; Rise ; SW[16] ;; SRAM_ADDR[0] ; SW[16] ; 5.610 ; 5.786 ; Rise ; SW[16] ;; SRAM_ADDR[1] ; SW[16] ; 5.643 ; 5.829 ; Rise ; SW[16] ;; SRAM_ADDR[2] ; SW[16] ; 6.386 ; 6.667 ; Rise ; SW[16] ;; SRAM_ADDR[3] ; SW[16] ; 6.048 ; 6.267 ; Rise ; SW[16] ;; SRAM_ADDR[4] ; SW[16] ; 6.340 ; 6.578 ; Rise ; SW[16] ;; SRAM_ADDR[5] ; SW[16] ; 6.117 ; 6.344 ; Rise ; SW[16] ;; SRAM_ADDR[6] ; SW[16] ; 5.734 ; 5.923 ; Rise ; SW[16] ;; SRAM_ADDR[7] ; SW[16] ; 5.892 ; 6.120 ; Rise ; SW[16] ;; SRAM_ADDR[8] ; SW[16] ; 6.118 ; 6.361 ; Rise ; SW[16] ;; SRAM_ADDR[9] ; SW[16] ; 6.859 ; 6.780 ; Rise ; SW[16] ;; SRAM_ADDR[10] ; SW[16] ; 6.116 ; 6.313 ; Rise ; SW[16] ;; SRAM_ADDR[11] ; SW[16] ; 5.418 ; 5.560 ; Rise ; SW[16] ;; SRAM_ADDR[12] ; SW[16] ; 7.272 ; 7.275 ; Rise ; SW[16] ;; SRAM_ADDR[13] ; SW[16] ; 5.729 ; 5.898 ; Rise ; SW[16] ;; SRAM_ADDR[14] ; SW[16] ; 6.635 ; 6.376 ; Rise ; SW[16] ;; SRAM_ADDR[15] ; SW[16] ; 8.566 ; 8.561 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 8.318 ; 8.681 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 7.146 ; 7.323 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 7.420 ; 7.669 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 8.318 ; 8.681 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 7.695 ; 7.961 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 7.965 ; 8.263 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 7.466 ; 7.707 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 8.039 ; 8.317 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 7.019 ; 7.186 ; Rise ; SW[16] ;; SRAM_OE_N ; SW[16] ; 7.657 ; 7.757 ; Rise ; SW[16] ;; SRAM_WE_N ; SW[16] ; 6.904 ; 6.599 ; Rise ; SW[16] ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; ; 4.189 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; ; 4.281 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; 4.163 ; ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; 4.635 ; ; Fall ; T80se:z80_inst|MREQ_n ;; VGA_B[*] ; clk_div:clkdiv_inst|clock_25MHz ; 5.865 ; 6.141 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[4] ; clk_div:clkdiv_inst|clock_25MHz ; 5.561 ; 5.769 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[5] ; clk_div:clkdiv_inst|clock_25MHz ; 5.268 ; 5.457 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[6] ; clk_div:clkdiv_inst|clock_25MHz ; 5.865 ; 6.141 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[7] ; clk_div:clkdiv_inst|clock_25MHz ; 5.428 ; 5.628 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; 2.227 ; ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_HS ; clk_div:clkdiv_inst|clock_25MHz ; 4.609 ; 4.748 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_VS ; clk_div:clkdiv_inst|clock_25MHz ; 4.351 ; 4.431 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; ; 2.250 ; Fall ; clk_div:clkdiv_inst|clock_25MHz ;+----------------+---------------------------------+-------+-------+------------+---------------------------------++-----------------------------------------------------------------------------------------------------------------+; Minimum Clock to Output Times ;+----------------+---------------------------------+-------+-------+------------+---------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+----------------+---------------------------------+-------+-------+------------+---------------------------------+; LCD_DATA[*] ; CLOCK_50 ; 4.885 ; 5.083 ; Rise ; CLOCK_50 ;; LCD_DATA[0] ; CLOCK_50 ; 5.863 ; 6.160 ; Rise ; CLOCK_50 ;; LCD_DATA[1] ; CLOCK_50 ; 5.292 ; 5.552 ; Rise ; CLOCK_50 ;; LCD_DATA[2] ; CLOCK_50 ; 6.101 ; 6.477 ; Rise ; CLOCK_50 ;; LCD_DATA[3] ; CLOCK_50 ; 6.373 ; 6.051 ; Rise ; CLOCK_50 ;; LCD_DATA[4] ; CLOCK_50 ; 5.941 ; 5.616 ; Rise ; CLOCK_50 ;; LCD_DATA[5] ; CLOCK_50 ; 6.345 ; 6.029 ; Rise ; CLOCK_50 ;; LCD_DATA[6] ; CLOCK_50 ; 4.885 ; 5.083 ; Rise ; CLOCK_50 ;; LCD_DATA[7] ; CLOCK_50 ; 6.536 ; 6.545 ; Rise ; CLOCK_50 ;; LCD_EN ; CLOCK_50 ; 6.706 ; 6.338 ; Rise ; CLOCK_50 ;; LCD_ON ; CLOCK_50 ; 6.698 ; 6.783 ; Rise ; CLOCK_50 ;; LCD_RS ; CLOCK_50 ; 5.512 ; 5.792 ; Rise ; CLOCK_50 ;; HEX0[*] ; SW[16] ; 6.837 ; 6.957 ; Rise ; SW[16] ;; HEX0[0] ; SW[16] ; 7.204 ; 7.400 ; Rise ; SW[16] ;; HEX0[1] ; SW[16] ; 8.097 ; 8.347 ; Rise ; SW[16] ;; HEX0[2] ; SW[16] ; 7.324 ; 7.486 ; Rise ; SW[16] ;; HEX0[3] ; SW[16] ; 6.903 ; 7.058 ; Rise ; SW[16] ;; HEX0[4] ; SW[16] ; 6.837 ; 6.957 ; Rise ; SW[16] ;; HEX0[5] ; SW[16] ; 8.445 ; 8.393 ; Rise ; SW[16] ;; HEX0[6] ; SW[16] ; 7.132 ; 6.974 ; Rise ; SW[16] ;; HEX1[*] ; SW[16] ; 6.775 ; 6.879 ; Rise ; SW[16] ;; HEX1[0] ; SW[16] ; 6.775 ; 6.879 ; Rise ; SW[16] ;; HEX1[1] ; SW[16] ; 7.326 ; 7.413 ; Rise ; SW[16] ;; HEX1[2] ; SW[16] ; 6.952 ; 7.120 ; Rise ; SW[16] ;; HEX1[3] ; SW[16] ; 7.114 ; 7.225 ; Rise ; SW[16] ;; HEX1[4] ; SW[16] ; 6.923 ; 7.034 ; Rise ; SW[16] ;; HEX1[5] ; SW[16] ; 8.569 ; 8.487 ; Rise ; SW[16] ;; HEX1[6] ; SW[16] ; 7.860 ; 7.989 ; Rise ; SW[16] ;; HEX2[*] ; SW[16] ; 6.591 ; 6.645 ; Rise ; SW[16] ;; HEX2[0] ; SW[16] ; 7.037 ; 7.092 ; Rise ; SW[16] ;; HEX2[1] ; SW[16] ; 6.591 ; 6.645 ; Rise ; SW[16] ;; HEX2[2] ; SW[16] ; 7.298 ; 7.427 ; Rise ; SW[16] ;; HEX2[3] ; SW[16] ; 7.233 ; 7.320 ; Rise ; SW[16] ;; HEX2[4] ; SW[16] ; 7.239 ; 7.325 ; Rise ; SW[16] ;; HEX2[5] ; SW[16] ; 6.720 ; 6.783 ; Rise ; SW[16] ;; HEX2[6] ; SW[16] ; 6.758 ; 6.684 ; Rise ; SW[16] ;; HEX3[*] ; SW[16] ; 6.759 ; 6.654 ; Rise ; SW[16] ;; HEX3[0] ; SW[16] ; 7.281 ; 7.370 ; Rise ; SW[16] ;; HEX3[1] ; SW[16] ; 7.102 ; 7.265 ; Rise ; SW[16] ;; HEX3[2] ; SW[16] ; 8.842 ; 8.743 ; Rise ; SW[16] ;; HEX3[3] ; SW[16] ; 6.918 ; 7.055 ; Rise ; SW[16] ;; HEX3[4] ; SW[16] ; 7.108 ; 7.244 ; Rise ; SW[16] ;; HEX3[5] ; SW[16] ; 6.795 ; 6.917 ; Rise ; SW[16] ;; HEX3[6] ; SW[16] ; 6.759 ; 6.654 ; Rise ; SW[16] ;; HEX4[*] ; SW[16] ; 6.203 ; 6.183 ; Rise ; SW[16] ;; HEX4[0] ; SW[16] ; 7.011 ; 7.102 ; Rise ; SW[16] ;; HEX4[1] ; SW[16] ; 6.998 ; 7.075 ; Rise ; SW[16] ;; HEX4[2] ; SW[16] ; 6.411 ; 6.438 ; Rise ; SW[16] ;; HEX4[3] ; SW[16] ; 6.323 ; 6.336 ; Rise ; SW[16] ;; HEX4[4] ; SW[16] ; 6.470 ; 6.527 ; Rise ; SW[16] ;; HEX4[5] ; SW[16] ; 6.379 ; 6.401 ; Rise ; SW[16] ;; HEX4[6] ; SW[16] ; 6.203 ; 6.183 ; Rise ; SW[16] ;; HEX5[*] ; SW[16] ; 6.620 ; 6.648 ; Rise ; SW[16] ;; HEX5[0] ; SW[16] ; 7.028 ; 7.148 ; Rise ; SW[16] ;; HEX5[1] ; SW[16] ; 8.088 ; 7.938 ; Rise ; SW[16] ;; HEX5[2] ; SW[16] ; 6.639 ; 6.760 ; Rise ; SW[16] ;; HEX5[3] ; SW[16] ; 6.730 ; 6.798 ; Rise ; SW[16] ;; HEX5[4] ; SW[16] ; 6.620 ; 6.706 ; Rise ; SW[16] ;; HEX5[5] ; SW[16] ; 6.971 ; 7.068 ; Rise ; SW[16] ;; HEX5[6] ; SW[16] ; 6.729 ; 6.648 ; Rise ; SW[16] ;; HEX6[*] ; SW[16] ; 5.863 ; 5.832 ; Rise ; SW[16] ;; HEX6[0] ; SW[16] ; 6.383 ; 6.403 ; Rise ; SW[16] ;; HEX6[1] ; SW[16] ; 5.879 ; 5.841 ; Rise ; SW[16] ;; HEX6[2] ; SW[16] ; 5.865 ; 5.867 ; Rise ; SW[16] ;; HEX6[3] ; SW[16] ; 6.508 ; 6.528 ; Rise ; SW[16] ;; HEX6[4] ; SW[16] ; 5.863 ; 5.832 ; Rise ; SW[16] ;; HEX6[5] ; SW[16] ; 7.375 ; 7.102 ; Rise ; SW[16] ;; HEX6[6] ; SW[16] ; 6.012 ; 6.035 ; Rise ; SW[16] ;; HEX7[*] ; SW[16] ; 5.966 ; 5.968 ; Rise ; SW[16] ;; HEX7[0] ; SW[16] ; 6.095 ; 6.072 ; Rise ; SW[16] ;; HEX7[1] ; SW[16] ; 5.966 ; 5.971 ; Rise ; SW[16] ;; HEX7[2] ; SW[16] ; 6.076 ; 6.060 ; Rise ; SW[16] ;; HEX7[3] ; SW[16] ; 6.046 ; 6.029 ; Rise ; SW[16] ;; HEX7[4] ; SW[16] ; 6.000 ; 5.977 ; Rise ; SW[16] ;; HEX7[5] ; SW[16] ; 5.994 ; 5.968 ; Rise ; SW[16] ;; HEX7[6] ; SW[16] ; 6.239 ; 6.227 ; Rise ; SW[16] ;; LEDG[*] ; SW[16] ; 6.664 ; 6.838 ; Rise ; SW[16] ;; LEDG[0] ; SW[16] ; 6.666 ; 6.860 ; Rise ; SW[16] ;; LEDG[1] ; SW[16] ; 8.635 ; 9.066 ; Rise ; SW[16] ;; LEDG[2] ; SW[16] ; 7.552 ; 7.857 ; Rise ; SW[16] ;; LEDG[3] ; SW[16] ; 6.908 ; 7.117 ; Rise ; SW[16] ;; LEDG[4] ; SW[16] ; 7.258 ; 7.488 ; Rise ; SW[16] ;; LEDG[5] ; SW[16] ; 6.664 ; 6.838 ; Rise ; SW[16] ;; LEDG[6] ; SW[16] ; 7.206 ; 7.429 ; Rise ; SW[16] ;; LEDG[7] ; SW[16] ; 7.398 ; 7.641 ; Rise ; SW[16] ;; LEDR[*] ; SW[16] ; 6.549 ; 6.720 ; Rise ; SW[16] ;; LEDR[0] ; SW[16] ; 6.549 ; 6.720 ; Rise ; SW[16] ;; LEDR[1] ; SW[16] ; 8.116 ; 8.443 ; Rise ; SW[16] ;; LEDR[2] ; SW[16] ; 8.804 ; 9.310 ; Rise ; SW[16] ;; LEDR[3] ; SW[16] ; 7.144 ; 7.423 ; Rise ; SW[16] ;; LEDR[4] ; SW[16] ; 6.793 ; 7.001 ; Rise ; SW[16] ;; LEDR[5] ; SW[16] ; 7.861 ; 8.155 ; Rise ; SW[16] ;; LEDR[6] ; SW[16] ; 7.020 ; 7.272 ; Rise ; SW[16] ;; LEDR[7] ; SW[16] ; 7.345 ; 7.578 ; Rise ; SW[16] ;; LEDR[8] ; SW[16] ; 7.319 ; 7.560 ; Rise ; SW[16] ;; LEDR[9] ; SW[16] ; 7.503 ; 7.746 ; Rise ; SW[16] ;; LEDR[10] ; SW[16] ; 7.239 ; 7.483 ; Rise ; SW[16] ;; LEDR[11] ; SW[16] ; 7.079 ; 7.302 ; Rise ; SW[16] ;; LEDR[12] ; SW[16] ; 7.210 ; 7.448 ; Rise ; SW[16] ;; LEDR[13] ; SW[16] ; 7.271 ; 7.516 ; Rise ; SW[16] ;; LEDR[14] ; SW[16] ; 7.398 ; 7.664 ; Rise ; SW[16] ;; LEDR[15] ; SW[16] ; 8.010 ; 8.296 ; Rise ; SW[16] ;; SRAM_ADDR[*] ; SW[16] ; 5.219 ; 5.354 ; Rise ; SW[16] ;; SRAM_ADDR[0] ; SW[16] ; 5.398 ; 5.564 ; Rise ; SW[16] ;; SRAM_ADDR[1] ; SW[16] ; 5.430 ; 5.606 ; Rise ; SW[16] ;; SRAM_ADDR[2] ; SW[16] ; 6.144 ; 6.412 ; Rise ; SW[16] ;; SRAM_ADDR[3] ; SW[16] ; 5.818 ; 6.027 ; Rise ; SW[16] ;; SRAM_ADDR[4] ; SW[16] ; 6.102 ; 6.329 ; Rise ; SW[16] ;; SRAM_ADDR[5] ; SW[16] ; 5.885 ; 6.101 ; Rise ; SW[16] ;; SRAM_ADDR[6] ; SW[16] ; 5.521 ; 5.700 ; Rise ; SW[16] ;; SRAM_ADDR[7] ; SW[16] ; 5.673 ; 5.889 ; Rise ; SW[16] ;; SRAM_ADDR[8] ; SW[16] ; 5.887 ; 6.117 ; Rise ; SW[16] ;; SRAM_ADDR[9] ; SW[16] ; 6.657 ; 6.571 ; Rise ; SW[16] ;; SRAM_ADDR[10] ; SW[16] ; 5.890 ; 6.077 ; Rise ; SW[16] ;; SRAM_ADDR[11] ; SW[16] ; 5.219 ; 5.354 ; Rise ; SW[16] ;; SRAM_ADDR[12] ; SW[16] ; 7.056 ; 7.048 ; Rise ; SW[16] ;; SRAM_ADDR[13] ; SW[16] ; 5.518 ; 5.678 ; Rise ; SW[16] ;; SRAM_ADDR[14] ; SW[16] ; 6.385 ; 6.138 ; Rise ; SW[16] ;; SRAM_ADDR[15] ; SW[16] ; 8.157 ; 8.169 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 6.752 ; 6.910 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 6.875 ; 7.043 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 7.137 ; 7.374 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 8.000 ; 8.345 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 7.402 ; 7.655 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 7.660 ; 7.945 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 7.182 ; 7.411 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 7.731 ; 7.996 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 6.752 ; 6.910 ; Rise ; SW[16] ;; SRAM_OE_N ; SW[16] ; 6.074 ; 6.146 ; Rise ; SW[16] ;; SRAM_WE_N ; SW[16] ; 5.993 ; 5.756 ; Rise ; SW[16] ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; ; 4.039 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; ; 4.132 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; 4.017 ; ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; 4.469 ; ; Fall ; T80se:z80_inst|MREQ_n ;; VGA_B[*] ; clk_div:clkdiv_inst|clock_25MHz ; 5.073 ; 5.252 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[4] ; clk_div:clkdiv_inst|clock_25MHz ; 5.354 ; 5.552 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[5] ; clk_div:clkdiv_inst|clock_25MHz ; 5.073 ; 5.252 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[6] ; clk_div:clkdiv_inst|clock_25MHz ; 5.645 ; 5.908 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[7] ; clk_div:clkdiv_inst|clock_25MHz ; 5.227 ; 5.416 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; 2.160 ; ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_HS ; clk_div:clkdiv_inst|clock_25MHz ; 4.439 ; 4.570 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_VS ; clk_div:clkdiv_inst|clock_25MHz ; 4.191 ; 4.267 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; ; 2.180 ; Fall ; clk_div:clkdiv_inst|clock_25MHz ;+----------------+---------------------------------+-------+-------+------------+---------------------------------++------------------------------------------------------------------------------------------+; Output Enable Times ;+-------------+-----------------------+-------+-------+------------+-----------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-----------------------+-------+-------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 6.504 ; 6.430 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 6.758 ; 6.684 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 6.509 ; 6.435 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 6.504 ; 6.430 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 6.504 ; 6.430 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 6.834 ; 6.760 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 6.693 ; 6.619 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 6.693 ; 6.619 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 6.541 ; 6.467 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 4.186 ; 4.112 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 4.440 ; 4.366 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 4.191 ; 4.117 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 4.186 ; 4.112 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 4.186 ; 4.112 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 4.516 ; 4.442 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 4.375 ; 4.301 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 4.375 ; 4.301 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 4.223 ; 4.149 ; Rise ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+-------+-------+------------+-----------------------++------------------------------------------------------------------------------------------+; Minimum Output Enable Times ;+-------------+-----------------------+-------+-------+------------+-----------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-----------------------+-------+-------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 5.663 ; 5.589 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 5.908 ; 5.834 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 5.668 ; 5.594 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 5.663 ; 5.589 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 5.663 ; 5.589 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 5.981 ; 5.907 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 5.845 ; 5.771 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 5.845 ; 5.771 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 5.699 ; 5.625 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 4.039 ; 3.965 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 4.284 ; 4.210 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 4.044 ; 3.970 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 4.039 ; 3.965 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 4.039 ; 3.965 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 4.357 ; 4.283 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 4.221 ; 4.147 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 4.221 ; 4.147 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 4.075 ; 4.001 ; Rise ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+-------+-------+------------+-----------------------++--------------------------------------------------------------------------------------------------+; Output Disable Times ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 6.776 ; 6.850 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 7.051 ; 7.125 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 6.782 ; 6.856 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 6.776 ; 6.850 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 6.776 ; 6.850 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 7.132 ; 7.206 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 6.979 ; 7.053 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 6.979 ; 7.053 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 6.799 ; 6.873 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 4.507 ; 4.581 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 4.782 ; 4.856 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 4.513 ; 4.587 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 4.507 ; 4.581 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 4.507 ; 4.581 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 4.863 ; 4.937 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 4.710 ; 4.784 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 4.710 ; 4.784 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 4.530 ; 4.604 ; Fall ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+-----------+-----------+------------+-----------------------++--------------------------------------------------------------------------------------------------+; Minimum Output Disable Times ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+; SRAM_DQ[*] ; SW[16] ; 5.868 ; 5.942 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 6.133 ; 6.207 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 5.874 ; 5.948 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 5.868 ; 5.942 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 5.868 ; 5.942 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 6.210 ; 6.284 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 6.063 ; 6.137 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 6.063 ; 6.137 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 5.890 ; 5.964 ; Rise ; SW[16] ;; SRAM_DQ[*] ; T80se:z80_inst|MREQ_n ; 4.344 ; 4.418 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[0] ; T80se:z80_inst|MREQ_n ; 4.609 ; 4.683 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[1] ; T80se:z80_inst|MREQ_n ; 4.350 ; 4.424 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[2] ; T80se:z80_inst|MREQ_n ; 4.344 ; 4.418 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[3] ; T80se:z80_inst|MREQ_n ; 4.344 ; 4.418 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[4] ; T80se:z80_inst|MREQ_n ; 4.686 ; 4.760 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[5] ; T80se:z80_inst|MREQ_n ; 4.539 ; 4.613 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[6] ; T80se:z80_inst|MREQ_n ; 4.539 ; 4.613 ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_DQ[7] ; T80se:z80_inst|MREQ_n ; 4.366 ; 4.440 ; Fall ; T80se:z80_inst|MREQ_n ;+-------------+-----------------------+-----------+-----------+------------+-----------------------+---------------------------------------------; Fast 1200mV 0C Model Metastability Report ;---------------------------------------------No synchronizer chains to report.+--------------------------------------------------------------------------------------------------------------------------------+; Multicorner Timing Analysis Summary ;+--------------------------------------------------------------+-----------+----------+----------+---------+---------------------+; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ;+--------------------------------------------------------------+-----------+----------+----------+---------+---------------------+; Worst-case Slack ; -12.540 ; -2.980 ; -2.630 ; 1.565 ; -3.000 ;; CLOCK_50 ; -7.823 ; -0.335 ; N/A ; N/A ; -3.000 ;; LCD:lcd_inst|clk_400hz_enable ; -11.704 ; 1.167 ; N/A ; N/A ; -1.285 ;; SW[16] ; -12.540 ; -2.980 ; N/A ; N/A ; -3.000 ;; T80se:z80_inst|MREQ_n ; -2.601 ; -0.248 ; N/A ; N/A ; -0.120 ;; clk_div:clkdiv_inst|clock_100Hz ; -5.245 ; 0.210 ; N/A ; N/A ; -1.285 ;; clk_div:clkdiv_inst|clock_100Khz_int ; -0.530 ; -0.008 ; N/A ; N/A ; -1.285 ;; clk_div:clkdiv_inst|clock_10Khz_int ; -0.521 ; 0.010 ; N/A ; N/A ; -1.285 ;; clk_div:clkdiv_inst|clock_1Khz_int ; -0.190 ; 0.201 ; N/A ; N/A ; -1.285 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; -0.651 ; 0.061 ; N/A ; N/A ; -1.285 ;; clk_div:clkdiv_inst|clock_25MHz ; -5.695 ; 0.140 ; N/A ; N/A ; -2.693 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; -0.895 ; 0.214 ; N/A ; N/A ; -1.285 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -2.262 ; -0.439 ; N/A ; N/A ; -1.285 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; N/A ; N/A ; -2.630 ; 1.565 ; -1.285 ;; Design-wide TNS ; -4763.88 ; -136.6 ; -2.63 ; 0.0 ; -1164.564 ;; CLOCK_50 ; -185.058 ; -2.123 ; N/A ; N/A ; -141.780 ;; LCD:lcd_inst|clk_400hz_enable ; -88.730 ; 0.000 ; N/A ; N/A ; -10.280 ;; SW[16] ; -3745.302 ; -135.492 ; N/A ; N/A ; -864.856 ;; T80se:z80_inst|MREQ_n ; -454.970 ; -1.794 ; N/A ; N/A ; -9.204 ;; clk_div:clkdiv_inst|clock_100Hz ; -10.490 ; 0.000 ; N/A ; N/A ; -2.570 ;; clk_div:clkdiv_inst|clock_100Khz_int ; -0.826 ; -0.008 ; N/A ; N/A ; -5.140 ;; clk_div:clkdiv_inst|clock_10Khz_int ; -0.804 ; 0.000 ; N/A ; N/A ; -5.140 ;; clk_div:clkdiv_inst|clock_1Khz_int ; -0.495 ; 0.000 ; N/A ; N/A ; -5.140 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; -1.066 ; 0.000 ; N/A ; N/A ; -5.140 ;; clk_div:clkdiv_inst|clock_25MHz ; -252.613 ; 0.000 ; N/A ; N/A ; -178.641 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; -4.526 ; 0.000 ; N/A ; N/A ; -7.710 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -38.292 ; -0.439 ; N/A ; N/A ; -29.555 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; N/A ; N/A ; -2.630 ; 0.000 ; -1.285 ;+--------------------------------------------------------------+-----------+----------+----------+---------+---------------------++----------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Setup Times ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------+; PS2_CLK ; CLOCK_50 ; 3.471 ; 4.087 ; Rise ; CLOCK_50 ;; SW[*] ; CLOCK_50 ; 4.964 ; 5.578 ; Rise ; CLOCK_50 ;; SW[17] ; CLOCK_50 ; 4.964 ; 5.578 ; Rise ; CLOCK_50 ;; KEY[*] ; SW[16] ; 3.535 ; 3.995 ; Rise ; SW[16] ;; KEY[0] ; SW[16] ; 3.535 ; 3.995 ; Rise ; SW[16] ;; KEY[1] ; SW[16] ; 3.009 ; 3.453 ; Rise ; SW[16] ;; KEY[2] ; SW[16] ; 2.703 ; 3.122 ; Rise ; SW[16] ;; KEY[3] ; SW[16] ; 1.443 ; 1.925 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 3.187 ; 3.715 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 3.187 ; 3.715 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 2.894 ; 3.578 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 2.040 ; 2.782 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 2.211 ; 2.887 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 1.721 ; 2.361 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 1.683 ; 2.273 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 2.375 ; 3.020 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 2.236 ; 2.880 ; Rise ; SW[16] ;; SW[*] ; SW[16] ; 3.486 ; 4.029 ; Rise ; SW[16] ;; SW[0] ; SW[16] ; 3.486 ; 4.029 ; Rise ; SW[16] ;; SW[1] ; SW[16] ; 2.069 ; 2.605 ; Rise ; SW[16] ;; SW[2] ; SW[16] ; 2.824 ; 3.455 ; Rise ; SW[16] ;; SW[3] ; SW[16] ; 1.900 ; 2.535 ; Rise ; SW[16] ;; SW[4] ; SW[16] ; 0.995 ; 1.562 ; Rise ; SW[16] ;; SW[5] ; SW[16] ; 1.318 ; 1.894 ; Rise ; SW[16] ;; SW[6] ; SW[16] ; 2.065 ; 2.672 ; Rise ; SW[16] ;; SW[7] ; SW[16] ; 1.980 ; 2.580 ; Rise ; SW[16] ;; SW[8] ; SW[16] ; 3.184 ; 3.696 ; Rise ; SW[16] ;; SW[9] ; SW[16] ; 2.968 ; 3.634 ; Rise ; SW[16] ;; SW[10] ; SW[16] ; 2.391 ; 3.038 ; Rise ; SW[16] ;; SW[11] ; SW[16] ; 3.066 ; 3.669 ; Rise ; SW[16] ;; SW[12] ; SW[16] ; 1.158 ; 1.696 ; Rise ; SW[16] ;; SW[13] ; SW[16] ; 1.949 ; 2.524 ; Rise ; SW[16] ;; SW[14] ; SW[16] ; 2.015 ; 2.595 ; Rise ; SW[16] ;; SW[15] ; SW[16] ; 2.192 ; 2.775 ; Rise ; SW[16] ;; PS2_DAT ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 2.663 ; 3.183 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[*] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 3.701 ; 4.343 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[17] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 3.701 ; 4.343 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;+-------------+-------------------------------------------------------------+-------+-------+------------+-------------------------------------------------------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Hold Times ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------+; PS2_CLK ; CLOCK_50 ; -1.427 ; -2.367 ; Rise ; CLOCK_50 ;; SW[*] ; CLOCK_50 ; -1.376 ; -2.299 ; Rise ; CLOCK_50 ;; SW[17] ; CLOCK_50 ; -1.376 ; -2.299 ; Rise ; CLOCK_50 ;; KEY[*] ; SW[16] ; 0.059 ; -0.333 ; Rise ; SW[16] ;; KEY[0] ; SW[16] ; -1.040 ; -1.861 ; Rise ; SW[16] ;; KEY[1] ; SW[16] ; -0.753 ; -1.654 ; Rise ; SW[16] ;; KEY[2] ; SW[16] ; -0.546 ; -1.375 ; Rise ; SW[16] ;; KEY[3] ; SW[16] ; 0.059 ; -0.333 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; -0.265 ; -0.788 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; -0.954 ; -2.000 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; -0.775 ; -1.751 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; -0.392 ; -1.173 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; -0.438 ; -1.131 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; -0.290 ; -0.871 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; -0.265 ; -0.788 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; -0.553 ; -1.381 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; -0.483 ; -1.350 ; Rise ; SW[16] ;; SW[*] ; SW[16] ; 0.113 ; -0.210 ; Rise ; SW[16] ;; SW[0] ; SW[16] ; -1.020 ; -1.964 ; Rise ; SW[16] ;; SW[1] ; SW[16] ; -0.373 ; -0.948 ; Rise ; SW[16] ;; SW[2] ; SW[16] ; -0.631 ; -1.580 ; Rise ; SW[16] ;; SW[3] ; SW[16] ; -0.221 ; -0.809 ; Rise ; SW[16] ;; SW[4] ; SW[16] ; 0.113 ; -0.210 ; Rise ; SW[16] ;; SW[5] ; SW[16] ; -0.075 ; -0.462 ; Rise ; SW[16] ;; SW[6] ; SW[16] ; -0.412 ; -1.085 ; Rise ; SW[16] ;; SW[7] ; SW[16] ; -0.386 ; -1.097 ; Rise ; SW[16] ;; SW[8] ; SW[16] ; -0.931 ; -1.977 ; Rise ; SW[16] ;; SW[9] ; SW[16] ; -0.749 ; -1.710 ; Rise ; SW[16] ;; SW[10] ; SW[16] ; -0.490 ; -1.365 ; Rise ; SW[16] ;; SW[11] ; SW[16] ; -0.692 ; -1.694 ; Rise ; SW[16] ;; SW[12] ; SW[16] ; 0.014 ; -0.316 ; Rise ; SW[16] ;; SW[13] ; SW[16] ; -0.380 ; -1.016 ; Rise ; SW[16] ;; SW[14] ; SW[16] ; -0.363 ; -1.017 ; Rise ; SW[16] ;; SW[15] ; SW[16] ; -0.459 ; -1.258 ; Rise ; SW[16] ;; PS2_DAT ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.208 ; -0.839 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[*] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.539 ; -1.466 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;; SW[17] ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; -0.539 ; -1.466 ; Rise ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ;+-------------+-------------------------------------------------------------+--------+--------+------------+-------------------------------------------------------------++-------------------------------------------------------------------------------------------------------------------+; Clock to Output Times ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+----------------+---------------------------------+--------+--------+------------+---------------------------------+; LCD_DATA[*] ; CLOCK_50 ; 12.101 ; 12.194 ; Rise ; CLOCK_50 ;; LCD_DATA[0] ; CLOCK_50 ; 11.677 ; 11.624 ; Rise ; CLOCK_50 ;; LCD_DATA[1] ; CLOCK_50 ; 10.413 ; 10.465 ; Rise ; CLOCK_50 ;; LCD_DATA[2] ; CLOCK_50 ; 12.101 ; 12.194 ; Rise ; CLOCK_50 ;; LCD_DATA[3] ; CLOCK_50 ; 12.028 ; 12.082 ; Rise ; CLOCK_50 ;; LCD_DATA[4] ; CLOCK_50 ; 11.205 ; 11.069 ; Rise ; CLOCK_50 ;; LCD_DATA[5] ; CLOCK_50 ; 11.922 ; 12.054 ; Rise ; CLOCK_50 ;; LCD_DATA[6] ; CLOCK_50 ; 9.577 ; 9.604 ; Rise ; CLOCK_50 ;; LCD_DATA[7] ; CLOCK_50 ; 11.973 ; 11.696 ; Rise ; CLOCK_50 ;; LCD_EN ; CLOCK_50 ; 12.660 ; 12.724 ; Rise ; CLOCK_50 ;; LCD_ON ; CLOCK_50 ; 12.355 ; 12.166 ; Rise ; CLOCK_50 ;; LCD_RS ; CLOCK_50 ; 10.888 ; 10.941 ; Rise ; CLOCK_50 ;; HEX0[*] ; SW[16] ; 16.668 ; 16.602 ; Rise ; SW[16] ;; HEX0[0] ; SW[16] ; 15.160 ; 15.106 ; Rise ; SW[16] ;; HEX0[1] ; SW[16] ; 16.514 ; 16.602 ; Rise ; SW[16] ;; HEX0[2] ; SW[16] ; 15.399 ; 15.255 ; Rise ; SW[16] ;; HEX0[3] ; SW[16] ; 14.486 ; 14.482 ; Rise ; SW[16] ;; HEX0[4] ; SW[16] ; 14.339 ; 14.258 ; Rise ; SW[16] ;; HEX0[5] ; SW[16] ; 16.668 ; 16.333 ; Rise ; SW[16] ;; HEX0[6] ; SW[16] ; 14.635 ; 14.648 ; Rise ; SW[16] ;; HEX1[*] ; SW[16] ; 17.065 ; 16.534 ; Rise ; SW[16] ;; HEX1[0] ; SW[16] ; 14.269 ; 14.121 ; Rise ; SW[16] ;; HEX1[1] ; SW[16] ; 15.510 ; 15.167 ; Rise ; SW[16] ;; HEX1[2] ; SW[16] ; 14.481 ; 14.545 ; Rise ; SW[16] ;; HEX1[3] ; SW[16] ; 15.065 ; 14.833 ; Rise ; SW[16] ;; HEX1[4] ; SW[16] ; 14.519 ; 14.445 ; Rise ; SW[16] ;; HEX1[5] ; SW[16] ; 17.065 ; 16.534 ; Rise ; SW[16] ;; HEX1[6] ; SW[16] ; 15.367 ; 15.681 ; Rise ; SW[16] ;; HEX2[*] ; SW[16] ; 15.489 ; 15.085 ; Rise ; SW[16] ;; HEX2[0] ; SW[16] ; 14.939 ; 14.585 ; Rise ; SW[16] ;; HEX2[1] ; SW[16] ; 13.890 ; 13.753 ; Rise ; SW[16] ;; HEX2[2] ; SW[16] ; 15.489 ; 15.085 ; Rise ; SW[16] ;; HEX2[3] ; SW[16] ; 15.424 ; 15.066 ; Rise ; SW[16] ;; HEX2[4] ; SW[16] ; 15.430 ; 14.970 ; Rise ; SW[16] ;; HEX2[5] ; SW[16] ; 14.231 ; 14.026 ; Rise ; SW[16] ;; HEX2[6] ; SW[16] ; 13.963 ; 14.083 ; Rise ; SW[16] ;; HEX3[*] ; SW[16] ; 17.577 ; 16.891 ; Rise ; SW[16] ;; HEX3[0] ; SW[16] ; 15.492 ; 15.147 ; Rise ; SW[16] ;; HEX3[1] ; SW[16] ; 14.992 ; 14.907 ; Rise ; SW[16] ;; HEX3[2] ; SW[16] ; 17.577 ; 16.891 ; Rise ; SW[16] ;; HEX3[3] ; SW[16] ; 14.618 ; 14.525 ; Rise ; SW[16] ;; HEX3[4] ; SW[16] ; 15.496 ; 15.368 ; Rise ; SW[16] ;; HEX3[5] ; SW[16] ; 14.818 ; 14.764 ; Rise ; SW[16] ;; HEX3[6] ; SW[16] ; 13.989 ; 14.036 ; Rise ; SW[16] ;; HEX4[*] ; SW[16] ; 14.796 ; 14.549 ; Rise ; SW[16] ;; HEX4[0] ; SW[16] ; 14.796 ; 14.549 ; Rise ; SW[16] ;; HEX4[1] ; SW[16] ; 14.639 ; 14.502 ; Rise ; SW[16] ;; HEX4[2] ; SW[16] ; 13.392 ; 13.168 ; Rise ; SW[16] ;; HEX4[3] ; SW[16] ; 13.337 ; 13.232 ; Rise ; SW[16] ;; HEX4[4] ; SW[16] ; 13.584 ; 13.492 ; Rise ; SW[16] ;; HEX4[5] ; SW[16] ; 13.439 ; 13.259 ; Rise ; SW[16] ;; HEX4[6] ; SW[16] ; 12.934 ; 13.005 ; Rise ; SW[16] ;; HEX5[*] ; SW[16] ; 15.859 ; 15.492 ; Rise ; SW[16] ;; HEX5[0] ; SW[16] ; 14.806 ; 14.597 ; Rise ; SW[16] ;; HEX5[1] ; SW[16] ; 15.859 ; 15.492 ; Rise ; SW[16] ;; HEX5[2] ; SW[16] ; 13.976 ; 13.818 ; Rise ; SW[16] ;; HEX5[3] ; SW[16] ; 14.280 ; 14.059 ; Rise ; SW[16] ;; HEX5[4] ; SW[16] ; 13.948 ; 13.840 ; Rise ; SW[16] ;; HEX5[5] ; SW[16] ; 14.741 ; 14.481 ; Rise ; SW[16] ;; HEX5[6] ; SW[16] ; 13.905 ; 13.996 ; Rise ; SW[16] ;; HEX6[*] ; SW[16] ; 14.441 ; 13.951 ; Rise ; SW[16] ;; HEX6[0] ; SW[16] ; 13.474 ; 13.255 ; Rise ; SW[16] ;; HEX6[1] ; SW[16] ; 12.329 ; 12.189 ; Rise ; SW[16] ;; HEX6[2] ; SW[16] ; 12.337 ; 12.136 ; Rise ; SW[16] ;; HEX6[3] ; SW[16] ; 13.793 ; 13.538 ; Rise ; SW[16] ;; HEX6[4] ; SW[16] ; 12.357 ; 12.209 ; Rise ; SW[16] ;; HEX6[5] ; SW[16] ; 14.441 ; 13.951 ; Rise ; SW[16] ;; HEX6[6] ; SW[16] ; 12.577 ; 12.738 ; Rise ; SW[16] ;; HEX7[*] ; SW[16] ; 12.973 ; 13.113 ; Rise ; SW[16] ;; HEX7[0] ; SW[16] ; 12.845 ; 12.622 ; Rise ; SW[16] ;; HEX7[1] ; SW[16] ; 12.493 ; 12.346 ; Rise ; SW[16] ;; HEX7[2] ; SW[16] ; 12.679 ; 12.468 ; Rise ; SW[16] ;; HEX7[3] ; SW[16] ; 12.700 ; 12.509 ; Rise ; SW[16] ;; HEX7[4] ; SW[16] ; 12.614 ; 12.463 ; Rise ; SW[16] ;; HEX7[5] ; SW[16] ; 12.563 ; 12.428 ; Rise ; SW[16] ;; HEX7[6] ; SW[16] ; 12.973 ; 13.113 ; Rise ; SW[16] ;; LEDG[*] ; SW[16] ; 17.819 ; 17.770 ; Rise ; SW[16] ;; LEDG[0] ; SW[16] ; 13.682 ; 13.745 ; Rise ; SW[16] ;; LEDG[1] ; SW[16] ; 17.819 ; 17.770 ; Rise ; SW[16] ;; LEDG[2] ; SW[16] ; 15.545 ; 15.513 ; Rise ; SW[16] ;; LEDG[3] ; SW[16] ; 14.186 ; 14.170 ; Rise ; SW[16] ;; LEDG[4] ; SW[16] ; 14.877 ; 14.788 ; Rise ; SW[16] ;; LEDG[5] ; SW[16] ; 13.644 ; 13.626 ; Rise ; SW[16] ;; LEDG[6] ; SW[16] ; 14.793 ; 14.689 ; Rise ; SW[16] ;; LEDG[7] ; SW[16] ; 15.167 ; 15.052 ; Rise ; SW[16] ;; LEDR[*] ; SW[16] ; 18.072 ; 18.145 ; Rise ; SW[16] ;; LEDR[0] ; SW[16] ; 13.418 ; 13.416 ; Rise ; SW[16] ;; LEDR[1] ; SW[16] ; 16.792 ; 16.571 ; Rise ; SW[16] ;; LEDR[2] ; SW[16] ; 18.072 ; 18.145 ; Rise ; SW[16] ;; LEDR[3] ; SW[16] ; 14.720 ; 14.793 ; Rise ; SW[16] ;; LEDR[4] ; SW[16] ; 13.956 ; 13.997 ; Rise ; SW[16] ;; LEDR[5] ; SW[16] ; 16.228 ; 16.040 ; Rise ; SW[16] ;; LEDR[6] ; SW[16] ; 14.393 ; 14.483 ; Rise ; SW[16] ;; LEDR[7] ; SW[16] ; 15.082 ; 14.973 ; Rise ; SW[16] ;; LEDR[8] ; SW[16] ; 15.090 ; 14.971 ; Rise ; SW[16] ;; LEDR[9] ; SW[16] ; 14.815 ; 14.984 ; Rise ; SW[16] ;; LEDR[10] ; SW[16] ; 14.881 ; 14.800 ; Rise ; SW[16] ;; LEDR[11] ; SW[16] ; 14.535 ; 14.455 ; Rise ; SW[16] ;; LEDR[12] ; SW[16] ; 14.762 ; 14.701 ; Rise ; SW[16] ;; LEDR[13] ; SW[16] ; 14.941 ; 14.851 ; Rise ; SW[16] ;; LEDR[14] ; SW[16] ; 15.196 ; 15.109 ; Rise ; SW[16] ;; LEDR[15] ; SW[16] ; 15.916 ; 15.945 ; Rise ; SW[16] ;; SRAM_ADDR[*] ; SW[16] ; 15.598 ; 16.153 ; Rise ; SW[16] ;; SRAM_ADDR[0] ; SW[16] ; 11.065 ; 11.106 ; Rise ; SW[16] ;; SRAM_ADDR[1] ; SW[16] ; 11.115 ; 11.175 ; Rise ; SW[16] ;; SRAM_ADDR[2] ; SW[16] ; 12.561 ; 12.711 ; Rise ; SW[16] ;; SRAM_ADDR[3] ; SW[16] ; 11.967 ; 12.049 ; Rise ; SW[16] ;; SRAM_ADDR[4] ; SW[16] ; 12.514 ; 12.623 ; Rise ; SW[16] ;; SRAM_ADDR[5] ; SW[16] ; 12.048 ; 12.151 ; Rise ; SW[16] ;; SRAM_ADDR[6] ; SW[16] ; 11.275 ; 11.359 ; Rise ; SW[16] ;; SRAM_ADDR[7] ; SW[16] ; 11.533 ; 11.701 ; Rise ; SW[16] ;; SRAM_ADDR[8] ; SW[16] ; 12.075 ; 12.077 ; Rise ; SW[16] ;; SRAM_ADDR[9] ; SW[16] ; 12.681 ; 12.349 ; Rise ; SW[16] ;; SRAM_ADDR[10] ; SW[16] ; 12.081 ; 12.080 ; Rise ; SW[16] ;; SRAM_ADDR[11] ; SW[16] ; 10.611 ; 10.691 ; Rise ; SW[16] ;; SRAM_ADDR[12] ; SW[16] ; 13.453 ; 13.208 ; Rise ; SW[16] ;; SRAM_ADDR[13] ; SW[16] ; 11.259 ; 11.247 ; Rise ; SW[16] ;; SRAM_ADDR[14] ; SW[16] ; 12.633 ; 12.614 ; Rise ; SW[16] ;; SRAM_ADDR[15] ; SW[16] ; 15.598 ; 16.153 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 16.090 ; 16.113 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 13.854 ; 13.885 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 14.381 ; 14.508 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 16.090 ; 16.113 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 14.943 ; 15.007 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 15.535 ; 15.596 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 14.532 ; 14.589 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 15.659 ; 15.622 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 13.605 ; 13.666 ; Rise ; SW[16] ;; SRAM_OE_N ; SW[16] ; 14.827 ; 14.846 ; Rise ; SW[16] ;; SRAM_WE_N ; SW[16] ; 13.161 ; 13.070 ; Rise ; SW[16] ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; ; 7.604 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; ; 8.134 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; 7.616 ; ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; 8.241 ; ; Fall ; T80se:z80_inst|MREQ_n ;; VGA_B[*] ; clk_div:clkdiv_inst|clock_25MHz ; 11.260 ; 11.126 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[4] ; clk_div:clkdiv_inst|clock_25MHz ; 10.554 ; 10.391 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[5] ; clk_div:clkdiv_inst|clock_25MHz ; 9.970 ; 9.845 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[6] ; clk_div:clkdiv_inst|clock_25MHz ; 11.260 ; 11.126 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[7] ; clk_div:clkdiv_inst|clock_25MHz ; 10.276 ; 10.132 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; 4.024 ; ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_HS ; clk_div:clkdiv_inst|clock_25MHz ; 8.702 ; 8.721 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_VS ; clk_div:clkdiv_inst|clock_25MHz ; 8.116 ; 8.093 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; ; 3.908 ; Fall ; clk_div:clkdiv_inst|clock_25MHz ;+----------------+---------------------------------+--------+--------+------------+---------------------------------++-----------------------------------------------------------------------------------------------------------------+; Minimum Clock to Output Times ;+----------------+---------------------------------+-------+-------+------------+---------------------------------+; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;+----------------+---------------------------------+-------+-------+------------+---------------------------------+; LCD_DATA[*] ; CLOCK_50 ; 4.885 ; 5.083 ; Rise ; CLOCK_50 ;; LCD_DATA[0] ; CLOCK_50 ; 5.863 ; 6.160 ; Rise ; CLOCK_50 ;; LCD_DATA[1] ; CLOCK_50 ; 5.292 ; 5.552 ; Rise ; CLOCK_50 ;; LCD_DATA[2] ; CLOCK_50 ; 6.101 ; 6.477 ; Rise ; CLOCK_50 ;; LCD_DATA[3] ; CLOCK_50 ; 6.373 ; 6.051 ; Rise ; CLOCK_50 ;; LCD_DATA[4] ; CLOCK_50 ; 5.941 ; 5.616 ; Rise ; CLOCK_50 ;; LCD_DATA[5] ; CLOCK_50 ; 6.345 ; 6.029 ; Rise ; CLOCK_50 ;; LCD_DATA[6] ; CLOCK_50 ; 4.885 ; 5.083 ; Rise ; CLOCK_50 ;; LCD_DATA[7] ; CLOCK_50 ; 6.536 ; 6.545 ; Rise ; CLOCK_50 ;; LCD_EN ; CLOCK_50 ; 6.706 ; 6.338 ; Rise ; CLOCK_50 ;; LCD_ON ; CLOCK_50 ; 6.698 ; 6.783 ; Rise ; CLOCK_50 ;; LCD_RS ; CLOCK_50 ; 5.512 ; 5.792 ; Rise ; CLOCK_50 ;; HEX0[*] ; SW[16] ; 6.837 ; 6.957 ; Rise ; SW[16] ;; HEX0[0] ; SW[16] ; 7.204 ; 7.400 ; Rise ; SW[16] ;; HEX0[1] ; SW[16] ; 8.097 ; 8.347 ; Rise ; SW[16] ;; HEX0[2] ; SW[16] ; 7.324 ; 7.486 ; Rise ; SW[16] ;; HEX0[3] ; SW[16] ; 6.903 ; 7.058 ; Rise ; SW[16] ;; HEX0[4] ; SW[16] ; 6.837 ; 6.957 ; Rise ; SW[16] ;; HEX0[5] ; SW[16] ; 8.445 ; 8.393 ; Rise ; SW[16] ;; HEX0[6] ; SW[16] ; 7.132 ; 6.974 ; Rise ; SW[16] ;; HEX1[*] ; SW[16] ; 6.775 ; 6.879 ; Rise ; SW[16] ;; HEX1[0] ; SW[16] ; 6.775 ; 6.879 ; Rise ; SW[16] ;; HEX1[1] ; SW[16] ; 7.326 ; 7.413 ; Rise ; SW[16] ;; HEX1[2] ; SW[16] ; 6.952 ; 7.120 ; Rise ; SW[16] ;; HEX1[3] ; SW[16] ; 7.114 ; 7.225 ; Rise ; SW[16] ;; HEX1[4] ; SW[16] ; 6.923 ; 7.034 ; Rise ; SW[16] ;; HEX1[5] ; SW[16] ; 8.569 ; 8.487 ; Rise ; SW[16] ;; HEX1[6] ; SW[16] ; 7.860 ; 7.989 ; Rise ; SW[16] ;; HEX2[*] ; SW[16] ; 6.591 ; 6.645 ; Rise ; SW[16] ;; HEX2[0] ; SW[16] ; 7.037 ; 7.092 ; Rise ; SW[16] ;; HEX2[1] ; SW[16] ; 6.591 ; 6.645 ; Rise ; SW[16] ;; HEX2[2] ; SW[16] ; 7.298 ; 7.427 ; Rise ; SW[16] ;; HEX2[3] ; SW[16] ; 7.233 ; 7.320 ; Rise ; SW[16] ;; HEX2[4] ; SW[16] ; 7.239 ; 7.325 ; Rise ; SW[16] ;; HEX2[5] ; SW[16] ; 6.720 ; 6.783 ; Rise ; SW[16] ;; HEX2[6] ; SW[16] ; 6.758 ; 6.684 ; Rise ; SW[16] ;; HEX3[*] ; SW[16] ; 6.759 ; 6.654 ; Rise ; SW[16] ;; HEX3[0] ; SW[16] ; 7.281 ; 7.370 ; Rise ; SW[16] ;; HEX3[1] ; SW[16] ; 7.102 ; 7.265 ; Rise ; SW[16] ;; HEX3[2] ; SW[16] ; 8.842 ; 8.743 ; Rise ; SW[16] ;; HEX3[3] ; SW[16] ; 6.918 ; 7.055 ; Rise ; SW[16] ;; HEX3[4] ; SW[16] ; 7.108 ; 7.244 ; Rise ; SW[16] ;; HEX3[5] ; SW[16] ; 6.795 ; 6.917 ; Rise ; SW[16] ;; HEX3[6] ; SW[16] ; 6.759 ; 6.654 ; Rise ; SW[16] ;; HEX4[*] ; SW[16] ; 6.203 ; 6.183 ; Rise ; SW[16] ;; HEX4[0] ; SW[16] ; 7.011 ; 7.102 ; Rise ; SW[16] ;; HEX4[1] ; SW[16] ; 6.998 ; 7.075 ; Rise ; SW[16] ;; HEX4[2] ; SW[16] ; 6.411 ; 6.438 ; Rise ; SW[16] ;; HEX4[3] ; SW[16] ; 6.323 ; 6.336 ; Rise ; SW[16] ;; HEX4[4] ; SW[16] ; 6.470 ; 6.527 ; Rise ; SW[16] ;; HEX4[5] ; SW[16] ; 6.379 ; 6.401 ; Rise ; SW[16] ;; HEX4[6] ; SW[16] ; 6.203 ; 6.183 ; Rise ; SW[16] ;; HEX5[*] ; SW[16] ; 6.620 ; 6.648 ; Rise ; SW[16] ;; HEX5[0] ; SW[16] ; 7.028 ; 7.148 ; Rise ; SW[16] ;; HEX5[1] ; SW[16] ; 8.088 ; 7.938 ; Rise ; SW[16] ;; HEX5[2] ; SW[16] ; 6.639 ; 6.760 ; Rise ; SW[16] ;; HEX5[3] ; SW[16] ; 6.730 ; 6.798 ; Rise ; SW[16] ;; HEX5[4] ; SW[16] ; 6.620 ; 6.706 ; Rise ; SW[16] ;; HEX5[5] ; SW[16] ; 6.971 ; 7.068 ; Rise ; SW[16] ;; HEX5[6] ; SW[16] ; 6.729 ; 6.648 ; Rise ; SW[16] ;; HEX6[*] ; SW[16] ; 5.863 ; 5.832 ; Rise ; SW[16] ;; HEX6[0] ; SW[16] ; 6.383 ; 6.403 ; Rise ; SW[16] ;; HEX6[1] ; SW[16] ; 5.879 ; 5.841 ; Rise ; SW[16] ;; HEX6[2] ; SW[16] ; 5.865 ; 5.867 ; Rise ; SW[16] ;; HEX6[3] ; SW[16] ; 6.508 ; 6.528 ; Rise ; SW[16] ;; HEX6[4] ; SW[16] ; 5.863 ; 5.832 ; Rise ; SW[16] ;; HEX6[5] ; SW[16] ; 7.375 ; 7.102 ; Rise ; SW[16] ;; HEX6[6] ; SW[16] ; 6.012 ; 6.035 ; Rise ; SW[16] ;; HEX7[*] ; SW[16] ; 5.966 ; 5.968 ; Rise ; SW[16] ;; HEX7[0] ; SW[16] ; 6.095 ; 6.072 ; Rise ; SW[16] ;; HEX7[1] ; SW[16] ; 5.966 ; 5.971 ; Rise ; SW[16] ;; HEX7[2] ; SW[16] ; 6.076 ; 6.060 ; Rise ; SW[16] ;; HEX7[3] ; SW[16] ; 6.046 ; 6.029 ; Rise ; SW[16] ;; HEX7[4] ; SW[16] ; 6.000 ; 5.977 ; Rise ; SW[16] ;; HEX7[5] ; SW[16] ; 5.994 ; 5.968 ; Rise ; SW[16] ;; HEX7[6] ; SW[16] ; 6.239 ; 6.227 ; Rise ; SW[16] ;; LEDG[*] ; SW[16] ; 6.664 ; 6.838 ; Rise ; SW[16] ;; LEDG[0] ; SW[16] ; 6.666 ; 6.860 ; Rise ; SW[16] ;; LEDG[1] ; SW[16] ; 8.635 ; 9.066 ; Rise ; SW[16] ;; LEDG[2] ; SW[16] ; 7.552 ; 7.857 ; Rise ; SW[16] ;; LEDG[3] ; SW[16] ; 6.908 ; 7.117 ; Rise ; SW[16] ;; LEDG[4] ; SW[16] ; 7.258 ; 7.488 ; Rise ; SW[16] ;; LEDG[5] ; SW[16] ; 6.664 ; 6.838 ; Rise ; SW[16] ;; LEDG[6] ; SW[16] ; 7.206 ; 7.429 ; Rise ; SW[16] ;; LEDG[7] ; SW[16] ; 7.398 ; 7.641 ; Rise ; SW[16] ;; LEDR[*] ; SW[16] ; 6.549 ; 6.720 ; Rise ; SW[16] ;; LEDR[0] ; SW[16] ; 6.549 ; 6.720 ; Rise ; SW[16] ;; LEDR[1] ; SW[16] ; 8.116 ; 8.443 ; Rise ; SW[16] ;; LEDR[2] ; SW[16] ; 8.804 ; 9.310 ; Rise ; SW[16] ;; LEDR[3] ; SW[16] ; 7.144 ; 7.423 ; Rise ; SW[16] ;; LEDR[4] ; SW[16] ; 6.793 ; 7.001 ; Rise ; SW[16] ;; LEDR[5] ; SW[16] ; 7.861 ; 8.155 ; Rise ; SW[16] ;; LEDR[6] ; SW[16] ; 7.020 ; 7.272 ; Rise ; SW[16] ;; LEDR[7] ; SW[16] ; 7.345 ; 7.578 ; Rise ; SW[16] ;; LEDR[8] ; SW[16] ; 7.319 ; 7.560 ; Rise ; SW[16] ;; LEDR[9] ; SW[16] ; 7.503 ; 7.746 ; Rise ; SW[16] ;; LEDR[10] ; SW[16] ; 7.239 ; 7.483 ; Rise ; SW[16] ;; LEDR[11] ; SW[16] ; 7.079 ; 7.302 ; Rise ; SW[16] ;; LEDR[12] ; SW[16] ; 7.210 ; 7.448 ; Rise ; SW[16] ;; LEDR[13] ; SW[16] ; 7.271 ; 7.516 ; Rise ; SW[16] ;; LEDR[14] ; SW[16] ; 7.398 ; 7.664 ; Rise ; SW[16] ;; LEDR[15] ; SW[16] ; 8.010 ; 8.296 ; Rise ; SW[16] ;; SRAM_ADDR[*] ; SW[16] ; 5.219 ; 5.354 ; Rise ; SW[16] ;; SRAM_ADDR[0] ; SW[16] ; 5.398 ; 5.564 ; Rise ; SW[16] ;; SRAM_ADDR[1] ; SW[16] ; 5.430 ; 5.606 ; Rise ; SW[16] ;; SRAM_ADDR[2] ; SW[16] ; 6.144 ; 6.412 ; Rise ; SW[16] ;; SRAM_ADDR[3] ; SW[16] ; 5.818 ; 6.027 ; Rise ; SW[16] ;; SRAM_ADDR[4] ; SW[16] ; 6.102 ; 6.329 ; Rise ; SW[16] ;; SRAM_ADDR[5] ; SW[16] ; 5.885 ; 6.101 ; Rise ; SW[16] ;; SRAM_ADDR[6] ; SW[16] ; 5.521 ; 5.700 ; Rise ; SW[16] ;; SRAM_ADDR[7] ; SW[16] ; 5.673 ; 5.889 ; Rise ; SW[16] ;; SRAM_ADDR[8] ; SW[16] ; 5.887 ; 6.117 ; Rise ; SW[16] ;; SRAM_ADDR[9] ; SW[16] ; 6.657 ; 6.571 ; Rise ; SW[16] ;; SRAM_ADDR[10] ; SW[16] ; 5.890 ; 6.077 ; Rise ; SW[16] ;; SRAM_ADDR[11] ; SW[16] ; 5.219 ; 5.354 ; Rise ; SW[16] ;; SRAM_ADDR[12] ; SW[16] ; 7.056 ; 7.048 ; Rise ; SW[16] ;; SRAM_ADDR[13] ; SW[16] ; 5.518 ; 5.678 ; Rise ; SW[16] ;; SRAM_ADDR[14] ; SW[16] ; 6.385 ; 6.138 ; Rise ; SW[16] ;; SRAM_ADDR[15] ; SW[16] ; 8.157 ; 8.169 ; Rise ; SW[16] ;; SRAM_DQ[*] ; SW[16] ; 6.752 ; 6.910 ; Rise ; SW[16] ;; SRAM_DQ[0] ; SW[16] ; 6.875 ; 7.043 ; Rise ; SW[16] ;; SRAM_DQ[1] ; SW[16] ; 7.137 ; 7.374 ; Rise ; SW[16] ;; SRAM_DQ[2] ; SW[16] ; 8.000 ; 8.345 ; Rise ; SW[16] ;; SRAM_DQ[3] ; SW[16] ; 7.402 ; 7.655 ; Rise ; SW[16] ;; SRAM_DQ[4] ; SW[16] ; 7.660 ; 7.945 ; Rise ; SW[16] ;; SRAM_DQ[5] ; SW[16] ; 7.182 ; 7.411 ; Rise ; SW[16] ;; SRAM_DQ[6] ; SW[16] ; 7.731 ; 7.996 ; Rise ; SW[16] ;; SRAM_DQ[7] ; SW[16] ; 6.752 ; 6.910 ; Rise ; SW[16] ;; SRAM_OE_N ; SW[16] ; 6.074 ; 6.146 ; Rise ; SW[16] ;; SRAM_WE_N ; SW[16] ; 5.993 ; 5.756 ; Rise ; SW[16] ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; ; 4.039 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; ; 4.132 ; Rise ; T80se:z80_inst|MREQ_n ;; SRAM_OE_N ; T80se:z80_inst|MREQ_n ; 4.017 ; ; Fall ; T80se:z80_inst|MREQ_n ;; SRAM_WE_N ; T80se:z80_inst|MREQ_n ; 4.469 ; ; Fall ; T80se:z80_inst|MREQ_n ;; VGA_B[*] ; clk_div:clkdiv_inst|clock_25MHz ; 5.073 ; 5.252 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[4] ; clk_div:clkdiv_inst|clock_25MHz ; 5.354 ; 5.552 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[5] ; clk_div:clkdiv_inst|clock_25MHz ; 5.073 ; 5.252 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[6] ; clk_div:clkdiv_inst|clock_25MHz ; 5.645 ; 5.908 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_B[7] ; clk_div:clkdiv_inst|clock_25MHz ; 5.227 ; 5.416 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; 2.160 ; ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_HS ; clk_div:clkdiv_inst|clock_25MHz ; 4.439 ; 4.570 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_VS ; clk_div:clkdiv_inst|clock_25MHz ; 4.191 ; 4.267 ; Rise ; clk_div:clkdiv_inst|clock_25MHz ;; VGA_CLK ; clk_div:clkdiv_inst|clock_25MHz ; ; 2.180 ; Fall ; clk_div:clkdiv_inst|clock_25MHz ;+----------------+---------------------------------+-------+-------+------------+---------------------------------++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Board Trace Model Assignments ;+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+; Pin ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+; HEX0[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX0[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX0[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX0[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX0[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX0[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX0[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX1[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX1[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX1[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX1[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX1[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX1[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX1[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX2[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX2[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX2[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX2[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX2[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX2[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX2[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX3[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX3[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX3[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX3[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX3[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX3[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX3[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX4[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX4[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX4[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX4[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX4[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX4[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX4[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX5[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX5[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX5[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX5[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX5[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX5[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX5[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX6[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX6[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX6[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX6[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX6[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX6[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX6[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX7[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX7[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX7[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX7[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX7[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX7[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; HEX7[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDG[8] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[8] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[9] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[10] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[11] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[12] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[13] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[14] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[15] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[16] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LEDR[17] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; UART_TXD ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_BA_0 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_BA_1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQM_0 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQM_1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQM_2 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQM_3 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_WE_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_CAS_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_RAS_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_CS_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_ADDR[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_CLK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_CKE ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[13] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[14] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[15] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[16] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[17] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[18] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[19] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[20] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[21] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_ADDR[22] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_WP_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_WE_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_RST_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_OE_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_CE_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[13] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[14] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[15] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[16] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[17] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[18] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_ADDR[19] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_UB_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_LB_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_WE_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_CE_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_OE_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SD_DAT3 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SD_CMD ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SD_CLK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_SYNC_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_CLK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_BLANK_N ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_HS ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_VS ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_R[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_R[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_R[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_R[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_R[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_R[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_R[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_R[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_G[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_G[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_G[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_G[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_G[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_G[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_G[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_G[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_B[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_B[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_B[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_B[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_B[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_B[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_B[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; VGA_B[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; AUD_DACDAT ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; AUD_XCK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_RS ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_EN ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_RW ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_ON ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_BLON ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SD_DAT1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SD_DAT2 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; PS2_DAT2 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; PS2_CLK2 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[13] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[14] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[15] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[16] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[17] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[18] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[19] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[20] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[21] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[22] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[23] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[24] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[25] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[26] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[27] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[28] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[29] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[30] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; DRAM_DQ[31] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_DQ[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_DQ[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_DQ[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_DQ[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_DQ[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_DQ[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_DQ[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; FL_DQ[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[13] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[14] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; SRAM_DQ[15] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; PS2_DAT ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; PS2_CLK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; AUD_ADCLRCK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; AUD_DACLRCK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; AUD_BCLK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_DATA[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_DATA[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_DATA[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_DATA[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_DATA[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_DATA[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_DATA[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; LCD_DATA[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; ~ALTERA_DCLK~ ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;; ~ALTERA_nCEO~ ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;+---------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------++----------------------------------------------------------------------------+; Input Transition Times ;+-------------------------+--------------+-----------------+-----------------+; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;+-------------------------+--------------+-----------------+-----------------+; UART_RXD ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; UART_RTS ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; UART_CTS ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_RY ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SD_DAT0 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; AUD_ADCDAT ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SD_DAT1 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SD_DAT2 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; PS2_DAT2 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; PS2_CLK2 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[8] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[9] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[10] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[11] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[12] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[13] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[14] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[15] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[16] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[17] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[18] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[19] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[20] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[21] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[22] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[23] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[24] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[25] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[26] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[27] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[28] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[29] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[30] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; DRAM_DQ[31] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_DQ[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_DQ[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_DQ[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_DQ[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_DQ[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_DQ[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_DQ[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; FL_DQ[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[8] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[9] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[10] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[11] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[12] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[13] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[14] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SRAM_DQ[15] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; PS2_DAT ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; PS2_CLK ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; AUD_ADCLRCK ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; AUD_DACLRCK ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; AUD_BCLK ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; LCD_DATA[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; LCD_DATA[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; LCD_DATA[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; LCD_DATA[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; LCD_DATA[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; LCD_DATA[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; LCD_DATA[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; LCD_DATA[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[17] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; CLOCK_50 ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[16] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[9] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; KEY[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[8] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; KEY[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[15] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[14] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[10] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; KEY[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[13] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[12] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; SW[11] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; KEY[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; ~ALTERA_ASDO_DATA1~ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; ~ALTERA_FLASH_nCE_nCSO~ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;; ~ALTERA_DATA0~ ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;+-------------------------+--------------+-----------------+-----------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Signal Integrity Metrics (Slow 1200mv 0c Model) ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+; HEX0[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; HEX0[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.33 V ; -0.00467 V ; 0.226 V ; 0.087 V ; 2.91e-09 s ; 2.74e-09 s ; Yes ; Yes ; 2.32 V ; 4.49e-09 V ; 2.33 V ; -0.00467 V ; 0.226 V ; 0.087 V ; 2.91e-09 s ; 2.74e-09 s ; Yes ; Yes ;; HEX0[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; HEX0[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; HEX0[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; HEX0[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ;; HEX0[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; HEX1[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; HEX1[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX1[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX1[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX1[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX1[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ;; HEX1[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ;; HEX2[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX2[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX2[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX2[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX2[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX2[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX2[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX3[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; HEX3[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; HEX3[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ;; HEX3[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX3[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX3[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX3[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX4[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX4[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX4[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX4[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX4[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX4[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX4[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX5[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX5[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ;; HEX5[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX5[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX5[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX5[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX5[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX6[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX6[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX6[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX6[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX6[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX6[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ;; HEX6[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX7[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX7[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX7[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX7[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX7[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX7[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; HEX7[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; LEDG[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDG[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDG[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDG[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDG[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDG[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDG[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDG[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDG[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[9] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.33 V ; -0.00467 V ; 0.226 V ; 0.087 V ; 2.91e-09 s ; 2.74e-09 s ; Yes ; Yes ; 2.32 V ; 4.49e-09 V ; 2.33 V ; -0.00467 V ; 0.226 V ; 0.087 V ; 2.91e-09 s ; 2.74e-09 s ; Yes ; Yes ;; LEDR[10] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[11] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[12] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[13] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[14] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[15] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.33 V ; -0.00467 V ; 0.226 V ; 0.087 V ; 2.91e-09 s ; 2.74e-09 s ; Yes ; Yes ; 2.32 V ; 4.49e-09 V ; 2.33 V ; -0.00467 V ; 0.226 V ; 0.087 V ; 2.91e-09 s ; 2.74e-09 s ; Yes ; Yes ;; LEDR[16] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; LEDR[17] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ; 2.32 V ; 4.49e-09 V ; 2.38 V ; -0.00552 V ; 0.096 V ; 0.019 V ; 4.18e-10 s ; 3.59e-10 s ; No ; Yes ;; UART_TXD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ;; DRAM_BA_0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; DRAM_BA_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQM_0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQM_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQM_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQM_3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; DRAM_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_CAS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_RAS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_CS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; DRAM_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; DRAM_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; DRAM_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; DRAM_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; DRAM_CKE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; FL_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ;; FL_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ;; FL_ADDR[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[20] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[21] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_ADDR[22] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_WP_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_RST_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_OE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_CE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ;; SRAM_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ;; SRAM_ADDR[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_ADDR[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_ADDR[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ; 3.08 V ; 1.58e-08 V ; 3.09 V ; -0.012 V ; 0.232 V ; 0.268 V ; 4.75e-09 s ; 3.5e-09 s ; Yes ; No ;; SRAM_ADDR[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_ADDR[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ;; SRAM_UB_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_LB_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_CE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_OE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SD_DAT3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SD_CMD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SD_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_SYNC_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_BLANK_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_HS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_VS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_R[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_R[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_R[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_R[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_R[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_R[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_R[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_R[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_G[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_G[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_G[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_G[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_G[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_G[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_G[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_G[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_B[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_B[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_B[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_B[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_B[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_B[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_B[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; VGA_B[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; AUD_DACDAT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; AUD_XCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_RS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_EN ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_RW ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_ON ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ;; LCD_BLON ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SD_DAT1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SD_DAT2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; PS2_DAT2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; PS2_CLK2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; DRAM_DQ[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[20] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[21] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[22] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[23] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[24] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[25] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[26] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[27] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[28] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[29] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[30] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; DRAM_DQ[31] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; FL_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; FL_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_DQ[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_DQ[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_DQ[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_DQ[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; SRAM_DQ[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; SRAM_DQ[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 1.58e-08 V ; 3.13 V ; -0.117 V ; 0.143 V ; 0.259 V ; 6.22e-10 s ; 4.46e-10 s ; No ; No ;; PS2_DAT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.14 V ; -0.118 V ; 0.311 V ; 0.245 V ; 5.04e-10 s ; 4.36e-10 s ; No ; No ;; PS2_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; AUD_ADCLRCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; AUD_DACLRCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; AUD_BCLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_DATA[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_DATA[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_DATA[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_DATA[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_DATA[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_DATA[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_DATA[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;; LCD_DATA[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.09 V ; -0.0117 V ; 0.268 V ; 0.262 V ; 4.74e-09 s ; 3.5e-09 s ; No ; No ;; ~ALTERA_DCLK~ ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.73e-09 V ; 3.19 V ; -0.173 V ; 0.149 V ; 0.259 V ; 2.79e-10 s ; 2.42e-10 s ; Yes ; Yes ; 3.08 V ; 5.73e-09 V ; 3.19 V ; -0.173 V ; 0.149 V ; 0.259 V ; 2.79e-10 s ; 2.42e-10 s ; Yes ; Yes ;; ~ALTERA_nCEO~ ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ; 3.08 V ; 1.11e-08 V ; 3.13 V ; -0.0798 V ; 0.192 V ; 0.22 V ; 8.68e-10 s ; 6.46e-10 s ; No ; No ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Signal Integrity Metrics (Slow 1200mv 85c Model) ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+; HEX0[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; HEX0[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.33 V ; -0.00265 V ; 0.133 V ; 0.056 V ; 3.55e-09 s ; 3.31e-09 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.33 V ; -0.00265 V ; 0.133 V ; 0.056 V ; 3.55e-09 s ; 3.31e-09 s ; Yes ; Yes ;; HEX0[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; HEX0[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; HEX0[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; HEX0[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ;; HEX0[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; HEX1[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; HEX1[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX1[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX1[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX1[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX1[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ;; HEX1[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ;; HEX2[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX2[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX2[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX2[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX2[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX2[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX2[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX3[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; HEX3[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; HEX3[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ;; HEX3[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX3[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX3[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX3[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX4[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX4[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX4[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX4[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX4[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX4[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX4[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX5[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX5[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ;; HEX5[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX5[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX5[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX5[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX5[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX6[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX6[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX6[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX6[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX6[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX6[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ;; HEX6[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX7[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX7[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX7[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX7[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX7[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX7[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; HEX7[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; LEDG[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDG[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDG[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDG[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDG[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDG[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDG[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDG[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDG[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[9] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.33 V ; -0.00265 V ; 0.133 V ; 0.056 V ; 3.55e-09 s ; 3.31e-09 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.33 V ; -0.00265 V ; 0.133 V ; 0.056 V ; 3.55e-09 s ; 3.31e-09 s ; Yes ; Yes ;; LEDR[10] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[11] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[12] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[13] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[14] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[15] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.33 V ; -0.00265 V ; 0.133 V ; 0.056 V ; 3.55e-09 s ; 3.31e-09 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.33 V ; -0.00265 V ; 0.133 V ; 0.056 V ; 3.55e-09 s ; 3.31e-09 s ; Yes ; Yes ;; LEDR[16] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; LEDR[17] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ; 2.32 V ; 6.92e-07 V ; 2.35 V ; -0.00996 V ; 0.121 V ; 0.03 V ; 4.64e-10 s ; 4.47e-10 s ; Yes ; Yes ;; UART_TXD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ;; DRAM_BA_0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; DRAM_BA_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQM_0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQM_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQM_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQM_3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; DRAM_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_CAS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_RAS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_CS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; DRAM_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; DRAM_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; DRAM_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; DRAM_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; DRAM_CKE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; FL_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ;; FL_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ;; FL_ADDR[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[20] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[21] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_ADDR[22] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_WP_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_RST_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_OE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_CE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ;; SRAM_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ;; SRAM_ADDR[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_ADDR[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_ADDR[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ; 3.08 V ; 1.9e-06 V ; 3.08 V ; -0.00581 V ; 0.138 V ; 0.22 V ; 5.55e-09 s ; 4.38e-09 s ; Yes ; Yes ;; SRAM_ADDR[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_ADDR[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ;; SRAM_UB_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_LB_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_CE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_OE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SD_DAT3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SD_CMD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SD_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_SYNC_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_BLANK_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_HS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_VS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_R[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_R[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_R[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_R[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_R[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_R[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_R[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_R[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_G[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_G[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_G[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_G[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_G[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_G[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_G[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_G[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_B[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_B[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_B[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_B[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_B[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_B[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_B[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; VGA_B[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; AUD_DACDAT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; AUD_XCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_RS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_EN ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_RW ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_ON ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ;; LCD_BLON ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SD_DAT1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SD_DAT2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; PS2_DAT2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; PS2_CLK2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; DRAM_DQ[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[20] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[21] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[22] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[23] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[24] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[25] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[26] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[27] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[28] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[29] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[30] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; DRAM_DQ[31] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; FL_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; FL_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_DQ[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_DQ[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_DQ[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_DQ[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; SRAM_DQ[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; SRAM_DQ[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ; 3.08 V ; 1.9e-06 V ; 3.11 V ; -0.0625 V ; 0.224 V ; 0.17 V ; 6.86e-10 s ; 6.31e-10 s ; Yes ; No ;; PS2_DAT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.12 V ; -0.0722 V ; 0.214 V ; 0.171 V ; 6.67e-10 s ; 6.2e-10 s ; Yes ; No ;; PS2_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; AUD_ADCLRCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; AUD_DACLRCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; AUD_BCLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_DATA[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_DATA[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_DATA[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_DATA[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_DATA[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_DATA[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_DATA[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;; LCD_DATA[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ; 3.08 V ; 1.28e-06 V ; 3.08 V ; -0.00641 V ; 0.261 V ; 0.26 V ; 5.52e-09 s ; 4.36e-09 s ; Yes ; Yes ;; ~ALTERA_DCLK~ ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.54e-07 V ; 3.14 V ; -0.115 V ; 0.146 V ; 0.141 V ; 3.07e-10 s ; 3.96e-10 s ; Yes ; No ; 3.08 V ; 6.54e-07 V ; 3.14 V ; -0.115 V ; 0.146 V ; 0.141 V ; 3.07e-10 s ; 3.96e-10 s ; Yes ; No ;; ~ALTERA_nCEO~ ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ; 3.08 V ; 1.28e-06 V ; 3.11 V ; -0.0528 V ; 0.302 V ; 0.199 V ; 9.51e-10 s ; 8.47e-10 s ; Yes ; No ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Signal Integrity Metrics (Fast 1200mv 0c Model) ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+; HEX0[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; HEX0[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ;; HEX0[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; HEX0[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; HEX0[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; HEX0[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;; HEX0[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; HEX1[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; HEX1[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX1[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX1[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX1[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX1[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;; HEX1[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;; HEX2[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX2[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX2[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX2[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX2[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX2[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX2[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX3[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; HEX3[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; HEX3[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;; HEX3[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX3[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX3[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX3[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX4[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX4[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX4[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX4[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX4[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX4[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX4[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX5[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX5[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;; HEX5[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX5[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX5[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX5[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX5[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX6[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX6[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX6[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX6[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX6[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX6[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;; HEX6[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX7[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX7[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX7[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX7[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX7[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX7[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; HEX7[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; LEDG[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDG[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDG[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDG[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDG[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDG[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDG[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDG[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDG[8] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[0] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[1] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[2] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[3] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[4] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[5] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[6] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[7] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[8] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[9] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ;; LEDR[10] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[11] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[12] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[13] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[14] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[15] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ; 2.62 V ; 4.05e-08 V ; 2.64 V ; -0.0113 V ; 0.208 V ; 0.179 V ; 2.38e-09 s ; 2.23e-09 s ; No ; Yes ;; LEDR[16] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; LEDR[17] ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ; 2.62 V ; 4.05e-08 V ; 2.72 V ; -0.0349 V ; 0.173 V ; 0.1 V ; 2.72e-10 s ; 2.69e-10 s ; Yes ; Yes ;; UART_TXD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;; DRAM_BA_0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; DRAM_BA_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQM_0 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQM_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQM_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQM_3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; DRAM_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_CAS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_RAS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_CS_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; DRAM_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; DRAM_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; DRAM_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; DRAM_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; DRAM_CKE ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; FL_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;; FL_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;; FL_ADDR[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[20] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[21] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_ADDR[22] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_WP_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_RST_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_OE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_CE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_ADDR[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_ADDR[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_ADDR[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;; SRAM_ADDR[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_ADDR[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_ADDR[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;; SRAM_ADDR[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_ADDR[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_ADDR[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;; SRAM_ADDR[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_ADDR[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;; SRAM_UB_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_LB_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_WE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_CE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_OE_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SD_DAT3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SD_CMD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SD_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_SYNC_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_BLANK_N ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_HS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_VS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_R[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_R[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_R[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_R[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_R[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_R[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_R[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_R[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_G[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_G[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_G[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_G[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_G[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_G[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_G[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_G[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_B[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_B[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_B[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_B[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_B[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_B[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_B[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; VGA_B[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; AUD_DACDAT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; AUD_XCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_RS ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_EN ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_RW ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_ON ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;; LCD_BLON ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SD_DAT1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SD_DAT2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; PS2_DAT2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; PS2_CLK2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; DRAM_DQ[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[16] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[17] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[18] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[19] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[20] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[21] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[22] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[23] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[24] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[25] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[26] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[27] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[28] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[29] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[30] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; DRAM_DQ[31] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; FL_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; FL_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_DQ[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_DQ[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_DQ[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_DQ[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; SRAM_DQ[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[14] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; SRAM_DQ[15] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;; PS2_DAT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;; PS2_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; AUD_ADCLRCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; AUD_DACLRCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; AUD_BCLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_DATA[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_DATA[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_DATA[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_DATA[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_DATA[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_DATA[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_DATA[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;; LCD_DATA[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;; ~ALTERA_DCLK~ ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 6.54e-08 V ; 3.66 V ; -0.26 V ; 0.41 V ; 0.32 V ; 1.57e-10 s ; 2.15e-10 s ; No ; Yes ; 3.46 V ; 6.54e-08 V ; 3.66 V ; -0.26 V ; 0.41 V ; 0.32 V ; 1.57e-10 s ; 2.15e-10 s ; No ; Yes ;; ~ALTERA_nCEO~ ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;+---------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Setup Transfers ;+-------------------------------------------------------------+-------------------------------------------------------------+----------+----------+----------+----------+; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;+-------------------------------------------------------------+-------------------------------------------------------------+----------+----------+----------+----------+; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 12 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 11 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1 ; 1 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1 ; 1 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 11 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 2611 ; 0 ; 0 ; 0 ;; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 225 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 28 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 2 ; 0 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 16 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1 ; 1 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 11 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_1Khz_int ; CLOCK_50 ; 1 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; 2 ; 2 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 390 ; 0 ; 0 ; 0 ;; CLOCK_50 ; CLOCK_50 ; 939 ; 0 ; 0 ; 0 ;; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 155 ; 39 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 3318 ; 3 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; CLOCK_50 ; 9 ; 0 ; 0 ; 0 ;; SW[16] ; CLOCK_50 ; 1 ; 0 ; 0 ; 0 ;; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 250 ; 0 ; 0 ; 0 ;; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0 ; 258 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 141 ; 0 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1 ; 1 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_25MHz ; SW[16] ; 60 ; 0 ; 0 ; 0 ;; CLOCK_50 ; SW[16] ; 40 ; 0 ; 0 ; 0 ;; SW[16] ; SW[16] ; 5846783 ; 0 ; 0 ; 0 ;; T80se:z80_inst|MREQ_n ; SW[16] ; 749 ; 749 ; 0 ; 0 ;; SW[16] ; T80se:z80_inst|MREQ_n ; 0 ; 0 ; 256 ; 0 ;+-------------------------------------------------------------+-------------------------------------------------------------+----------+----------+----------+----------+Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+; Hold Transfers ;+-------------------------------------------------------------+-------------------------------------------------------------+----------+----------+----------+----------+; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;+-------------------------------------------------------------+-------------------------------------------------------------+----------+----------+----------+----------+; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_1Khz_int ; 12 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_1Mhz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 11 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_1Mhz_int ; 1 ; 1 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_1Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 1 ; 1 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_10Khz_int ; 11 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_25MHz ; clk_div:clkdiv_inst|clock_25MHz ; 2611 ; 0 ; 0 ; 0 ;; SW[16] ; clk_div:clkdiv_inst|clock_25MHz ; 225 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; clk_div:clkdiv_inst|clock_25Mhz_int ; 28 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_100Hz ; clk_div:clkdiv_inst|clock_100Hz ; 2 ; 0 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; clk_div:clkdiv_inst|clock_100Hz ; 16 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_10Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 1 ; 1 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_100Khz_int ; clk_div:clkdiv_inst|clock_100Khz_int ; 11 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_1Khz_int ; CLOCK_50 ; 1 ; 0 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_25Mhz_int ; CLOCK_50 ; 2 ; 2 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_100Hz ; CLOCK_50 ; 390 ; 0 ; 0 ; 0 ;; CLOCK_50 ; CLOCK_50 ; 939 ; 0 ; 0 ; 0 ;; LCD:lcd_inst|clk_400hz_enable ; CLOCK_50 ; 155 ; 39 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; CLOCK_50 ; 3318 ; 3 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; CLOCK_50 ; 9 ; 0 ; 0 ; 0 ;; SW[16] ; CLOCK_50 ; 1 ; 0 ; 0 ; 0 ;; CLOCK_50 ; LCD:lcd_inst|clk_400hz_enable ; 250 ; 0 ; 0 ; 0 ;; T80se:z80_inst|MREQ_n ; LCD:lcd_inst|clk_400hz_enable ; 0 ; 258 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 141 ; 0 ; 0 ; 0 ;; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ; 1 ; 1 ; 0 ; 0 ;; clk_div:clkdiv_inst|clock_25MHz ; SW[16] ; 60 ; 0 ; 0 ; 0 ;; CLOCK_50 ; SW[16] ; 40 ; 0 ; 0 ; 0 ;; SW[16] ; SW[16] ; 5846783 ; 0 ; 0 ; 0 ;; T80se:z80_inst|MREQ_n ; SW[16] ; 749 ; 749 ; 0 ; 0 ;; SW[16] ; T80se:z80_inst|MREQ_n ; 0 ; 0 ; 256 ; 0 ;+-------------------------------------------------------------+-------------------------------------------------------------+----------+----------+----------+----------+Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.+----------------------------------------------------------------------------------------------------------+; Recovery Transfers ;+------------+-------------------------------------------------+----------+----------+----------+----------+; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;+------------+-------------------------------------------------+----------+----------+----------+----------+; CLOCK_50 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 1 ; 0 ; 0 ; 0 ;+------------+-------------------------------------------------+----------+----------+----------+----------+Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.+----------------------------------------------------------------------------------------------------------+; Removal Transfers ;+------------+-------------------------------------------------+----------+----------+----------+----------+; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;+------------+-------------------------------------------------+----------+----------+----------+----------+; CLOCK_50 ; ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ; 1 ; 0 ; 0 ; 0 ;+------------+-------------------------------------------------+----------+----------+----------+----------+Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.---------------; Report TCCS ;---------------No dedicated SERDES Transmitter circuitry present in device or used in design---------------; Report RSKM ;---------------No dedicated SERDES Receiver circuitry present in device or used in design+------------------------------------------------+; Unconstrained Paths ;+---------------------------------+-------+------+; Property ; Setup ; Hold ;+---------------------------------+-------+------+; Illegal Clocks ; 0 ; 0 ;; Unconstrained Clocks ; 0 ; 0 ;; Unconstrained Input Ports ; 31 ; 31 ;; Unconstrained Input Port Paths ; 318 ; 318 ;; Unconstrained Output Ports ; 124 ; 124 ;; Unconstrained Output Port Paths ; 331 ; 331 ;+---------------------------------+-------+------++------------------------------------+; TimeQuest Timing Analyzer Messages ;+------------------------------------+Info: *******************************************************************Info: Running Quartus II 64-Bit TimeQuest Timing AnalyzerInfo: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web EditionInfo: Processing started: Sun Jun 19 13:45:34 2016Info: Command: quartus_sta z80soc -c 073DE2115eInfo: qsta_default_script.tcl version: #1Warning (20028): Parallel compilation is not licensed and has been disabledInfo (21077): Low junction temperature is 0 degrees CInfo (21077): High junction temperature is 85 degrees CWarning (335093): TimeQuest Timing Analyzer is analyzing 256 combinational loops as latches.Critical Warning (332012): Synopsys Design Constraints File file not found: '073DE2115e.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0"Info (332105): Deriving ClocksInfo (332105): create_clock -period 1.000 -name SW[16] SW[16]Info (332105): create_clock -period 1.000 -name clk_div:clkdiv_inst|clock_25MHz clk_div:clkdiv_inst|clock_25MHzInfo (332105): create_clock -period 1.000 -name CLOCK_50 CLOCK_50Info (332105): create_clock -period 1.000 -name clk_div:clkdiv_inst|clock_100Hz clk_div:clkdiv_inst|clock_100HzInfo (332105): create_clock -period 1.000 -name ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filtered ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332105): create_clock -period 1.000 -name clk_div:clkdiv_inst|clock_1Khz_int clk_div:clkdiv_inst|clock_1Khz_intInfo (332105): create_clock -period 1.000 -name clk_div:clkdiv_inst|clock_10Khz_int clk_div:clkdiv_inst|clock_10Khz_intInfo (332105): create_clock -period 1.000 -name clk_div:clkdiv_inst|clock_100Khz_int clk_div:clkdiv_inst|clock_100Khz_intInfo (332105): create_clock -period 1.000 -name clk_div:clkdiv_inst|clock_1Mhz_int clk_div:clkdiv_inst|clock_1Mhz_intInfo (332105): create_clock -period 1.000 -name clk_div:clkdiv_inst|clock_25Mhz_int clk_div:clkdiv_inst|clock_25Mhz_intInfo (332105): create_clock -period 1.000 -name ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_set ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332105): create_clock -period 1.000 -name LCD:lcd_inst|clk_400hz_enable LCD:lcd_inst|clk_400hz_enableInfo (332105): create_clock -period 1.000 -name T80se:z80_inst|MREQ_n T80se:z80_inst|MREQ_nInfo (332097): The following timing edges are non-unate. TimeQuest will assume pos-unate behavior for these edges in the clock network.Info (332098): Cell: Clk_Z80 from: dataa to: comboutInfo (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty"Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ONInfo: Analyzing Slow 1200mV 85C ModelCritical Warning (332148): Timing requirements not metInfo (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.Info (332146): Worst-case setup slack is -12.540Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -12.540 -3745.302 SW[16]Info (332119): -11.704 -88.730 LCD:lcd_inst|clk_400hz_enableInfo (332119): -7.823 -185.058 CLOCK_50Info (332119): -5.695 -252.613 clk_div:clkdiv_inst|clock_25MHzInfo (332119): -5.245 -10.490 clk_div:clkdiv_inst|clock_100HzInfo (332119): -2.601 -435.678 T80se:z80_inst|MREQ_nInfo (332119): -2.262 -38.292 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): -0.895 -4.526 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): -0.651 -1.066 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): -0.530 -0.826 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): -0.521 -0.804 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): -0.190 -0.495 clk_div:clkdiv_inst|clock_1Khz_intInfo (332146): Worst-case hold slack is -2.980Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -2.980 -135.492 SW[16]Info (332119): -0.439 -0.439 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): -0.254 -0.669 CLOCK_50Info (332119): 0.033 0.000 T80se:z80_inst|MREQ_nInfo (332119): 0.079 0.000 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): 0.098 0.000 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): 0.189 0.000 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): 0.343 0.000 clk_div:clkdiv_inst|clock_25MHzInfo (332119): 0.440 0.000 clk_div:clkdiv_inst|clock_1Khz_intInfo (332119): 0.454 0.000 clk_div:clkdiv_inst|clock_100HzInfo (332119): 0.472 0.000 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): 2.342 0.000 LCD:lcd_inst|clk_400hz_enableInfo (332146): Worst-case recovery slack is -2.630Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -2.630 -2.630 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332146): Worst-case removal slack is 3.090Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): 3.090 0.000 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332146): Worst-case minimum pulse width slack is -3.000Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -3.000 -612.867 SW[16]Info (332119): -3.000 -141.780 CLOCK_50Info (332119): -2.693 -178.641 clk_div:clkdiv_inst|clock_25MHzInfo (332119): -1.285 -29.555 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): -1.285 -10.280 LCD:lcd_inst|clk_400hz_enableInfo (332119): -1.285 -7.710 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): -1.285 -5.140 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): -1.285 -5.140 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): -1.285 -5.140 clk_div:clkdiv_inst|clock_1Khz_intInfo (332119): -1.285 -5.140 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): -1.285 -2.570 clk_div:clkdiv_inst|clock_100HzInfo (332119): -1.285 -1.285 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332119): 0.320 0.000 T80se:z80_inst|MREQ_nInfo: Analyzing Slow 1200mV 0C ModelInfo (334003): Started post-fitting delay annotationInfo (334004): Delay annotation completed successfullyInfo (332097): The following timing edges are non-unate. TimeQuest will assume pos-unate behavior for these edges in the clock network.Info (332098): Cell: Clk_Z80 from: dataa to: comboutInfo (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.Critical Warning (332148): Timing requirements not metInfo (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.Info (332146): Worst-case setup slack is -11.396Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -11.396 -3408.529 SW[16]Info (332119): -10.487 -79.038 LCD:lcd_inst|clk_400hz_enableInfo (332119): -7.105 -160.429 CLOCK_50Info (332119): -5.089 -225.410 clk_div:clkdiv_inst|clock_25MHzInfo (332119): -4.660 -9.320 clk_div:clkdiv_inst|clock_100HzInfo (332119): -2.600 -454.970 T80se:z80_inst|MREQ_nInfo (332119): -1.971 -33.232 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): -0.703 -3.550 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): -0.480 -0.638 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): -0.373 -0.434 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): -0.370 -0.416 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): -0.073 -0.140 clk_div:clkdiv_inst|clock_1Khz_intInfo (332146): Worst-case hold slack is -2.883Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -2.883 -132.381 SW[16]Info (332119): -0.303 -0.303 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): -0.171 -0.488 CLOCK_50Info (332119): 0.073 0.000 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): 0.100 0.000 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): 0.181 0.000 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): 0.336 0.000 T80se:z80_inst|MREQ_nInfo (332119): 0.348 0.000 clk_div:clkdiv_inst|clock_25MHzInfo (332119): 0.387 0.000 clk_div:clkdiv_inst|clock_1Khz_intInfo (332119): 0.409 0.000 clk_div:clkdiv_inst|clock_100HzInfo (332119): 0.426 0.000 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): 2.100 0.000 LCD:lcd_inst|clk_400hz_enableInfo (332146): Worst-case recovery slack is -2.255Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -2.255 -2.255 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332146): Worst-case removal slack is 2.789Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): 2.789 0.000 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332146): Worst-case minimum pulse width slack is -3.000Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -3.000 -609.320 SW[16]Info (332119): -3.000 -141.780 CLOCK_50Info (332119): -2.649 -176.793 clk_div:clkdiv_inst|clock_25MHzInfo (332119): -1.285 -29.555 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): -1.285 -10.280 LCD:lcd_inst|clk_400hz_enableInfo (332119): -1.285 -7.710 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): -1.285 -5.140 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): -1.285 -5.140 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): -1.285 -5.140 clk_div:clkdiv_inst|clock_1Khz_intInfo (332119): -1.285 -5.140 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): -1.285 -2.570 clk_div:clkdiv_inst|clock_100HzInfo (332119): -1.285 -1.285 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332119): -0.004 -0.012 T80se:z80_inst|MREQ_nInfo: Analyzing Fast 1200mV 0C ModelInfo (332097): The following timing edges are non-unate. TimeQuest will assume pos-unate behavior for these edges in the clock network.Info (332098): Cell: Clk_Z80 from: dataa to: comboutInfo (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.Critical Warning (332148): Timing requirements not metInfo (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.Info (332146): Worst-case setup slack is -6.129Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -6.129 -46.157 LCD:lcd_inst|clk_400hz_enableInfo (332119): -5.861 -1703.860 SW[16]Info (332119): -3.425 -58.119 CLOCK_50Info (332119): -2.263 -4.526 clk_div:clkdiv_inst|clock_100HzInfo (332119): -2.065 -71.920 clk_div:clkdiv_inst|clock_25MHzInfo (332119): -0.791 -73.474 T80se:z80_inst|MREQ_nInfo (332119): -0.602 -6.551 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): 0.090 0.000 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): 0.108 0.000 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): 0.158 0.000 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): 0.230 0.000 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): 0.428 0.000 clk_div:clkdiv_inst|clock_1Khz_intInfo (332146): Worst-case hold slack is -1.533Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -1.533 -67.021 SW[16]Info (332119): -0.426 -0.426 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): -0.335 -2.123 CLOCK_50Info (332119): -0.248 -1.794 T80se:z80_inst|MREQ_nInfo (332119): -0.008 -0.008 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): 0.010 0.000 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): 0.061 0.000 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): 0.140 0.000 clk_div:clkdiv_inst|clock_25MHzInfo (332119): 0.201 0.000 clk_div:clkdiv_inst|clock_1Khz_intInfo (332119): 0.210 0.000 clk_div:clkdiv_inst|clock_100HzInfo (332119): 0.214 0.000 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): 1.167 0.000 LCD:lcd_inst|clk_400hz_enableInfo (332146): Worst-case recovery slack is -0.904Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -0.904 -0.904 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332146): Worst-case removal slack is 1.565Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): 1.565 0.000 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332146): Worst-case minimum pulse width slack is -3.000Info (332119): Slack End Point TNS ClockInfo (332119): ========= ============= =====================Info (332119): -3.000 -864.856 SW[16]Info (332119): -3.000 -141.504 CLOCK_50Info (332119): -1.000 -93.000 clk_div:clkdiv_inst|clock_25MHzInfo (332119): -1.000 -23.000 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|keyboard_clk_filteredInfo (332119): -1.000 -8.000 LCD:lcd_inst|clk_400hz_enableInfo (332119): -1.000 -6.000 clk_div:clkdiv_inst|clock_25Mhz_intInfo (332119): -1.000 -4.000 clk_div:clkdiv_inst|clock_100Khz_intInfo (332119): -1.000 -4.000 clk_div:clkdiv_inst|clock_10Khz_intInfo (332119): -1.000 -4.000 clk_div:clkdiv_inst|clock_1Khz_intInfo (332119): -1.000 -4.000 clk_div:clkdiv_inst|clock_1Mhz_intInfo (332119): -1.000 -2.000 clk_div:clkdiv_inst|clock_100HzInfo (332119): -1.000 -1.000 ps2kbd:ps2_kbd_inst|keyboard:kbd_inst|ready_setInfo (332119): -0.120 -9.204 T80se:z80_inst|MREQ_nInfo (332102): Design is not fully constrained for setup requirementsInfo (332102): Design is not fully constrained for hold requirementsInfo: Quartus II 64-Bit TimeQuest Timing Analyzer was successful. 0 errors, 6 warningsInfo: Peak virtual memory: 571 megabytesInfo: Processing ended: Sun Jun 19 13:46:22 2016Info: Elapsed time: 00:00:48Info: Total CPU time (on all processors): 00:00:30