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https://opencores.org/ocsvn/zet86/zet86/trunk
Subversion Repositories zet86
[/] [zet86/] [trunk/] [soc/] [vga/] [sim/] [tb.do] - Rev 49
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#vdel -all -lib work
vmap unisims /opt/Xilinx/10.1/modelsim/verilog/unisims
vlib work
vlog -work work -lint ../rtl/vdu.v vdu_tb.v ../rtl/ram2k_b16_attr.v ../rtl/ram2k_b16.v ../rtl/char_rom_b16.v
vlog -work work /opt/Xilinx/10.1/ISE/verilog/src/glbl.v
vsim -L /opt/Xilinx/10.1/modelsim/verilog/unisims -novopt -t ns work.vdu_tb work.glbl
add wave -radix hexadecimal /vdu_tb/vdu0/*