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[/] [zet86/] [trunk/] [soc/] [vga/] [test/] [test_vdu.xst] - Rev 40
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run-ifn ../test_vdu.prj-ifmt mixed-ofn test_vdu-ofmt NGC-p xc4vfx12-10-ff668-top test_vdu-opt_mode Speed-opt_level 1-power NO-iuc NO-keep_hierarchy NO-netlist_hierarchy as_optimized-rtlview Yes-glob_opt AllClockNets-read_cores YES-write_timing_constraints NO-cross_clock_analysis NO-hierarchy_separator /-bus_delimiter <>-case maintain-slice_utilization_ratio 100-bram_utilization_ratio 100-dsp_utilization_ratio 100-verilog2001 YES-fsm_extract YES -fsm_encoding Auto-safe_implementation No-fsm_style lut-ram_extract Yes-ram_style Auto-rom_extract Yes-mux_style Auto-decoder_extract YES-priority_extract YES-shreg_extract YES-shift_extract YES-xor_collapse YES-rom_style Auto-auto_bram_packing NO-mux_extract YES-resource_sharing YES-async_to_sync NO-use_dsp48 auto-iobuf YES-max_fanout 500-bufg 32-bufr 16-register_duplication YES-register_balancing No-slice_packing YES-optimize_primitives NO-use_clock_enable Auto-use_sync_set Auto-use_sync_reset Auto-iob auto-equivalent_register_removal YES-slice_utilization_ratio_maxmargin 5
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