Subversion Repositories zx_ula

NET "clk50" LOC = "T9" | IOSTANDARD = LVCMOS33;
# Define clock period for 50 MHz oscillator (40%/60% duty-cycle)
# NET "clk50" PERIOD = 20.0ns HIGH 40%;

NET "reset" LOC = "L14" | IOSTANDARD = LVCMOS33;

# I/O
NET "r" LOC = "E7" | IOSTANDARD = LVCMOS33;
NET "g" LOC = "D6" | IOSTANDARD = LVCMOS33;
NET "b" LOC = "D5" | IOSTANDARD = LVCMOS33;
NET "i" LOC = "D7" | IOSTANDARD = LVCMOS33;

NET "csync" LOC = "D8" | IOSTANDARD = LVCMOS33;
NET "audio_out" LOC = "D10" | IOSTANDARD = LVCMOS33;
NET "ear" LOC = "T13" | IOSTANDARD = LVCMOS33;

NET "kbd_rows<0>" LOC = "E6" | IOSTANDARD = LVCMOS33;
NET "kbd_rows<1>" LOC = "C5" | IOSTANDARD = LVCMOS33;
NET "kbd_rows<2>" LOC = "C6" | IOSTANDARD = LVCMOS33;
NET "kbd_rows<3>" LOC = "C7" | IOSTANDARD = LVCMOS33;
NET "kbd_rows<4>" LOC = "C8" | IOSTANDARD = LVCMOS33;
NET "kbd_rows<5>" LOC = "C9" | IOSTANDARD = LVCMOS33;
NET "kbd_rows<6>" LOC = "A3" | IOSTANDARD = LVCMOS33;
NET "kbd_rows<7>" LOC = "A4" | IOSTANDARD = LVCMOS33;

NET "kbd_columns<0>" LOC = "B4" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "kbd_columns<1>" LOC = "B5" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "kbd_columns<2>" LOC = "B6" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "kbd_columns<3>" LOC = "A7" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "kbd_columns<4>" LOC = "A8" | IOSTANDARD = LVCMOS33 | PULLUP;

# Debug LED's
NET "leds<7>" LOC = "P11" | IOSTANDARD = LVCMOS33;
NET "leds<6>" LOC = "P12" | IOSTANDARD = LVCMOS33;
NET "leds<5>" LOC = "N12" | IOSTANDARD = LVCMOS33;
NET "leds<4>" LOC = "P13" | IOSTANDARD = LVCMOS33;
NET "leds<3>" LOC = "N14" | IOSTANDARD = LVCMOS33;
NET "leds<2>" LOC = "L12" | IOSTANDARD = LVCMOS33;
NET "leds<1>" LOC = "P14" | IOSTANDARD = LVCMOS33;
NET "leds<0>" LOC = "K12" | IOSTANDARD = LVCMOS33;

# External SRAM
NET "sa<17>" LOC = "L3" | IOSTANDARD = LVCMOS33;
NET "sa<16>" LOC = "K5" | IOSTANDARD = LVCMOS33;
NET "sa<15>" LOC = "K3" | IOSTANDARD = LVCMOS33;
NET "sa<14>" LOC = "J3" | IOSTANDARD = LVCMOS33;
NET "sa<13>" LOC = "J4" | IOSTANDARD = LVCMOS33;
NET "sa<12>" LOC = "H4" | IOSTANDARD = LVCMOS33;
NET "sa<11>" LOC = "H3" | IOSTANDARD = LVCMOS33;
NET "sa<10>" LOC = "G5" | IOSTANDARD = LVCMOS33;
NET "sa<9>" LOC = "E4" | IOSTANDARD = LVCMOS33;
NET "sa<8>" LOC = "E3" | IOSTANDARD = LVCMOS33;
NET "sa<7>" LOC = "F4" | IOSTANDARD = LVCMOS33;
NET "sa<6>" LOC = "F3" | IOSTANDARD = LVCMOS33;
NET "sa<5>" LOC = "G4" | IOSTANDARD = LVCMOS33;
NET "sa<4>" LOC = "L4" | IOSTANDARD = LVCMOS33;
NET "sa<3>" LOC = "M3" | IOSTANDARD = LVCMOS33;
NET "sa<2>" LOC = "M4" | IOSTANDARD = LVCMOS33;
NET "sa<1>" LOC = "N3" | IOSTANDARD = LVCMOS33;
NET "sa<0>" LOC = "L5" | IOSTANDARD = LVCMOS33;

#NET "sd1<15>" LOC = "R1" | IOSTANDARD = LVCMOS33;
#NET "sd1<14>" LOC = "P1" | IOSTANDARD = LVCMOS33;
#NET "sd1<13>" LOC = "L2" | IOSTANDARD = LVCMOS33;
#NET "sd1<12>" LOC = "J2" | IOSTANDARD = LVCMOS33;
#NET "sd1<11>" LOC = "H1" | IOSTANDARD = LVCMOS33;
#NET "sd1<10>" LOC = "F2" | IOSTANDARD = LVCMOS33;
#NET "sd1<9>" LOC = "P8" | IOSTANDARD = LVCMOS33;
#NET "sd1<8>" LOC = "D3" | IOSTANDARD = LVCMOS33;
NET "sd1<7>" LOC = "B1" | IOSTANDARD = LVCMOS33;
NET "sd1<6>" LOC = "C1" | IOSTANDARD = LVCMOS33;
NET "sd1<5>" LOC = "C2" | IOSTANDARD = LVCMOS33;
NET "sd1<4>" LOC = "R5" | IOSTANDARD = LVCMOS33;
NET "sd1<3>" LOC = "T5" | IOSTANDARD = LVCMOS33;
NET "sd1<2>" LOC = "R6" | IOSTANDARD = LVCMOS33;
NET "sd1<1>" LOC = "T8" | IOSTANDARD = LVCMOS33;
NET "sd1<0>" LOC = "N7" | IOSTANDARD = LVCMOS33;

NET "sramce1" LOC = "P7" | IOSTANDARD = LVCMOS33;
NET "sramub1" LOC = "T4" | IOSTANDARD = LVCMOS33;
NET "sramlb1" LOC = "P6" | IOSTANDARD = LVCMOS33;
NET "sramwe" LOC = "G3" | IOSTANDARD = LVCMOS33;
NET "sramoe" LOC = "K4" | IOSTANDARD = LVCMOS33;