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[/] [zx_ula/] [branches/] [xilinx/] [spectrum_48k_for_digilent_spartan3_starter_kit_with_ps2_keyboard/] [sp48k_for_spartan3_starter_kit.ucf] - Rev 27
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NET "clk50" LOC = "T9" | IOSTANDARD = LVCMOS33;
# Define clock period for 50 MHz oscillator (40%/60% duty-cycle)
# NET "clk50" PERIOD = 20.0ns HIGH 40%;
NET "reset" LOC = "L14" | IOSTANDARD = LVCMOS33;
# I/O
NET "r" LOC = "E7" | IOSTANDARD = LVCMOS33;
NET "g" LOC = "D6" | IOSTANDARD = LVCMOS33;
NET "b" LOC = "D5" | IOSTANDARD = LVCMOS33;
NET "i" LOC = "D7" | IOSTANDARD = LVCMOS33;
NET "csync" LOC = "D8" | IOSTANDARD = LVCMOS33;
NET "audio_out" LOC = "D10" | IOSTANDARD = LVCMOS33;
NET "ear" LOC = "T13" | IOSTANDARD = LVCMOS33;
# Debug LED's
NET "ledclk" LOC = "P11" | IOSTANDARD = LVCMOS33;
NET "ledaux<3>" LOC = "P12" | IOSTANDARD = LVCMOS33;
NET "ledaux<2>" LOC = "N12" | IOSTANDARD = LVCMOS33;
NET "ledaux<1>" LOC = "P13" | IOSTANDARD = LVCMOS33;
NET "ledaux<0>" LOC = "N14" | IOSTANDARD = LVCMOS33;
# Keyboard connections
NET "clkps2" LOC = "M16" | IOSTANDARD = LVTTL | PULLUP;
#NET "clkps2" CLOCK_DEDICATED_ROUTE = FALSE;
NET "dataps2" LOC = "M15" | IOSTANDARD = LVTTL | PULLUP;
# 7-segment display connections and LED's (optional, for PS2 keyboard module)
NET "dispanodes<0>" LOC = "D14" | IOSTANDARD = LVCMOS33;
NET "dispanodes<1>" LOC = "G14" | IOSTANDARD = LVCMOS33;
NET "dispanodes<2>" LOC = "F14" | IOSTANDARD = LVCMOS33;
NET "dispanodes<3>" LOC = "E13" | IOSTANDARD = LVCMOS33;
NET "dispcathodes<6>" LOC = "E14" | IOSTANDARD = LVCMOS33;
NET "dispcathodes<5>" LOC = "G13" | IOSTANDARD = LVCMOS33;
NET "dispcathodes<4>" LOC = "N16" | IOSTANDARD = LVCMOS33;
NET "dispcathodes<3>" LOC = "F13" | IOSTANDARD = LVCMOS33;
NET "dispcathodes<2>" LOC = "N15" | IOSTANDARD = LVCMOS33;
NET "dispcathodes<1>" LOC = "P15" | IOSTANDARD = LVCMOS33;
NET "dispcathodes<0>" LOC = "R16" | IOSTANDARD = LVCMOS33;
NET "ledextended" LOC = "P14" | IOSTANDARD = LVCMOS33;
NET "ledreleased" LOC = "K12" | IOSTANDARD = LVCMOS33;
NET "ledshift" LOC = "L12" | IOSTANDARD = LVCMOS33;
# External SRAM
NET "sa<17>" LOC = "L3" | IOSTANDARD = LVCMOS33;
NET "sa<16>" LOC = "K5" | IOSTANDARD = LVCMOS33;
NET "sa<15>" LOC = "K3" | IOSTANDARD = LVCMOS33;
NET "sa<14>" LOC = "J3" | IOSTANDARD = LVCMOS33;
NET "sa<13>" LOC = "J4" | IOSTANDARD = LVCMOS33;
NET "sa<12>" LOC = "H4" | IOSTANDARD = LVCMOS33;
NET "sa<11>" LOC = "H3" | IOSTANDARD = LVCMOS33;
NET "sa<10>" LOC = "G5" | IOSTANDARD = LVCMOS33;
NET "sa<9>" LOC = "E4" | IOSTANDARD = LVCMOS33;
NET "sa<8>" LOC = "E3" | IOSTANDARD = LVCMOS33;
NET "sa<7>" LOC = "F4" | IOSTANDARD = LVCMOS33;
NET "sa<6>" LOC = "F3" | IOSTANDARD = LVCMOS33;
NET "sa<5>" LOC = "G4" | IOSTANDARD = LVCMOS33;
NET "sa<4>" LOC = "L4" | IOSTANDARD = LVCMOS33;
NET "sa<3>" LOC = "M3" | IOSTANDARD = LVCMOS33;
NET "sa<2>" LOC = "M4" | IOSTANDARD = LVCMOS33;
NET "sa<1>" LOC = "N3" | IOSTANDARD = LVCMOS33;
NET "sa<0>" LOC = "L5" | IOSTANDARD = LVCMOS33;
NET "sd1<7>" LOC = "B1" | IOSTANDARD = LVCMOS33;
NET "sd1<6>" LOC = "C1" | IOSTANDARD = LVCMOS33;
NET "sd1<5>" LOC = "C2" | IOSTANDARD = LVCMOS33;
NET "sd1<4>" LOC = "R5" | IOSTANDARD = LVCMOS33;
NET "sd1<3>" LOC = "T5" | IOSTANDARD = LVCMOS33;
NET "sd1<2>" LOC = "R6" | IOSTANDARD = LVCMOS33;
NET "sd1<1>" LOC = "T8" | IOSTANDARD = LVCMOS33;
NET "sd1<0>" LOC = "N7" | IOSTANDARD = LVCMOS33;
NET "sramce1" LOC = "P7" | IOSTANDARD = LVCMOS33;
NET "sramub1" LOC = "T4" | IOSTANDARD = LVCMOS33;
NET "sramlb1" LOC = "P6" | IOSTANDARD = LVCMOS33;
NET "sramwe" LOC = "G3" | IOSTANDARD = LVCMOS33;
NET "sramoe" LOC = "K4" | IOSTANDARD = LVCMOS33;
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