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URL https://opencores.org/ocsvn/10_100m_ethernet-fifo_convertor/10_100m_ethernet-fifo_convertor/trunk

Subversion Repositories 10_100m_ethernet-fifo_convertor

[/] [10_100m_ethernet-fifo_convertor/] [verilog/] [Ethernet.fit.summary] - Rev 10

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Fitter Status : Successful - Sun Dec 13 21:49:10 2009
Quartus II Version : 9.0 Build 132 02/25/2009 SJ Full Version
Revision Name : Ethernet
Top-level Entity Name : test_feedback
Family : Cyclone III
Device : EP3C40Q240C8
Timing Models : Final
Total logic elements : 1,026 / 39,600 ( 3 % )
    Total combinational functions : 879 / 39,600 ( 2 % )
    Dedicated logic registers : 622 / 39,600 ( 2 % )
Total registers : 622
Total pins : 24 / 129 ( 19 % )
Total virtual pins : 0
Total memory bits : 11,992 / 1,161,216 ( 1 % )
Embedded Multiplier 9-bit elements : 0 / 252 ( 0 % )
Total PLLs : 1 / 4 ( 25 % )

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