URL
https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk
Subversion Repositories 6809_6309_compatible_core
[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [Changelog.txt] - Rev 15
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Changelong
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20.07.14
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- decoders.v : fix decoding of STD, LDD
16.07.14
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- decoders.v : decode of some opcodes modified to improve size & speed
- MC6809_cpu.v : Removed dec_o_optype and added single wire signals for common opcodes
06.07.14
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- decoders.v : fixed missing left/dest paths for sex
- alu16.v : fixed sex, mul, c flag for shifts, ror
- MC6809_cpu.v : fixed indirect indexed
05.07.14
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- decoders.v : fixed missing left/dest paths for daa
- alu16.v : fixed daa, h flag store and generation
04.07.14
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- decoders.v : fixed page 2&3 operands, jmp, cmp
- MC6809_cpu.v : fixed jmp
02.07.14
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- decoders.v : fixed dec, fixed inc (didn't read before write), fixed clr for ea direct, extended, indexed
added a path with the decoded sources/destination for the decode stage
- MC6809_cpu.v : implemented two paths for source/dest from the decoder
- rumsim.bat : added batch file for simulation
22.06.14
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- decoders.v : fixed wrong left/right/dest paths for several extended, page 2, 3 opcodes.
- MC6809_cpu.v : fixed jsr extended, indexed
06.02.14
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- regblock.v : dropped double write of PC
- MC6809_cpu.v : fixed loading of new PC from reset vector, rel8 displacement calculation.
06.01.14
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- decoders.v : added registered outputs for the source/destination address registers
05.01.14
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- MC6809_cpu.v : fixed exg (wrong source), implemented SYNC
- decoders.v : fixed destination for BIT
- defs.v : reduced the number of ALU opcodes
- alu16.v : reduced the number of ALU opcodes, fused BIT with AND, CMP with SUB
01.01.14
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- alu16.v : the alu has been bronken in two units
- MC6809_cpu.v : added CWAI states and decoding
- decodres.v : added CWAI decoding
31.12.13
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- Implemented TFR/EXG
- MC6809_cpu.v: Added one more state to execute TFR or EXG
- decoders.v: added source/dest for TFR and EXG
- regblock.v : added second write path to the registers for TFR&EXG
- defs.v defined new SEQ_TFREXG for tfr&exg execution
30.12.13
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- Fixed increment/decrement of the stack pointer
- MC6809_cpu.v: Push/pull increment/decrement the stack pointr in their own states
Added eamem source to the left alu data path to check for zero in the ea (leax/leay)
29.12.13
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- Fixed wrong byte in SEQ_MEM_WRITE_H
- Fixed unaffected Z flag for LEAX/LEAY
- Moved increment of pc from FETCH_2 to FETCH_1
- Fixed CMPA/CMPB/CMPX, they don't write a register back
- Fixed late write of pc
- decoders.v: Merged separated write_dest_x into one wire
Added a source_size wire to indicate the width of the source argument
Added the recognition of LEA as an alu mnemonic to modify the Z flag for LEAX/LEAY
- MC6809_cpu.v: Dropped checks for source size from the individual states and moved
into SEQ_MEM_READ_H
Merged write flags into k_dest_write
- alu.v: Added a LEA instruction for LEAX/LEAY where only the Z flag will be affected
- defs.v : added a LEA define to the ALU section
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