OpenCores
URL https://opencores.org/ocsvn/a-z80/a-z80/trunk

Subversion Repositories a-z80

[/] [a-z80/] [trunk/] [cpu/] [bus/] [bus_switch.bsf] - Rev 3

Compare with Previous | Blame | View Log

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
        (rect 16 16 288 160)
        (text "bus_switch" (rect 5 0 48 12)(font "Arial" ))
        (text "inst" (rect 8 128 20 140)(font "Arial" ))
        (port
                (pt 0 32)
                (input)
                (text "ctl_sw_1u" (rect 0 0 38 12)(font "Arial" ))
                (text "ctl_sw_1u" (rect 21 27 59 39)(font "Arial" ))
                (line (pt 0 32)(pt 16 32)(line_width 1))
        )
        (port
                (pt 0 48)
                (input)
                (text "ctl_sw_1d" (rect 0 0 38 12)(font "Arial" ))
                (text "ctl_sw_1d" (rect 21 43 59 55)(font "Arial" ))
                (line (pt 0 48)(pt 16 48)(line_width 1))
        )
        (port
                (pt 0 64)
                (input)
                (text "ctl_sw_2u" (rect 0 0 40 12)(font "Arial" ))
                (text "ctl_sw_2u" (rect 21 59 61 71)(font "Arial" ))
                (line (pt 0 64)(pt 16 64)(line_width 1))
        )
        (port
                (pt 0 80)
                (input)
                (text "ctl_sw_2d" (rect 0 0 40 12)(font "Arial" ))
                (text "ctl_sw_2d" (rect 21 75 61 87)(font "Arial" ))
                (line (pt 0 80)(pt 16 80)(line_width 1))
        )
        (port
                (pt 0 96)
                (input)
                (text "ctl_sw_mask543_en" (rect 0 0 83 12)(font "Arial" ))
                (text "ctl_sw_mask543_en" (rect 21 91 104 103)(font "Arial" ))
                (line (pt 0 96)(pt 16 96)(line_width 1))
        )
        (port
                (pt 272 32)
                (output)
                (text "bus_sw_1u" (rect 0 0 44 12)(font "Arial" ))
                (text "bus_sw_1u" (rect 207 27 251 39)(font "Arial" ))
                (line (pt 272 32)(pt 256 32)(line_width 1))
        )
        (port
                (pt 272 48)
                (output)
                (text "bus_sw_1d" (rect 0 0 44 12)(font "Arial" ))
                (text "bus_sw_1d" (rect 207 43 251 55)(font "Arial" ))
                (line (pt 272 48)(pt 256 48)(line_width 1))
        )
        (port
                (pt 272 64)
                (output)
                (text "bus_sw_2u" (rect 0 0 46 12)(font "Arial" ))
                (text "bus_sw_2u" (rect 205 59 251 71)(font "Arial" ))
                (line (pt 272 64)(pt 256 64)(line_width 1))
        )
        (port
                (pt 272 80)
                (output)
                (text "bus_sw_2d" (rect 0 0 46 12)(font "Arial" ))
                (text "bus_sw_2d" (rect 205 75 251 87)(font "Arial" ))
                (line (pt 272 80)(pt 256 80)(line_width 1))
        )
        (port
                (pt 272 96)
                (output)
                (text "bus_sw_mask543_en" (rect 0 0 89 12)(font "Arial" ))
                (text "bus_sw_mask543_en" (rect 162 91 251 103)(font "Arial" ))
                (line (pt 272 96)(pt 256 96)(line_width 1))
        )
        (drawing
                (rectangle (rect 16 16 256 128)(line_width 1))
        )
)

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.