URL
https://opencores.org/ocsvn/a-z80/a-z80/trunk
Subversion Repositories a-z80
[/] [a-z80/] [trunk/] [tools/] [dongle/] [ddcb.html] - Rev 3
Compare with Previous | Blame | View Log
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01//EN"> <HTML><HEAD><TITLE>Z80 Instructions Timing</TITLE></HEAD><BODY> <H1>Opcodes with DD/FD + CB prefix</H1> DD CB . 00 .. <A href="#00">RLC (IX+d),B*</A><BR> DD CB . 01 .. <A href="#01">RLC (IX+d),C*</A><BR> DD CB . 02 .. <A href="#02">RLC (IX+d),D*</A><BR> DD CB . 03 .. <A href="#03">RLC (IX+d),E*</A><BR> DD CB . 04 .. <A href="#04">RLC (IX+d),H*</A><BR> DD CB . 05 .. <A href="#05">RLC (IX+d),L*</A><BR> DD CB . 06 .. <A href="#06">RLC (IX+d)</A><BR> DD CB . 07 .. <A href="#07">RLC (IX+d),A*</A><BR> DD CB . 08 .. <A href="#08">RRC (IX+d),B*</A><BR> DD CB . 09 .. <A href="#09">RRC (IX+d),C*</A><BR> DD CB . 0A .. <A href="#0A">RRC (IX+d),D*</A><BR> DD CB . 0B .. <A href="#0B">RRC (IX+d),E*</A><BR> DD CB . 0C .. <A href="#0C">RRC (IX+d),H*</A><BR> DD CB . 0D .. <A href="#0D">RRC (IX+d),L*</A><BR> DD CB . 0E .. <A href="#0E">RRC (IX+d)</A><BR> DD CB . 0F .. <A href="#0F">RRC (IX+d),A*</A><BR> DD CB . 10 .. <A href="#10">RL (IX+d),B*</A><BR> DD CB . 11 .. <A href="#11">RL (IX+d),C*</A><BR> DD CB . 12 .. <A href="#12">RL (IX+d),D*</A><BR> DD CB . 13 .. <A href="#13">RL (IX+d),E*</A><BR> DD CB . 14 .. <A href="#14">RL (IX+d),H*</A><BR> DD CB . 15 .. <A href="#15">RL (IX+d),L*</A><BR> DD CB . 16 .. <A href="#16">RL (IX+d)</A><BR> DD CB . 17 .. <A href="#17">RL (IX+d),A*</A><BR> DD CB . 18 .. <A href="#18">RR (IX+d),B*</A><BR> DD CB . 19 .. <A href="#19">RR (IX+d),C*</A><BR> DD CB . 1A .. <A href="#1A">RR (IX+d),D*</A><BR> DD CB . 1B .. <A href="#1B">RR (IX+d),E*</A><BR> DD CB . 1C .. <A href="#1C">RR (IX+d),H*</A><BR> DD CB . 1D .. <A href="#1D">RR (IX+d),L*</A><BR> DD CB . 1E .. <A href="#1E">RR (IX+d)</A><BR> DD CB . 1F .. <A href="#1F">RR (IX+d),A*</A><BR> DD CB . 20 .. <A href="#20">SLA (IX+d),B*</A><BR> DD CB . 21 .. <A href="#21">SLA (IX+d),C*</A><BR> DD CB . 22 .. <A href="#22">SLA (IX+d),D*</A><BR> DD CB . 23 .. <A href="#23">SLA (IX+d),E*</A><BR> DD CB . 24 .. <A href="#24">SLA (IX+d),H*</A><BR> DD CB . 25 .. <A href="#25">SLA (IX+d),L*</A><BR> DD CB . 26 .. <A href="#26">SLA (IX+d)</A><BR> DD CB . 27 .. <A href="#27">SLA (IX+d),A*</A><BR> DD CB . 28 .. <A href="#28">SRA (IX+d),B*</A><BR> DD CB . 29 .. <A href="#29">SRA (IX+d),C*</A><BR> DD CB . 2A .. <A href="#2A">SRA (IX+d),D*</A><BR> DD CB . 2B .. <A href="#2B">SRA (IX+d),E*</A><BR> DD CB . 2C .. <A href="#2C">SRA (IX+d),H*</A><BR> DD CB . 2D .. <A href="#2D">SRA (IX+d),L*</A><BR> DD CB . 2E .. <A href="#2E">SRA (IX+d)</A><BR> DD CB . 2F .. <A href="#2F">SRA (IX+d),A*</A><BR> DD CB . 30 .. <A href="#30">SLL (IX+d),B*</A><BR> DD CB . 31 .. <A href="#31">SLL (IX+d),C*</A><BR> DD CB . 32 .. <A href="#32">SLL (IX+d),D*</A><BR> DD CB . 33 .. <A href="#33">SLL (IX+d),E*</A><BR> DD CB . 34 .. <A href="#34">SLL (IX+d),H*</A><BR> DD CB . 35 .. <A href="#35">SLL (IX+d),L*</A><BR> DD CB . 36 .. <A href="#36">SLL (IX+d)*</A><BR> DD CB . 37 .. <A href="#37">SLL (IX+d),A*</A><BR> DD CB . 38 .. <A href="#38">SRL (IX+d),B*</A><BR> DD CB . 39 .. <A href="#39">SRL (IX+d),C*</A><BR> DD CB . 3A .. <A href="#3A">SRL (IX+d),D*</A><BR> DD CB . 3B .. <A href="#3B">SRL (IX+d),E*</A><BR> DD CB . 3C .. <A href="#3C">SRL (IX+d),H*</A><BR> DD CB . 3D .. <A href="#3D">SRL (IX+d),L*</A><BR> DD CB . 3E .. <A href="#3E">SRL (IX+d)</A><BR> DD CB . 3F .. <A href="#3F">SRL (IX+d),A*</A><BR> DD CB . 40 .. <A href="#40">BIT 0,(IX+d)*</A><BR> DD CB . 41 .. <A href="#41">BIT 0,(IX+d)*</A><BR> DD CB . 42 .. <A href="#42">BIT 0,(IX+d)*</A><BR> DD CB . 43 .. <A href="#43">BIT 0,(IX+d)*</A><BR> DD CB . 44 .. <A href="#44">BIT 0,(IX+d)*</A><BR> DD CB . 45 .. <A href="#45">BIT 0,(IX+d)*</A><BR> DD CB . 46 .. <A href="#46">BIT 0,(IX+d)</A><BR> DD CB . 47 .. <A href="#47">BIT 0,(IX+d)*</A><BR> DD CB . 48 .. <A href="#48">BIT 1,(IX+d)*</A><BR> DD CB . 49 .. <A href="#49">BIT 1,(IX+d)*</A><BR> DD CB . 4A .. <A href="#4A">BIT 1,(IX+d)*</A><BR> DD CB . 4B .. <A href="#4B">BIT 1,(IX+d)*</A><BR> DD CB . 4C .. <A href="#4C">BIT 1,(IX+d)*</A><BR> DD CB . 4D .. <A href="#4D">BIT 1,(IX+d)*</A><BR> DD CB . 4E .. <A href="#4E">BIT 1,(IX+d)</A><BR> DD CB . 4F .. <A href="#4F">BIT 1,(IX+d)*</A><BR> DD CB . 50 .. <A href="#50">BIT 2,(IX+d)*</A><BR> DD CB . 51 .. <A href="#51">BIT 2,(IX+d)*</A><BR> DD CB . 52 .. <A href="#52">BIT 2,(IX+d)*</A><BR> DD CB . 53 .. <A href="#53">BIT 2,(IX+d)*</A><BR> DD CB . 54 .. <A href="#54">BIT 2,(IX+d)*</A><BR> DD CB . 55 .. <A href="#55">BIT 2,(IX+d)*</A><BR> DD CB . 56 .. <A href="#56">BIT 2,(IX+d)</A><BR> DD CB . 57 .. <A href="#57">BIT 2,(IX+d)*</A><BR> DD CB . 58 .. <A href="#58">BIT 3,(IX+d)*</A><BR> DD CB . 59 .. <A href="#59">BIT 3,(IX+d)*</A><BR> DD CB . 5A .. <A href="#5A">BIT 3,(IX+d)*</A><BR> DD CB . 5B .. <A href="#5B">BIT 3,(IX+d)*</A><BR> DD CB . 5C .. <A href="#5C">BIT 3,(IX+d)*</A><BR> DD CB . 5D .. <A href="#5D">BIT 3,(IX+d)*</A><BR> DD CB . 5E .. <A href="#5E">BIT 3,(IX+d)</A><BR> DD CB . 5F .. <A href="#5F">BIT 3,(IX+d)*</A><BR> DD CB . 60 .. <A href="#60">BIT 4,(IX+d)*</A><BR> DD CB . 61 .. <A href="#61">BIT 4,(IX+d)*</A><BR> DD CB . 62 .. <A href="#62">BIT 4,(IX+d)*</A><BR> DD CB . 63 .. <A href="#63">BIT 4,(IX+d)*</A><BR> DD CB . 64 .. <A href="#64">BIT 4,(IX+d)*</A><BR> DD CB . 65 .. <A href="#65">BIT 4,(IX+d)*</A><BR> DD CB . 66 .. <A href="#66">BIT 4,(IX+d)</A><BR> DD CB . 67 .. <A href="#67">BIT 4,(IX+d)*</A><BR> DD CB . 68 .. <A href="#68">BIT 5,(IX+d)*</A><BR> DD CB . 69 .. <A href="#69">BIT 5,(IX+d)*</A><BR> DD CB . 6A .. <A href="#6A">BIT 5,(IX+d)*</A><BR> DD CB . 6B .. <A href="#6B">BIT 5,(IX+d)*</A><BR> DD CB . 6C .. <A href="#6C">BIT 5,(IX+d)*</A><BR> DD CB . 6D .. <A href="#6D">BIT 5,(IX+d)*</A><BR> DD CB . 6E .. <A href="#6E">BIT 5,(IX+d)</A><BR> DD CB . 6F .. <A href="#6F">BIT 5,(IX+d)*</A><BR> DD CB . 70 .. <A href="#70">BIT 6,(IX+d)*</A><BR> DD CB . 71 .. <A href="#71">BIT 6,(IX+d)*</A><BR> DD CB . 72 .. <A href="#72">BIT 6,(IX+d)*</A><BR> DD CB . 73 .. <A href="#73">BIT 6,(IX+d)*</A><BR> DD CB . 74 .. <A href="#74">BIT 6,(IX+d)*</A><BR> DD CB . 75 .. <A href="#75">BIT 6,(IX+d)*</A><BR> DD CB . 76 .. <A href="#76">BIT 6,(IX+d)</A><BR> DD CB . 77 .. <A href="#77">BIT 6,(IX+d)*</A><BR> DD CB . 78 .. <A href="#78">BIT 7,(IX+d)*</A><BR> DD CB . 79 .. <A href="#79">BIT 7,(IX+d)*</A><BR> DD CB . 7A .. <A href="#7A">BIT 7,(IX+d)*</A><BR> DD CB . 7B .. <A href="#7B">BIT 7,(IX+d)*</A><BR> DD CB . 7C .. <A href="#7C">BIT 7,(IX+d)*</A><BR> DD CB . 7D .. <A href="#7D">BIT 7,(IX+d)*</A><BR> DD CB . 7E .. <A href="#7E">BIT 7,(IX+d)</A><BR> DD CB . 7F .. <A href="#7F">BIT 7,(IX+d)*</A><BR> DD CB . 80 .. <A href="#80">RES 0,(IX+d),B*</A><BR> DD CB . 81 .. <A href="#81">RES 0,(IX+d),C*</A><BR> DD CB . 82 .. <A href="#82">RES 0,(IX+d),D*</A><BR> DD CB . 83 .. <A href="#83">RES 0,(IX+d),E*</A><BR> DD CB . 84 .. <A href="#84">RES 0,(IX+d),H*</A><BR> DD CB . 85 .. <A href="#85">RES 0,(IX+d),L*</A><BR> DD CB . 86 .. <A href="#86">RES 0,(IX+d)</A><BR> DD CB . 87 .. <A href="#87">RES 0,(IX+d),A*</A><BR> DD CB . 88 .. <A href="#88">RES 1,(IX+d),B*</A><BR> DD CB . 89 .. <A href="#89">RES 1,(IX+d),C*</A><BR> DD CB . 8A .. <A href="#8A">RES 1,(IX+d),D*</A><BR> DD CB . 8B .. <A href="#8B">RES 1,(IX+d),E*</A><BR> DD CB . 8C .. <A href="#8C">RES 1,(IX+d),H*</A><BR> DD CB . 8D .. <A href="#8D">RES 1,(IX+d),L*</A><BR> DD CB . 8E .. <A href="#8E">RES 1,(IX+d)</A><BR> DD CB . 8F .. <A href="#8F">RES 1,(IX+d),A*</A><BR> DD CB . 90 .. <A href="#90">RES 2,(IX+d),B*</A><BR> DD CB . 91 .. <A href="#91">RES 2,(IX+d),C*</A><BR> DD CB . 92 .. <A href="#92">RES 2,(IX+d),D*</A><BR> DD CB . 93 .. <A href="#93">RES 2,(IX+d),E*</A><BR> DD CB . 94 .. <A href="#94">RES 2,(IX+d),H*</A><BR> DD CB . 95 .. <A href="#95">RES 2,(IX+d),L*</A><BR> DD CB . 96 .. <A href="#96">RES 2,(IX+d)</A><BR> DD CB . 97 .. <A href="#97">RES 2,(IX+d),A*</A><BR> DD CB . 98 .. <A href="#98">RES 3,(IX+d),B*</A><BR> DD CB . 99 .. <A href="#99">RES 3,(IX+d),C*</A><BR> DD CB . 9A .. <A href="#9A">RES 3,(IX+d),D*</A><BR> DD CB . 9B .. <A href="#9B">RES 3,(IX+d),E*</A><BR> DD CB . 9C .. <A href="#9C">RES 3,(IX+d),H*</A><BR> DD CB . 9D .. <A href="#9D">RES 3,(IX+d),L*</A><BR> DD CB . 9E .. <A href="#9E">RES 3,(IX+d)</A><BR> DD CB . 9F .. <A href="#9F">RES 3,(IX+d),A*</A><BR> DD CB . A0 .. <A href="#A0">RES 4,(IX+d),B*</A><BR> DD CB . A1 .. <A href="#A1">RES 4,(IX+d),C*</A><BR> DD CB . A2 .. <A href="#A2">RES 4,(IX+d),D*</A><BR> DD CB . A3 .. <A href="#A3">RES 4,(IX+d),E*</A><BR> DD CB . A4 .. <A href="#A4">RES 4,(IX+d),H*</A><BR> DD CB . A5 .. <A href="#A5">RES 4,(IX+d),L*</A><BR> DD CB . A6 .. <A href="#A6">RES 4,(IX+d)</A><BR> DD CB . A7 .. <A href="#A7">RES 4,(IX+d),A*</A><BR> DD CB . A8 .. <A href="#A8">RES 5,(IX+d),B*</A><BR> DD CB . A9 .. <A href="#A9">RES 5,(IX+d),C*</A><BR> DD CB . AA .. <A href="#AA">RES 5,(IX+d),D*</A><BR> DD CB . AB .. <A href="#AB">RES 5,(IX+d),E*</A><BR> DD CB . AC .. <A href="#AC">RES 5,(IX+d),H*</A><BR> DD CB . AD .. <A href="#AD">RES 5,(IX+d),L*</A><BR> DD CB . AE .. <A href="#AE">RES 5,(IX+d)</A><BR> DD CB . AF .. <A href="#AF">RES 5,(IX+d),A*</A><BR> DD CB . B0 .. <A href="#B0">RES 6,(IX+d),B*</A><BR> DD CB . B1 .. <A href="#B1">RES 6,(IX+d),C*</A><BR> DD CB . B2 .. <A href="#B2">RES 6,(IX+d),D*</A><BR> DD CB . B3 .. <A href="#B3">RES 6,(IX+d),E*</A><BR> DD CB . B4 .. <A href="#B4">RES 6,(IX+d),H*</A><BR> DD CB . B5 .. <A href="#B5">RES 6,(IX+d),L*</A><BR> DD CB . B6 .. <A href="#B6">RES 6,(IX+d)</A><BR> DD CB . B7 .. <A href="#B7">RES 6,(IX+d),A*</A><BR> DD CB . B8 .. <A href="#B8">RES 7,(IX+d),B*</A><BR> DD CB . B9 .. <A href="#B9">RES 7,(IX+d),C*</A><BR> DD CB . BA .. <A href="#BA">RES 7,(IX+d),D*</A><BR> DD CB . BB .. <A href="#BB">RES 7,(IX+d),E*</A><BR> DD CB . BC .. <A href="#BC">RES 7,(IX+d),H*</A><BR> DD CB . BD .. <A href="#BD">RES 7,(IX+d),L*</A><BR> DD CB . BE .. <A href="#BE">RES 7,(IX+d)</A><BR> DD CB . BF .. <A href="#BF">RES 7,(IX+d),A*</A><BR> DD CB . C0 .. <A href="#C0">SET 0,(IX+d),B*</A><BR> DD CB . C1 .. <A href="#C1">SET 0,(IX+d),C*</A><BR> DD CB . C2 .. <A href="#C2">SET 0,(IX+d),D*</A><BR> DD CB . C3 .. <A href="#C3">SET 0,(IX+d),E*</A><BR> DD CB . C4 .. <A href="#C4">SET 0,(IX+d),H*</A><BR> DD CB . C5 .. <A href="#C5">SET 0,(IX+d),L*</A><BR> DD CB . C6 .. <A href="#C6">SET 0,(IX+d)</A><BR> DD CB . C7 .. <A href="#C7">SET 0,(IX+d),A*</A><BR> DD CB . C8 .. <A href="#C8">SET 1,(IX+d),B*</A><BR> DD CB . C9 .. <A href="#C9">SET 1,(IX+d),C*</A><BR> DD CB . CA .. <A href="#CA">SET 1,(IX+d),D*</A><BR> DD CB . CB .. <A href="#CB">SET 1,(IX+d),E*</A><BR> DD CB . CC .. <A href="#CC">SET 1,(IX+d),H*</A><BR> DD CB . CD .. <A href="#CD">SET 1,(IX+d),L*</A><BR> DD CB . CE .. <A href="#CE">SET 1,(IX+d)</A><BR> DD CB . CF .. <A href="#CF">SET 1,(IX+d),A*</A><BR> DD CB . D0 .. <A href="#D0">SET 2,(IX+d),B*</A><BR> DD CB . D1 .. <A href="#D1">SET 2,(IX+d),C*</A><BR> DD CB . D2 .. <A href="#D2">SET 2,(IX+d),D*</A><BR> DD CB . D3 .. <A href="#D3">SET 2,(IX+d),E*</A><BR> DD CB . D4 .. <A href="#D4">SET 2,(IX+d),H*</A><BR> DD CB . D5 .. <A href="#D5">SET 2,(IX+d),L*</A><BR> DD CB . D6 .. <A href="#D6">SET 2,(IX+d)</A><BR> DD CB . D7 .. <A href="#D7">SET 2,(IX+d),A*</A><BR> DD CB . D8 .. <A href="#D8">SET 3,(IX+d),B*</A><BR> DD CB . D9 .. <A href="#D9">SET 3,(IX+d),C*</A><BR> DD CB . DA .. <A href="#DA">SET 3,(IX+d),D*</A><BR> DD CB . DB .. <A href="#DB">SET 3,(IX+d),E*</A><BR> DD CB . DC .. <A href="#DC">SET 3,(IX+d),H*</A><BR> DD CB . DD .. <A href="#DD">SET 3,(IX+d),L*</A><BR> DD CB . DE .. <A href="#DE">SET 3,(IX+d)</A><BR> DD CB . DF .. <A href="#DF">SET 3,(IX+d),A*</A><BR> DD CB . E0 .. <A href="#E0">SET 4,(IX+d),B*</A><BR> DD CB . E1 .. <A href="#E1">SET 4,(IX+d),C*</A><BR> DD CB . E2 .. <A href="#E2">SET 4,(IX+d),D*</A><BR> DD CB . E3 .. <A href="#E3">SET 4,(IX+d),E*</A><BR> DD CB . E4 .. <A href="#E4">SET 4,(IX+d),H*</A><BR> DD CB . E5 .. <A href="#E5">SET 4,(IX+d),L*</A><BR> DD CB . E6 .. <A href="#E6">SET 4,(IX+d)</A><BR> DD CB . E7 .. <A href="#E7">SET 4,(IX+d),A*</A><BR> DD CB . E8 .. <A href="#E8">SET 5,(IX+d),B*</A><BR> DD CB . E9 .. <A href="#E9">SET 5,(IX+d),C*</A><BR> DD CB . EA .. <A href="#EA">SET 5,(IX+d),D*</A><BR> DD CB . EB .. <A href="#EB">SET 5,(IX+d),E*</A><BR> DD CB . EC .. <A href="#EC">SET 5,(IX+d),H*</A><BR> DD CB . ED .. <A href="#ED">SET 5,(IX+d),L*</A><BR> DD CB . EE .. <A href="#EE">SET 5,(IX+d)</A><BR> DD CB . EF .. <A href="#EF">SET 5,(IX+d),A*</A><BR> DD CB . F0 .. <A href="#F0">SET 6,(IX+d),B*</A><BR> DD CB . F1 .. <A href="#F1">SET 6,(IX+d),C*</A><BR> DD CB . F2 .. <A href="#F2">SET 6,(IX+d),D*</A><BR> DD CB . F3 .. <A href="#F3">SET 6,(IX+d),E*</A><BR> DD CB . F4 .. <A href="#F4">SET 6,(IX+d),H*</A><BR> DD CB . F5 .. <A href="#F5">SET 6,(IX+d),L*</A><BR> DD CB . F6 .. <A href="#F6">SET 6,(IX+d)</A><BR> DD CB . F7 .. <A href="#F7">SET 6,(IX+d),A*</A><BR> DD CB . F8 .. <A href="#F8">SET 7,(IX+d),B*</A><BR> DD CB . F9 .. <A href="#F9">SET 7,(IX+d),C*</A><BR> DD CB . FA .. <A href="#FA">SET 7,(IX+d),D*</A><BR> DD CB . FB .. <A href="#FB">SET 7,(IX+d),E*</A><BR> DD CB . FC .. <A href="#FC">SET 7,(IX+d),H*</A><BR> DD CB . FD .. <A href="#FD">SET 7,(IX+d),L*</A><BR> DD CB . FE .. <A href="#FE">SET 7,(IX+d)</A><BR> DD CB . FF .. <A href="#FF">SET 7,(IX+d),A*</A><BR> <H1>Instructions Timing</H1> <H3 id="00">Opcode: DD CB d 00 => RLC (IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:00 MREQ RD | Memory read from 003 -> 00 #014H T10 AB:003 DB:00 MREQ RD | Memory read from 003 -> 00 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="01">Opcode: DD CB d 01 => RLC (IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:01 MREQ RD | Memory read from 003 -> 01 #014H T10 AB:003 DB:01 MREQ RD | Memory read from 003 -> 01 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="02">Opcode: DD CB d 02 => RLC (IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02 #014H T10 AB:003 DB:02 MREQ RD | Memory read from 003 -> 02 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="03">Opcode: DD CB d 03 => RLC (IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:03 MREQ RD | Memory read from 003 -> 03 #014H T10 AB:003 DB:03 MREQ RD | Memory read from 003 -> 03 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="04">Opcode: DD CB d 04 => RLC (IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:04 MREQ RD | Memory read from 003 -> 04 #014H T10 AB:003 DB:04 MREQ RD | Memory read from 003 -> 04 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="05">Opcode: DD CB d 05 => RLC (IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:05 MREQ RD | Memory read from 003 -> 05 #014H T10 AB:003 DB:05 MREQ RD | Memory read from 003 -> 05 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="06">Opcode: DD CB d 06 => RLC (IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:06 MREQ RD | Memory read from 003 -> 06 #014H T10 AB:003 DB:06 MREQ RD | Memory read from 003 -> 06 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="07">Opcode: DD CB d 07 => RLC (IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:07 MREQ RD | Memory read from 003 -> 07 #014H T10 AB:003 DB:07 MREQ RD | Memory read from 003 -> 07 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="08">Opcode: DD CB d 08 => RRC (IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:08 MREQ RD | Memory read from 003 -> 08 #014H T10 AB:003 DB:08 MREQ RD | Memory read from 003 -> 08 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="09">Opcode: DD CB d 09 => RRC (IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:09 MREQ RD | Memory read from 003 -> 09 #014H T10 AB:003 DB:09 MREQ RD | Memory read from 003 -> 09 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="0A">Opcode: DD CB d 0A => RRC (IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:0A MREQ RD | Memory read from 003 -> 0A #014H T10 AB:003 DB:0A MREQ RD | Memory read from 003 -> 0A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="0B">Opcode: DD CB d 0B => RRC (IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:0B MREQ RD | Memory read from 003 -> 0B #014H T10 AB:003 DB:0B MREQ RD | Memory read from 003 -> 0B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="0C">Opcode: DD CB d 0C => RRC (IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:0C MREQ RD | Memory read from 003 -> 0C #014H T10 AB:003 DB:0C MREQ RD | Memory read from 003 -> 0C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="0D">Opcode: DD CB d 0D => RRC (IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:0D MREQ RD | Memory read from 003 -> 0D #014H T10 AB:003 DB:0D MREQ RD | Memory read from 003 -> 0D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="0E">Opcode: DD CB d 0E => RRC (IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:0E MREQ RD | Memory read from 003 -> 0E #014H T10 AB:003 DB:0E MREQ RD | Memory read from 003 -> 0E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="0F">Opcode: DD CB d 0F => RRC (IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:0F MREQ RD | Memory read from 003 -> 0F #014H T10 AB:003 DB:0F MREQ RD | Memory read from 003 -> 0F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="10">Opcode: DD CB d 10 => RL (IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:10 MREQ RD | Memory read from 003 -> 10 #014H T10 AB:003 DB:10 MREQ RD | Memory read from 003 -> 10 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="11">Opcode: DD CB d 11 => RL (IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:11 MREQ RD | Memory read from 003 -> 11 #014H T10 AB:003 DB:11 MREQ RD | Memory read from 003 -> 11 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="12">Opcode: DD CB d 12 => RL (IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:12 MREQ RD | Memory read from 003 -> 12 #014H T10 AB:003 DB:12 MREQ RD | Memory read from 003 -> 12 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="13">Opcode: DD CB d 13 => RL (IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:13 MREQ RD | Memory read from 003 -> 13 #014H T10 AB:003 DB:13 MREQ RD | Memory read from 003 -> 13 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="14">Opcode: DD CB d 14 => RL (IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:14 MREQ RD | Memory read from 003 -> 14 #014H T10 AB:003 DB:14 MREQ RD | Memory read from 003 -> 14 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="15">Opcode: DD CB d 15 => RL (IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:15 MREQ RD | Memory read from 003 -> 15 #014H T10 AB:003 DB:15 MREQ RD | Memory read from 003 -> 15 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="16">Opcode: DD CB d 16 => RL (IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:16 MREQ RD | Memory read from 003 -> 16 #014H T10 AB:003 DB:16 MREQ RD | Memory read from 003 -> 16 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="17">Opcode: DD CB d 17 => RL (IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:17 MREQ RD | Memory read from 003 -> 17 #014H T10 AB:003 DB:17 MREQ RD | Memory read from 003 -> 17 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="18">Opcode: DD CB d 18 => RR (IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:18 MREQ RD | Memory read from 003 -> 18 #014H T10 AB:003 DB:18 MREQ RD | Memory read from 003 -> 18 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="19">Opcode: DD CB d 19 => RR (IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:19 MREQ RD | Memory read from 003 -> 19 #014H T10 AB:003 DB:19 MREQ RD | Memory read from 003 -> 19 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="1A">Opcode: DD CB d 1A => RR (IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:1A MREQ RD | Memory read from 003 -> 1A #014H T10 AB:003 DB:1A MREQ RD | Memory read from 003 -> 1A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="1B">Opcode: DD CB d 1B => RR (IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:1B MREQ RD | Memory read from 003 -> 1B #014H T10 AB:003 DB:1B MREQ RD | Memory read from 003 -> 1B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="1C">Opcode: DD CB d 1C => RR (IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:1C MREQ RD | Memory read from 003 -> 1C #014H T10 AB:003 DB:1C MREQ RD | Memory read from 003 -> 1C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="1D">Opcode: DD CB d 1D => RR (IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:1D MREQ RD | Memory read from 003 -> 1D #014H T10 AB:003 DB:1D MREQ RD | Memory read from 003 -> 1D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="1E">Opcode: DD CB d 1E => RR (IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:1E MREQ RD | Memory read from 003 -> 1E #014H T10 AB:003 DB:1E MREQ RD | Memory read from 003 -> 1E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="1F">Opcode: DD CB d 1F => RR (IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:1F MREQ RD | Memory read from 003 -> 1F #014H T10 AB:003 DB:1F MREQ RD | Memory read from 003 -> 1F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="20">Opcode: DD CB d 20 => SLA (IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:20 MREQ RD | Memory read from 003 -> 20 #014H T10 AB:003 DB:20 MREQ RD | Memory read from 003 -> 20 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BA MREQ | #023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 <- BA -----------------------------------------------------------+ </PRE> <H3 id="21">Opcode: DD CB d 21 => SLA (IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:21 MREQ RD | Memory read from 003 -> 21 #014H T10 AB:003 DB:21 MREQ RD | Memory read from 003 -> 21 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BA MREQ | #023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 <- BA -----------------------------------------------------------+ </PRE> <H3 id="22">Opcode: DD CB d 22 => SLA (IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:22 MREQ RD | Memory read from 003 -> 22 #014H T10 AB:003 DB:22 MREQ RD | Memory read from 003 -> 22 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BA MREQ | #023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 <- BA -----------------------------------------------------------+ </PRE> <H3 id="23">Opcode: DD CB d 23 => SLA (IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:23 MREQ RD | Memory read from 003 -> 23 #014H T10 AB:003 DB:23 MREQ RD | Memory read from 003 -> 23 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BA MREQ | #023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 <- BA -----------------------------------------------------------+ </PRE> <H3 id="24">Opcode: DD CB d 24 => SLA (IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:24 MREQ RD | Memory read from 003 -> 24 #014H T10 AB:003 DB:24 MREQ RD | Memory read from 003 -> 24 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BA MREQ | #023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 <- BA -----------------------------------------------------------+ </PRE> <H3 id="25">Opcode: DD CB d 25 => SLA (IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:25 MREQ RD | Memory read from 003 -> 25 #014H T10 AB:003 DB:25 MREQ RD | Memory read from 003 -> 25 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BA MREQ | #023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 <- BA -----------------------------------------------------------+ </PRE> <H3 id="26">Opcode: DD CB d 26 => SLA (IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:26 MREQ RD | Memory read from 003 -> 26 #014H T10 AB:003 DB:26 MREQ RD | Memory read from 003 -> 26 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BA MREQ | #023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 <- BA -----------------------------------------------------------+ </PRE> <H3 id="27">Opcode: DD CB d 27 => SLA (IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:27 MREQ RD | Memory read from 003 -> 27 #014H T10 AB:003 DB:27 MREQ RD | Memory read from 003 -> 27 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BA MREQ | #023H T19 AB:000 DB:BA MREQ WR | Memory write to 000 <- BA -----------------------------------------------------------+ </PRE> <H3 id="28">Opcode: DD CB d 28 => SRA (IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:28 MREQ RD | Memory read from 003 -> 28 #014H T10 AB:003 DB:28 MREQ RD | Memory read from 003 -> 28 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="29">Opcode: DD CB d 29 => SRA (IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:29 MREQ RD | Memory read from 003 -> 29 #014H T10 AB:003 DB:29 MREQ RD | Memory read from 003 -> 29 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="2A">Opcode: DD CB d 2A => SRA (IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:2A MREQ RD | Memory read from 003 -> 2A #014H T10 AB:003 DB:2A MREQ RD | Memory read from 003 -> 2A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="2B">Opcode: DD CB d 2B => SRA (IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:2B MREQ RD | Memory read from 003 -> 2B #014H T10 AB:003 DB:2B MREQ RD | Memory read from 003 -> 2B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="2C">Opcode: DD CB d 2C => SRA (IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:2C MREQ RD | Memory read from 003 -> 2C #014H T10 AB:003 DB:2C MREQ RD | Memory read from 003 -> 2C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="2D">Opcode: DD CB d 2D => SRA (IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:2D MREQ RD | Memory read from 003 -> 2D #014H T10 AB:003 DB:2D MREQ RD | Memory read from 003 -> 2D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="2E">Opcode: DD CB d 2E => SRA (IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:2E MREQ RD | Memory read from 003 -> 2E #014H T10 AB:003 DB:2E MREQ RD | Memory read from 003 -> 2E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="2F">Opcode: DD CB d 2F => SRA (IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:2F MREQ RD | Memory read from 003 -> 2F #014H T10 AB:003 DB:2F MREQ RD | Memory read from 003 -> 2F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:EE MREQ | #023H T19 AB:000 DB:EE MREQ WR | Memory write to 000 <- EE -----------------------------------------------------------+ </PRE> <H3 id="30">Opcode: DD CB d 30 => SLL (IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:30 MREQ RD | Memory read from 003 -> 30 #014H T10 AB:003 DB:30 MREQ RD | Memory read from 003 -> 30 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="31">Opcode: DD CB d 31 => SLL (IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:31 MREQ RD | Memory read from 003 -> 31 #014H T10 AB:003 DB:31 MREQ RD | Memory read from 003 -> 31 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="32">Opcode: DD CB d 32 => SLL (IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:32 MREQ RD | Memory read from 003 -> 32 #014H T10 AB:003 DB:32 MREQ RD | Memory read from 003 -> 32 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="33">Opcode: DD CB d 33 => SLL (IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:33 MREQ RD | Memory read from 003 -> 33 #014H T10 AB:003 DB:33 MREQ RD | Memory read from 003 -> 33 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="34">Opcode: DD CB d 34 => SLL (IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:34 MREQ RD | Memory read from 003 -> 34 #014H T10 AB:003 DB:34 MREQ RD | Memory read from 003 -> 34 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="35">Opcode: DD CB d 35 => SLL (IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:35 MREQ RD | Memory read from 003 -> 35 #014H T10 AB:003 DB:35 MREQ RD | Memory read from 003 -> 35 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="36">Opcode: DD CB d 36 => SLL (IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:36 MREQ RD | Memory read from 003 -> 36 #014H T10 AB:003 DB:36 MREQ RD | Memory read from 003 -> 36 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="37">Opcode: DD CB d 37 => SLL (IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:37 MREQ RD | Memory read from 003 -> 37 #014H T10 AB:003 DB:37 MREQ RD | Memory read from 003 -> 37 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:BB MREQ | #023H T19 AB:000 DB:BB MREQ WR | Memory write to 000 <- BB -----------------------------------------------------------+ </PRE> <H3 id="38">Opcode: DD CB d 38 => SRL (IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:38 MREQ RD | Memory read from 003 -> 38 #014H T10 AB:003 DB:38 MREQ RD | Memory read from 003 -> 38 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:6E MREQ | #023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 <- 6E -----------------------------------------------------------+ </PRE> <H3 id="39">Opcode: DD CB d 39 => SRL (IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:39 MREQ RD | Memory read from 003 -> 39 #014H T10 AB:003 DB:39 MREQ RD | Memory read from 003 -> 39 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:6E MREQ | #023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 <- 6E -----------------------------------------------------------+ </PRE> <H3 id="3A">Opcode: DD CB d 3A => SRL (IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:3A MREQ RD | Memory read from 003 -> 3A #014H T10 AB:003 DB:3A MREQ RD | Memory read from 003 -> 3A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:6E MREQ | #023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 <- 6E -----------------------------------------------------------+ </PRE> <H3 id="3B">Opcode: DD CB d 3B => SRL (IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:3B MREQ RD | Memory read from 003 -> 3B #014H T10 AB:003 DB:3B MREQ RD | Memory read from 003 -> 3B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:6E MREQ | #023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 <- 6E -----------------------------------------------------------+ </PRE> <H3 id="3C">Opcode: DD CB d 3C => SRL (IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:3C MREQ RD | Memory read from 003 -> 3C #014H T10 AB:003 DB:3C MREQ RD | Memory read from 003 -> 3C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:6E MREQ | #023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 <- 6E -----------------------------------------------------------+ </PRE> <H3 id="3D">Opcode: DD CB d 3D => SRL (IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:3D MREQ RD | Memory read from 003 -> 3D #014H T10 AB:003 DB:3D MREQ RD | Memory read from 003 -> 3D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:6E MREQ | #023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 <- 6E -----------------------------------------------------------+ </PRE> <H3 id="3E">Opcode: DD CB d 3E => SRL (IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:3E MREQ RD | Memory read from 003 -> 3E #014H T10 AB:003 DB:3E MREQ RD | Memory read from 003 -> 3E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:6E MREQ | #023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 <- 6E -----------------------------------------------------------+ </PRE> <H3 id="3F">Opcode: DD CB d 3F => SRL (IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:3F MREQ RD | Memory read from 003 -> 3F #014H T10 AB:003 DB:3F MREQ RD | Memory read from 003 -> 3F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:6E MREQ | #023H T19 AB:000 DB:6E MREQ WR | Memory write to 000 <- 6E -----------------------------------------------------------+ </PRE> <H3 id="40">Opcode: DD CB d 40 => BIT 0,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:40 MREQ RD | Memory read from 003 -> 40 #014H T10 AB:003 DB:40 MREQ RD | Memory read from 003 -> 40 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="41">Opcode: DD CB d 41 => BIT 0,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:41 MREQ RD | Memory read from 003 -> 41 #014H T10 AB:003 DB:41 MREQ RD | Memory read from 003 -> 41 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="42">Opcode: DD CB d 42 => BIT 0,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:42 MREQ RD | Memory read from 003 -> 42 #014H T10 AB:003 DB:42 MREQ RD | Memory read from 003 -> 42 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="43">Opcode: DD CB d 43 => BIT 0,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:43 MREQ RD | Memory read from 003 -> 43 #014H T10 AB:003 DB:43 MREQ RD | Memory read from 003 -> 43 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="44">Opcode: DD CB d 44 => BIT 0,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:44 MREQ RD | Memory read from 003 -> 44 #014H T10 AB:003 DB:44 MREQ RD | Memory read from 003 -> 44 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="45">Opcode: DD CB d 45 => BIT 0,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:45 MREQ RD | Memory read from 003 -> 45 #014H T10 AB:003 DB:45 MREQ RD | Memory read from 003 -> 45 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="46">Opcode: DD CB d 46 => BIT 0,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:46 MREQ RD | Memory read from 003 -> 46 #014H T10 AB:003 DB:46 MREQ RD | Memory read from 003 -> 46 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="47">Opcode: DD CB d 47 => BIT 0,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:47 MREQ RD | Memory read from 003 -> 47 #014H T10 AB:003 DB:47 MREQ RD | Memory read from 003 -> 47 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="48">Opcode: DD CB d 48 => BIT 1,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:48 MREQ RD | Memory read from 003 -> 48 #014H T10 AB:003 DB:48 MREQ RD | Memory read from 003 -> 48 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="49">Opcode: DD CB d 49 => BIT 1,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:49 MREQ RD | Memory read from 003 -> 49 #014H T10 AB:003 DB:49 MREQ RD | Memory read from 003 -> 49 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="4A">Opcode: DD CB d 4A => BIT 1,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:4A MREQ RD | Memory read from 003 -> 4A #014H T10 AB:003 DB:4A MREQ RD | Memory read from 003 -> 4A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="4B">Opcode: DD CB d 4B => BIT 1,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:4B MREQ RD | Memory read from 003 -> 4B #014H T10 AB:003 DB:4B MREQ RD | Memory read from 003 -> 4B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="4C">Opcode: DD CB d 4C => BIT 1,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:4C MREQ RD | Memory read from 003 -> 4C #014H T10 AB:003 DB:4C MREQ RD | Memory read from 003 -> 4C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="4D">Opcode: DD CB d 4D => BIT 1,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:4D MREQ RD | Memory read from 003 -> 4D #014H T10 AB:003 DB:4D MREQ RD | Memory read from 003 -> 4D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="4E">Opcode: DD CB d 4E => BIT 1,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:4E MREQ RD | Memory read from 003 -> 4E #014H T10 AB:003 DB:4E MREQ RD | Memory read from 003 -> 4E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="4F">Opcode: DD CB d 4F => BIT 1,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:4F MREQ RD | Memory read from 003 -> 4F #014H T10 AB:003 DB:4F MREQ RD | Memory read from 003 -> 4F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="50">Opcode: DD CB d 50 => BIT 2,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:50 MREQ RD | Memory read from 003 -> 50 #014H T10 AB:003 DB:50 MREQ RD | Memory read from 003 -> 50 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="51">Opcode: DD CB d 51 => BIT 2,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:51 MREQ RD | Memory read from 003 -> 51 #014H T10 AB:003 DB:51 MREQ RD | Memory read from 003 -> 51 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="52">Opcode: DD CB d 52 => BIT 2,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:52 MREQ RD | Memory read from 003 -> 52 #014H T10 AB:003 DB:52 MREQ RD | Memory read from 003 -> 52 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="53">Opcode: DD CB d 53 => BIT 2,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:53 MREQ RD | Memory read from 003 -> 53 #014H T10 AB:003 DB:53 MREQ RD | Memory read from 003 -> 53 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="54">Opcode: DD CB d 54 => BIT 2,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:54 MREQ RD | Memory read from 003 -> 54 #014H T10 AB:003 DB:54 MREQ RD | Memory read from 003 -> 54 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="55">Opcode: DD CB d 55 => BIT 2,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:55 MREQ RD | Memory read from 003 -> 55 #014H T10 AB:003 DB:55 MREQ RD | Memory read from 003 -> 55 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="56">Opcode: DD CB d 56 => BIT 2,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:56 MREQ RD | Memory read from 003 -> 56 #014H T10 AB:003 DB:56 MREQ RD | Memory read from 003 -> 56 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="57">Opcode: DD CB d 57 => BIT 2,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:57 MREQ RD | Memory read from 003 -> 57 #014H T10 AB:003 DB:57 MREQ RD | Memory read from 003 -> 57 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="58">Opcode: DD CB d 58 => BIT 3,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:58 MREQ RD | Memory read from 003 -> 58 #014H T10 AB:003 DB:58 MREQ RD | Memory read from 003 -> 58 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="59">Opcode: DD CB d 59 => BIT 3,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:59 MREQ RD | Memory read from 003 -> 59 #014H T10 AB:003 DB:59 MREQ RD | Memory read from 003 -> 59 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="5A">Opcode: DD CB d 5A => BIT 3,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:5A MREQ RD | Memory read from 003 -> 5A #014H T10 AB:003 DB:5A MREQ RD | Memory read from 003 -> 5A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="5B">Opcode: DD CB d 5B => BIT 3,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:5B MREQ RD | Memory read from 003 -> 5B #014H T10 AB:003 DB:5B MREQ RD | Memory read from 003 -> 5B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="5C">Opcode: DD CB d 5C => BIT 3,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:5C MREQ RD | Memory read from 003 -> 5C #014H T10 AB:003 DB:5C MREQ RD | Memory read from 003 -> 5C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="5D">Opcode: DD CB d 5D => BIT 3,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:5D MREQ RD | Memory read from 003 -> 5D #014H T10 AB:003 DB:5D MREQ RD | Memory read from 003 -> 5D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="5E">Opcode: DD CB d 5E => BIT 3,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:5E MREQ RD | Memory read from 003 -> 5E #014H T10 AB:003 DB:5E MREQ RD | Memory read from 003 -> 5E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="5F">Opcode: DD CB d 5F => BIT 3,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:5F MREQ RD | Memory read from 003 -> 5F #014H T10 AB:003 DB:5F MREQ RD | Memory read from 003 -> 5F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="60">Opcode: DD CB d 60 => BIT 4,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:60 MREQ RD | Memory read from 003 -> 60 #014H T10 AB:003 DB:60 MREQ RD | Memory read from 003 -> 60 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="61">Opcode: DD CB d 61 => BIT 4,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:61 MREQ RD | Memory read from 003 -> 61 #014H T10 AB:003 DB:61 MREQ RD | Memory read from 003 -> 61 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="62">Opcode: DD CB d 62 => BIT 4,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:62 MREQ RD | Memory read from 003 -> 62 #014H T10 AB:003 DB:62 MREQ RD | Memory read from 003 -> 62 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="63">Opcode: DD CB d 63 => BIT 4,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:63 MREQ RD | Memory read from 003 -> 63 #014H T10 AB:003 DB:63 MREQ RD | Memory read from 003 -> 63 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="64">Opcode: DD CB d 64 => BIT 4,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:64 MREQ RD | Memory read from 003 -> 64 #014H T10 AB:003 DB:64 MREQ RD | Memory read from 003 -> 64 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="65">Opcode: DD CB d 65 => BIT 4,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:65 MREQ RD | Memory read from 003 -> 65 #014H T10 AB:003 DB:65 MREQ RD | Memory read from 003 -> 65 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="66">Opcode: DD CB d 66 => BIT 4,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:66 MREQ RD | Memory read from 003 -> 66 #014H T10 AB:003 DB:66 MREQ RD | Memory read from 003 -> 66 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="67">Opcode: DD CB d 67 => BIT 4,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:67 MREQ RD | Memory read from 003 -> 67 #014H T10 AB:003 DB:67 MREQ RD | Memory read from 003 -> 67 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="68">Opcode: DD CB d 68 => BIT 5,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:68 MREQ RD | Memory read from 003 -> 68 #014H T10 AB:003 DB:68 MREQ RD | Memory read from 003 -> 68 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="69">Opcode: DD CB d 69 => BIT 5,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:69 MREQ RD | Memory read from 003 -> 69 #014H T10 AB:003 DB:69 MREQ RD | Memory read from 003 -> 69 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="6A">Opcode: DD CB d 6A => BIT 5,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:6A MREQ RD | Memory read from 003 -> 6A #014H T10 AB:003 DB:6A MREQ RD | Memory read from 003 -> 6A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="6B">Opcode: DD CB d 6B => BIT 5,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:6B MREQ RD | Memory read from 003 -> 6B #014H T10 AB:003 DB:6B MREQ RD | Memory read from 003 -> 6B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="6C">Opcode: DD CB d 6C => BIT 5,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:6C MREQ RD | Memory read from 003 -> 6C #014H T10 AB:003 DB:6C MREQ RD | Memory read from 003 -> 6C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="6D">Opcode: DD CB d 6D => BIT 5,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:6D MREQ RD | Memory read from 003 -> 6D #014H T10 AB:003 DB:6D MREQ RD | Memory read from 003 -> 6D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="6E">Opcode: DD CB d 6E => BIT 5,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:6E MREQ RD | Memory read from 003 -> 6E #014H T10 AB:003 DB:6E MREQ RD | Memory read from 003 -> 6E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="6F">Opcode: DD CB d 6F => BIT 5,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:6F MREQ RD | Memory read from 003 -> 6F #014H T10 AB:003 DB:6F MREQ RD | Memory read from 003 -> 6F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="70">Opcode: DD CB d 70 => BIT 6,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:70 MREQ RD | Memory read from 003 -> 70 #014H T10 AB:003 DB:70 MREQ RD | Memory read from 003 -> 70 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="71">Opcode: DD CB d 71 => BIT 6,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:71 MREQ RD | Memory read from 003 -> 71 #014H T10 AB:003 DB:71 MREQ RD | Memory read from 003 -> 71 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="72">Opcode: DD CB d 72 => BIT 6,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:72 MREQ RD | Memory read from 003 -> 72 #014H T10 AB:003 DB:72 MREQ RD | Memory read from 003 -> 72 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="73">Opcode: DD CB d 73 => BIT 6,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:73 MREQ RD | Memory read from 003 -> 73 #014H T10 AB:003 DB:73 MREQ RD | Memory read from 003 -> 73 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="74">Opcode: DD CB d 74 => BIT 6,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:74 MREQ RD | Memory read from 003 -> 74 #014H T10 AB:003 DB:74 MREQ RD | Memory read from 003 -> 74 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="75">Opcode: DD CB d 75 => BIT 6,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:75 MREQ RD | Memory read from 003 -> 75 #014H T10 AB:003 DB:75 MREQ RD | Memory read from 003 -> 75 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="76">Opcode: DD CB d 76 => BIT 6,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:76 MREQ RD | Memory read from 003 -> 76 #014H T10 AB:003 DB:76 MREQ RD | Memory read from 003 -> 76 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="77">Opcode: DD CB d 77 => BIT 6,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:77 MREQ RD | Memory read from 003 -> 77 #014H T10 AB:003 DB:77 MREQ RD | Memory read from 003 -> 77 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="78">Opcode: DD CB d 78 => BIT 7,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:78 MREQ RD | Memory read from 003 -> 78 #014H T10 AB:003 DB:78 MREQ RD | Memory read from 003 -> 78 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="79">Opcode: DD CB d 79 => BIT 7,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:79 MREQ RD | Memory read from 003 -> 79 #014H T10 AB:003 DB:79 MREQ RD | Memory read from 003 -> 79 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="7A">Opcode: DD CB d 7A => BIT 7,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:7A MREQ RD | Memory read from 003 -> 7A #014H T10 AB:003 DB:7A MREQ RD | Memory read from 003 -> 7A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="7B">Opcode: DD CB d 7B => BIT 7,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:7B MREQ RD | Memory read from 003 -> 7B #014H T10 AB:003 DB:7B MREQ RD | Memory read from 003 -> 7B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="7C">Opcode: DD CB d 7C => BIT 7,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:7C MREQ RD | Memory read from 003 -> 7C #014H T10 AB:003 DB:7C MREQ RD | Memory read from 003 -> 7C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="7D">Opcode: DD CB d 7D => BIT 7,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:7D MREQ RD | Memory read from 003 -> 7D #014H T10 AB:003 DB:7D MREQ RD | Memory read from 003 -> 7D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="7E">Opcode: DD CB d 7E => BIT 7,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:7E MREQ RD | Memory read from 003 -> 7E #014H T10 AB:003 DB:7E MREQ RD | Memory read from 003 -> 7E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="7F">Opcode: DD CB d 7F => BIT 7,(IX+d)*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:7F MREQ RD | Memory read from 003 -> 7F #014H T10 AB:003 DB:7F MREQ RD | Memory read from 003 -> 7F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | -----------------------------------------------------------+ </PRE> <H3 id="80">Opcode: DD CB d 80 => RES 0,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:80 MREQ RD | Memory read from 003 -> 80 #014H T10 AB:003 DB:80 MREQ RD | Memory read from 003 -> 80 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DC MREQ | #023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 <- DC -----------------------------------------------------------+ </PRE> <H3 id="81">Opcode: DD CB d 81 => RES 0,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:81 MREQ RD | Memory read from 003 -> 81 #014H T10 AB:003 DB:81 MREQ RD | Memory read from 003 -> 81 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DC MREQ | #023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 <- DC -----------------------------------------------------------+ </PRE> <H3 id="82">Opcode: DD CB d 82 => RES 0,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:82 MREQ RD | Memory read from 003 -> 82 #014H T10 AB:003 DB:82 MREQ RD | Memory read from 003 -> 82 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DC MREQ | #023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 <- DC -----------------------------------------------------------+ </PRE> <H3 id="83">Opcode: DD CB d 83 => RES 0,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:83 MREQ RD | Memory read from 003 -> 83 #014H T10 AB:003 DB:83 MREQ RD | Memory read from 003 -> 83 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DC MREQ | #023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 <- DC -----------------------------------------------------------+ </PRE> <H3 id="84">Opcode: DD CB d 84 => RES 0,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:84 MREQ RD | Memory read from 003 -> 84 #014H T10 AB:003 DB:84 MREQ RD | Memory read from 003 -> 84 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DC MREQ | #023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 <- DC -----------------------------------------------------------+ </PRE> <H3 id="85">Opcode: DD CB d 85 => RES 0,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:85 MREQ RD | Memory read from 003 -> 85 #014H T10 AB:003 DB:85 MREQ RD | Memory read from 003 -> 85 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DC MREQ | #023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 <- DC -----------------------------------------------------------+ </PRE> <H3 id="86">Opcode: DD CB d 86 => RES 0,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:86 MREQ RD | Memory read from 003 -> 86 #014H T10 AB:003 DB:86 MREQ RD | Memory read from 003 -> 86 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DC MREQ | #023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 <- DC -----------------------------------------------------------+ </PRE> <H3 id="87">Opcode: DD CB d 87 => RES 0,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:87 MREQ RD | Memory read from 003 -> 87 #014H T10 AB:003 DB:87 MREQ RD | Memory read from 003 -> 87 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DC MREQ | #023H T19 AB:000 DB:DC MREQ WR | Memory write to 000 <- DC -----------------------------------------------------------+ </PRE> <H3 id="88">Opcode: DD CB d 88 => RES 1,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:88 MREQ RD | Memory read from 003 -> 88 #014H T10 AB:003 DB:88 MREQ RD | Memory read from 003 -> 88 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="89">Opcode: DD CB d 89 => RES 1,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:89 MREQ RD | Memory read from 003 -> 89 #014H T10 AB:003 DB:89 MREQ RD | Memory read from 003 -> 89 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="8A">Opcode: DD CB d 8A => RES 1,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:8A MREQ RD | Memory read from 003 -> 8A #014H T10 AB:003 DB:8A MREQ RD | Memory read from 003 -> 8A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="8B">Opcode: DD CB d 8B => RES 1,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:8B MREQ RD | Memory read from 003 -> 8B #014H T10 AB:003 DB:8B MREQ RD | Memory read from 003 -> 8B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="8C">Opcode: DD CB d 8C => RES 1,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:8C MREQ RD | Memory read from 003 -> 8C #014H T10 AB:003 DB:8C MREQ RD | Memory read from 003 -> 8C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="8D">Opcode: DD CB d 8D => RES 1,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:8D MREQ RD | Memory read from 003 -> 8D #014H T10 AB:003 DB:8D MREQ RD | Memory read from 003 -> 8D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="8E">Opcode: DD CB d 8E => RES 1,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:8E MREQ RD | Memory read from 003 -> 8E #014H T10 AB:003 DB:8E MREQ RD | Memory read from 003 -> 8E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="8F">Opcode: DD CB d 8F => RES 1,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:8F MREQ RD | Memory read from 003 -> 8F #014H T10 AB:003 DB:8F MREQ RD | Memory read from 003 -> 8F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="90">Opcode: DD CB d 90 => RES 2,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:90 MREQ RD | Memory read from 003 -> 90 #014H T10 AB:003 DB:90 MREQ RD | Memory read from 003 -> 90 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D9 MREQ | #023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 <- D9 -----------------------------------------------------------+ </PRE> <H3 id="91">Opcode: DD CB d 91 => RES 2,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:91 MREQ RD | Memory read from 003 -> 91 #014H T10 AB:003 DB:91 MREQ RD | Memory read from 003 -> 91 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D9 MREQ | #023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 <- D9 -----------------------------------------------------------+ </PRE> <H3 id="92">Opcode: DD CB d 92 => RES 2,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:92 MREQ RD | Memory read from 003 -> 92 #014H T10 AB:003 DB:92 MREQ RD | Memory read from 003 -> 92 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D9 MREQ | #023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 <- D9 -----------------------------------------------------------+ </PRE> <H3 id="93">Opcode: DD CB d 93 => RES 2,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:93 MREQ RD | Memory read from 003 -> 93 #014H T10 AB:003 DB:93 MREQ RD | Memory read from 003 -> 93 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D9 MREQ | #023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 <- D9 -----------------------------------------------------------+ </PRE> <H3 id="94">Opcode: DD CB d 94 => RES 2,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:94 MREQ RD | Memory read from 003 -> 94 #014H T10 AB:003 DB:94 MREQ RD | Memory read from 003 -> 94 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D9 MREQ | #023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 <- D9 -----------------------------------------------------------+ </PRE> <H3 id="95">Opcode: DD CB d 95 => RES 2,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:95 MREQ RD | Memory read from 003 -> 95 #014H T10 AB:003 DB:95 MREQ RD | Memory read from 003 -> 95 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D9 MREQ | #023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 <- D9 -----------------------------------------------------------+ </PRE> <H3 id="96">Opcode: DD CB d 96 => RES 2,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:96 MREQ RD | Memory read from 003 -> 96 #014H T10 AB:003 DB:96 MREQ RD | Memory read from 003 -> 96 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D9 MREQ | #023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 <- D9 -----------------------------------------------------------+ </PRE> <H3 id="97">Opcode: DD CB d 97 => RES 2,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:97 MREQ RD | Memory read from 003 -> 97 #014H T10 AB:003 DB:97 MREQ RD | Memory read from 003 -> 97 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D9 MREQ | #023H T19 AB:000 DB:D9 MREQ WR | Memory write to 000 <- D9 -----------------------------------------------------------+ </PRE> <H3 id="98">Opcode: DD CB d 98 => RES 3,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:98 MREQ RD | Memory read from 003 -> 98 #014H T10 AB:003 DB:98 MREQ RD | Memory read from 003 -> 98 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D5 MREQ | #023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 <- D5 -----------------------------------------------------------+ </PRE> <H3 id="99">Opcode: DD CB d 99 => RES 3,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:99 MREQ RD | Memory read from 003 -> 99 #014H T10 AB:003 DB:99 MREQ RD | Memory read from 003 -> 99 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D5 MREQ | #023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 <- D5 -----------------------------------------------------------+ </PRE> <H3 id="9A">Opcode: DD CB d 9A => RES 3,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:9A MREQ RD | Memory read from 003 -> 9A #014H T10 AB:003 DB:9A MREQ RD | Memory read from 003 -> 9A #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D5 MREQ | #023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 <- D5 -----------------------------------------------------------+ </PRE> <H3 id="9B">Opcode: DD CB d 9B => RES 3,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:9B MREQ RD | Memory read from 003 -> 9B #014H T10 AB:003 DB:9B MREQ RD | Memory read from 003 -> 9B #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D5 MREQ | #023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 <- D5 -----------------------------------------------------------+ </PRE> <H3 id="9C">Opcode: DD CB d 9C => RES 3,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:9C MREQ RD | Memory read from 003 -> 9C #014H T10 AB:003 DB:9C MREQ RD | Memory read from 003 -> 9C #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D5 MREQ | #023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 <- D5 -----------------------------------------------------------+ </PRE> <H3 id="9D">Opcode: DD CB d 9D => RES 3,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:9D MREQ RD | Memory read from 003 -> 9D #014H T10 AB:003 DB:9D MREQ RD | Memory read from 003 -> 9D #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D5 MREQ | #023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 <- D5 -----------------------------------------------------------+ </PRE> <H3 id="9E">Opcode: DD CB d 9E => RES 3,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:9E MREQ RD | Memory read from 003 -> 9E #014H T10 AB:003 DB:9E MREQ RD | Memory read from 003 -> 9E #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D5 MREQ | #023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 <- D5 -----------------------------------------------------------+ </PRE> <H3 id="9F">Opcode: DD CB d 9F => RES 3,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:9F MREQ RD | Memory read from 003 -> 9F #014H T10 AB:003 DB:9F MREQ RD | Memory read from 003 -> 9F #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:D5 MREQ | #023H T19 AB:000 DB:D5 MREQ WR | Memory write to 000 <- D5 -----------------------------------------------------------+ </PRE> <H3 id="A0">Opcode: DD CB d A0 => RES 4,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A0 MREQ RD | Memory read from 003 -> A0 #014H T10 AB:003 DB:A0 MREQ RD | Memory read from 003 -> A0 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:CD MREQ | #023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 <- CD -----------------------------------------------------------+ </PRE> <H3 id="A1">Opcode: DD CB d A1 => RES 4,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A1 MREQ RD | Memory read from 003 -> A1 #014H T10 AB:003 DB:A1 MREQ RD | Memory read from 003 -> A1 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:CD MREQ | #023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 <- CD -----------------------------------------------------------+ </PRE> <H3 id="A2">Opcode: DD CB d A2 => RES 4,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A2 MREQ RD | Memory read from 003 -> A2 #014H T10 AB:003 DB:A2 MREQ RD | Memory read from 003 -> A2 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:CD MREQ | #023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 <- CD -----------------------------------------------------------+ </PRE> <H3 id="A3">Opcode: DD CB d A3 => RES 4,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A3 MREQ RD | Memory read from 003 -> A3 #014H T10 AB:003 DB:A3 MREQ RD | Memory read from 003 -> A3 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:CD MREQ | #023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 <- CD -----------------------------------------------------------+ </PRE> <H3 id="A4">Opcode: DD CB d A4 => RES 4,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A4 MREQ RD | Memory read from 003 -> A4 #014H T10 AB:003 DB:A4 MREQ RD | Memory read from 003 -> A4 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:CD MREQ | #023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 <- CD -----------------------------------------------------------+ </PRE> <H3 id="A5">Opcode: DD CB d A5 => RES 4,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A5 MREQ RD | Memory read from 003 -> A5 #014H T10 AB:003 DB:A5 MREQ RD | Memory read from 003 -> A5 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:CD MREQ | #023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 <- CD -----------------------------------------------------------+ </PRE> <H3 id="A6">Opcode: DD CB d A6 => RES 4,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A6 MREQ RD | Memory read from 003 -> A6 #014H T10 AB:003 DB:A6 MREQ RD | Memory read from 003 -> A6 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:CD MREQ | #023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 <- CD -----------------------------------------------------------+ </PRE> <H3 id="A7">Opcode: DD CB d A7 => RES 4,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A7 MREQ RD | Memory read from 003 -> A7 #014H T10 AB:003 DB:A7 MREQ RD | Memory read from 003 -> A7 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:CD MREQ | #023H T19 AB:000 DB:CD MREQ WR | Memory write to 000 <- CD -----------------------------------------------------------+ </PRE> <H3 id="A8">Opcode: DD CB d A8 => RES 5,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A8 MREQ RD | Memory read from 003 -> A8 #014H T10 AB:003 DB:A8 MREQ RD | Memory read from 003 -> A8 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="A9">Opcode: DD CB d A9 => RES 5,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:A9 MREQ RD | Memory read from 003 -> A9 #014H T10 AB:003 DB:A9 MREQ RD | Memory read from 003 -> A9 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="AA">Opcode: DD CB d AA => RES 5,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:AA MREQ RD | Memory read from 003 -> AA #014H T10 AB:003 DB:AA MREQ RD | Memory read from 003 -> AA #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="AB">Opcode: DD CB d AB => RES 5,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:AB MREQ RD | Memory read from 003 -> AB #014H T10 AB:003 DB:AB MREQ RD | Memory read from 003 -> AB #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="AC">Opcode: DD CB d AC => RES 5,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:AC MREQ RD | Memory read from 003 -> AC #014H T10 AB:003 DB:AC MREQ RD | Memory read from 003 -> AC #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="AD">Opcode: DD CB d AD => RES 5,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:AD MREQ RD | Memory read from 003 -> AD #014H T10 AB:003 DB:AD MREQ RD | Memory read from 003 -> AD #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="AE">Opcode: DD CB d AE => RES 5,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:AE MREQ RD | Memory read from 003 -> AE #014H T10 AB:003 DB:AE MREQ RD | Memory read from 003 -> AE #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="AF">Opcode: DD CB d AF => RES 5,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:AF MREQ RD | Memory read from 003 -> AF #014H T10 AB:003 DB:AF MREQ RD | Memory read from 003 -> AF #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="B0">Opcode: DD CB d B0 => RES 6,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B0 MREQ RD | Memory read from 003 -> B0 #014H T10 AB:003 DB:B0 MREQ RD | Memory read from 003 -> B0 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:9D MREQ | #023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 <- 9D -----------------------------------------------------------+ </PRE> <H3 id="B1">Opcode: DD CB d B1 => RES 6,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B1 MREQ RD | Memory read from 003 -> B1 #014H T10 AB:003 DB:B1 MREQ RD | Memory read from 003 -> B1 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:9D MREQ | #023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 <- 9D -----------------------------------------------------------+ </PRE> <H3 id="B2">Opcode: DD CB d B2 => RES 6,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B2 MREQ RD | Memory read from 003 -> B2 #014H T10 AB:003 DB:B2 MREQ RD | Memory read from 003 -> B2 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:9D MREQ | #023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 <- 9D -----------------------------------------------------------+ </PRE> <H3 id="B3">Opcode: DD CB d B3 => RES 6,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B3 MREQ RD | Memory read from 003 -> B3 #014H T10 AB:003 DB:B3 MREQ RD | Memory read from 003 -> B3 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:9D MREQ | #023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 <- 9D -----------------------------------------------------------+ </PRE> <H3 id="B4">Opcode: DD CB d B4 => RES 6,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B4 MREQ RD | Memory read from 003 -> B4 #014H T10 AB:003 DB:B4 MREQ RD | Memory read from 003 -> B4 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:9D MREQ | #023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 <- 9D -----------------------------------------------------------+ </PRE> <H3 id="B5">Opcode: DD CB d B5 => RES 6,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B5 MREQ RD | Memory read from 003 -> B5 #014H T10 AB:003 DB:B5 MREQ RD | Memory read from 003 -> B5 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:9D MREQ | #023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 <- 9D -----------------------------------------------------------+ </PRE> <H3 id="B6">Opcode: DD CB d B6 => RES 6,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B6 MREQ RD | Memory read from 003 -> B6 #014H T10 AB:003 DB:B6 MREQ RD | Memory read from 003 -> B6 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:9D MREQ | #023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 <- 9D -----------------------------------------------------------+ </PRE> <H3 id="B7">Opcode: DD CB d B7 => RES 6,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B7 MREQ RD | Memory read from 003 -> B7 #014H T10 AB:003 DB:B7 MREQ RD | Memory read from 003 -> B7 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:9D MREQ | #023H T19 AB:000 DB:9D MREQ WR | Memory write to 000 <- 9D -----------------------------------------------------------+ </PRE> <H3 id="B8">Opcode: DD CB d B8 => RES 7,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B8 MREQ RD | Memory read from 003 -> B8 #014H T10 AB:003 DB:B8 MREQ RD | Memory read from 003 -> B8 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:5D MREQ | #023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 <- 5D -----------------------------------------------------------+ </PRE> <H3 id="B9">Opcode: DD CB d B9 => RES 7,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:B9 MREQ RD | Memory read from 003 -> B9 #014H T10 AB:003 DB:B9 MREQ RD | Memory read from 003 -> B9 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:5D MREQ | #023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 <- 5D -----------------------------------------------------------+ </PRE> <H3 id="BA">Opcode: DD CB d BA => RES 7,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:BA MREQ RD | Memory read from 003 -> BA #014H T10 AB:003 DB:BA MREQ RD | Memory read from 003 -> BA #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:5D MREQ | #023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 <- 5D -----------------------------------------------------------+ </PRE> <H3 id="BB">Opcode: DD CB d BB => RES 7,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:BB MREQ RD | Memory read from 003 -> BB #014H T10 AB:003 DB:BB MREQ RD | Memory read from 003 -> BB #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:5D MREQ | #023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 <- 5D -----------------------------------------------------------+ </PRE> <H3 id="BC">Opcode: DD CB d BC => RES 7,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:BC MREQ RD | Memory read from 003 -> BC #014H T10 AB:003 DB:BC MREQ RD | Memory read from 003 -> BC #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:5D MREQ | #023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 <- 5D -----------------------------------------------------------+ </PRE> <H3 id="BD">Opcode: DD CB d BD => RES 7,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:BD MREQ RD | Memory read from 003 -> BD #014H T10 AB:003 DB:BD MREQ RD | Memory read from 003 -> BD #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:5D MREQ | #023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 <- 5D -----------------------------------------------------------+ </PRE> <H3 id="BE">Opcode: DD CB d BE => RES 7,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:BE MREQ RD | Memory read from 003 -> BE #014H T10 AB:003 DB:BE MREQ RD | Memory read from 003 -> BE #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:5D MREQ | #023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 <- 5D -----------------------------------------------------------+ </PRE> <H3 id="BF">Opcode: DD CB d BF => RES 7,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:BF MREQ RD | Memory read from 003 -> BF #014H T10 AB:003 DB:BF MREQ RD | Memory read from 003 -> BF #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:5D MREQ | #023H T19 AB:000 DB:5D MREQ WR | Memory write to 000 <- 5D -----------------------------------------------------------+ </PRE> <H3 id="C0">Opcode: DD CB d C0 => SET 0,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C0 MREQ RD | Memory read from 003 -> C0 #014H T10 AB:003 DB:C0 MREQ RD | Memory read from 003 -> C0 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="C1">Opcode: DD CB d C1 => SET 0,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C1 MREQ RD | Memory read from 003 -> C1 #014H T10 AB:003 DB:C1 MREQ RD | Memory read from 003 -> C1 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="C2">Opcode: DD CB d C2 => SET 0,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C2 MREQ RD | Memory read from 003 -> C2 #014H T10 AB:003 DB:C2 MREQ RD | Memory read from 003 -> C2 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="C3">Opcode: DD CB d C3 => SET 0,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C3 MREQ RD | Memory read from 003 -> C3 #014H T10 AB:003 DB:C3 MREQ RD | Memory read from 003 -> C3 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="C4">Opcode: DD CB d C4 => SET 0,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C4 MREQ RD | Memory read from 003 -> C4 #014H T10 AB:003 DB:C4 MREQ RD | Memory read from 003 -> C4 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="C5">Opcode: DD CB d C5 => SET 0,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C5 MREQ RD | Memory read from 003 -> C5 #014H T10 AB:003 DB:C5 MREQ RD | Memory read from 003 -> C5 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="C6">Opcode: DD CB d C6 => SET 0,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C6 MREQ RD | Memory read from 003 -> C6 #014H T10 AB:003 DB:C6 MREQ RD | Memory read from 003 -> C6 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="C7">Opcode: DD CB d C7 => SET 0,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C7 MREQ RD | Memory read from 003 -> C7 #014H T10 AB:003 DB:C7 MREQ RD | Memory read from 003 -> C7 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="C8">Opcode: DD CB d C8 => SET 1,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C8 MREQ RD | Memory read from 003 -> C8 #014H T10 AB:003 DB:C8 MREQ RD | Memory read from 003 -> C8 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DF MREQ | #023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 <- DF -----------------------------------------------------------+ </PRE> <H3 id="C9">Opcode: DD CB d C9 => SET 1,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:C9 MREQ RD | Memory read from 003 -> C9 #014H T10 AB:003 DB:C9 MREQ RD | Memory read from 003 -> C9 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DF MREQ | #023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 <- DF -----------------------------------------------------------+ </PRE> <H3 id="CA">Opcode: DD CB d CA => SET 1,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:CA MREQ RD | Memory read from 003 -> CA #014H T10 AB:003 DB:CA MREQ RD | Memory read from 003 -> CA #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DF MREQ | #023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 <- DF -----------------------------------------------------------+ </PRE> <H3 id="CB">Opcode: DD CB d CB => SET 1,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:CB MREQ RD | Memory read from 003 -> CB #014H T10 AB:003 DB:CB MREQ RD | Memory read from 003 -> CB #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DF MREQ | #023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 <- DF -----------------------------------------------------------+ </PRE> <H3 id="CC">Opcode: DD CB d CC => SET 1,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:CC MREQ RD | Memory read from 003 -> CC #014H T10 AB:003 DB:CC MREQ RD | Memory read from 003 -> CC #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DF MREQ | #023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 <- DF -----------------------------------------------------------+ </PRE> <H3 id="CD">Opcode: DD CB d CD => SET 1,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:CD MREQ RD | Memory read from 003 -> CD #014H T10 AB:003 DB:CD MREQ RD | Memory read from 003 -> CD #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DF MREQ | #023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 <- DF -----------------------------------------------------------+ </PRE> <H3 id="CE">Opcode: DD CB d CE => SET 1,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:CE MREQ RD | Memory read from 003 -> CE #014H T10 AB:003 DB:CE MREQ RD | Memory read from 003 -> CE #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DF MREQ | #023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 <- DF -----------------------------------------------------------+ </PRE> <H3 id="CF">Opcode: DD CB d CF => SET 1,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:CF MREQ RD | Memory read from 003 -> CF #014H T10 AB:003 DB:CF MREQ RD | Memory read from 003 -> CF #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DF MREQ | #023H T19 AB:000 DB:DF MREQ WR | Memory write to 000 <- DF -----------------------------------------------------------+ </PRE> <H3 id="D0">Opcode: DD CB d D0 => SET 2,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D0 MREQ RD | Memory read from 003 -> D0 #014H T10 AB:003 DB:D0 MREQ RD | Memory read from 003 -> D0 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D1">Opcode: DD CB d D1 => SET 2,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D1 MREQ RD | Memory read from 003 -> D1 #014H T10 AB:003 DB:D1 MREQ RD | Memory read from 003 -> D1 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D2">Opcode: DD CB d D2 => SET 2,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D2 MREQ RD | Memory read from 003 -> D2 #014H T10 AB:003 DB:D2 MREQ RD | Memory read from 003 -> D2 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D3">Opcode: DD CB d D3 => SET 2,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D3 MREQ RD | Memory read from 003 -> D3 #014H T10 AB:003 DB:D3 MREQ RD | Memory read from 003 -> D3 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D4">Opcode: DD CB d D4 => SET 2,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D4 MREQ RD | Memory read from 003 -> D4 #014H T10 AB:003 DB:D4 MREQ RD | Memory read from 003 -> D4 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D5">Opcode: DD CB d D5 => SET 2,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D5 MREQ RD | Memory read from 003 -> D5 #014H T10 AB:003 DB:D5 MREQ RD | Memory read from 003 -> D5 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D6">Opcode: DD CB d D6 => SET 2,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D6 MREQ RD | Memory read from 003 -> D6 #014H T10 AB:003 DB:D6 MREQ RD | Memory read from 003 -> D6 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D7">Opcode: DD CB d D7 => SET 2,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D7 MREQ RD | Memory read from 003 -> D7 #014H T10 AB:003 DB:D7 MREQ RD | Memory read from 003 -> D7 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D8">Opcode: DD CB d D8 => SET 3,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D8 MREQ RD | Memory read from 003 -> D8 #014H T10 AB:003 DB:D8 MREQ RD | Memory read from 003 -> D8 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="D9">Opcode: DD CB d D9 => SET 3,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:D9 MREQ RD | Memory read from 003 -> D9 #014H T10 AB:003 DB:D9 MREQ RD | Memory read from 003 -> D9 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="DA">Opcode: DD CB d DA => SET 3,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:DA MREQ RD | Memory read from 003 -> DA #014H T10 AB:003 DB:DA MREQ RD | Memory read from 003 -> DA #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="DB">Opcode: DD CB d DB => SET 3,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:DB MREQ RD | Memory read from 003 -> DB #014H T10 AB:003 DB:DB MREQ RD | Memory read from 003 -> DB #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="DC">Opcode: DD CB d DC => SET 3,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:DC MREQ RD | Memory read from 003 -> DC #014H T10 AB:003 DB:DC MREQ RD | Memory read from 003 -> DC #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="DD">Opcode: DD CB d DD => SET 3,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:DD MREQ RD | Memory read from 003 -> DD #014H T10 AB:003 DB:DD MREQ RD | Memory read from 003 -> DD #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="DE">Opcode: DD CB d DE => SET 3,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:DE MREQ RD | Memory read from 003 -> DE #014H T10 AB:003 DB:DE MREQ RD | Memory read from 003 -> DE #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="DF">Opcode: DD CB d DF => SET 3,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:DF MREQ RD | Memory read from 003 -> DF #014H T10 AB:003 DB:DF MREQ RD | Memory read from 003 -> DF #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E0">Opcode: DD CB d E0 => SET 4,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E0 MREQ RD | Memory read from 003 -> E0 #014H T10 AB:003 DB:E0 MREQ RD | Memory read from 003 -> E0 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E1">Opcode: DD CB d E1 => SET 4,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E1 MREQ RD | Memory read from 003 -> E1 #014H T10 AB:003 DB:E1 MREQ RD | Memory read from 003 -> E1 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E2">Opcode: DD CB d E2 => SET 4,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E2 MREQ RD | Memory read from 003 -> E2 #014H T10 AB:003 DB:E2 MREQ RD | Memory read from 003 -> E2 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E3">Opcode: DD CB d E3 => SET 4,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E3 MREQ RD | Memory read from 003 -> E3 #014H T10 AB:003 DB:E3 MREQ RD | Memory read from 003 -> E3 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E4">Opcode: DD CB d E4 => SET 4,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E4 MREQ RD | Memory read from 003 -> E4 #014H T10 AB:003 DB:E4 MREQ RD | Memory read from 003 -> E4 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E5">Opcode: DD CB d E5 => SET 4,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E5 MREQ RD | Memory read from 003 -> E5 #014H T10 AB:003 DB:E5 MREQ RD | Memory read from 003 -> E5 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E6">Opcode: DD CB d E6 => SET 4,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E6 MREQ RD | Memory read from 003 -> E6 #014H T10 AB:003 DB:E6 MREQ RD | Memory read from 003 -> E6 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E7">Opcode: DD CB d E7 => SET 4,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E7 MREQ RD | Memory read from 003 -> E7 #014H T10 AB:003 DB:E7 MREQ RD | Memory read from 003 -> E7 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="E8">Opcode: DD CB d E8 => SET 5,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E8 MREQ RD | Memory read from 003 -> E8 #014H T10 AB:003 DB:E8 MREQ RD | Memory read from 003 -> E8 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:FD MREQ | #023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 <- FD -----------------------------------------------------------+ </PRE> <H3 id="E9">Opcode: DD CB d E9 => SET 5,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:E9 MREQ RD | Memory read from 003 -> E9 #014H T10 AB:003 DB:E9 MREQ RD | Memory read from 003 -> E9 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:FD MREQ | #023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 <- FD -----------------------------------------------------------+ </PRE> <H3 id="EA">Opcode: DD CB d EA => SET 5,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:EA MREQ RD | Memory read from 003 -> EA #014H T10 AB:003 DB:EA MREQ RD | Memory read from 003 -> EA #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:FD MREQ | #023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 <- FD -----------------------------------------------------------+ </PRE> <H3 id="EB">Opcode: DD CB d EB => SET 5,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:EB MREQ RD | Memory read from 003 -> EB #014H T10 AB:003 DB:EB MREQ RD | Memory read from 003 -> EB #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:FD MREQ | #023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 <- FD -----------------------------------------------------------+ </PRE> <H3 id="EC">Opcode: DD CB d EC => SET 5,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:EC MREQ RD | Memory read from 003 -> EC #014H T10 AB:003 DB:EC MREQ RD | Memory read from 003 -> EC #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:FD MREQ | #023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 <- FD -----------------------------------------------------------+ </PRE> <H3 id="ED">Opcode: DD CB d ED => SET 5,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:ED MREQ RD | Memory read from 003 -> ED #014H T10 AB:003 DB:ED MREQ RD | Memory read from 003 -> ED #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:FD MREQ | #023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 <- FD -----------------------------------------------------------+ </PRE> <H3 id="EE">Opcode: DD CB d EE => SET 5,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:EE MREQ RD | Memory read from 003 -> EE #014H T10 AB:003 DB:EE MREQ RD | Memory read from 003 -> EE #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:FD MREQ | #023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 <- FD -----------------------------------------------------------+ </PRE> <H3 id="EF">Opcode: DD CB d EF => SET 5,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:EF MREQ RD | Memory read from 003 -> EF #014H T10 AB:003 DB:EF MREQ RD | Memory read from 003 -> EF #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:FD MREQ | #023H T19 AB:000 DB:FD MREQ WR | Memory write to 000 <- FD -----------------------------------------------------------+ </PRE> <H3 id="F0">Opcode: DD CB d F0 => SET 6,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F0 MREQ RD | Memory read from 003 -> F0 #014H T10 AB:003 DB:F0 MREQ RD | Memory read from 003 -> F0 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F1">Opcode: DD CB d F1 => SET 6,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F1 MREQ RD | Memory read from 003 -> F1 #014H T10 AB:003 DB:F1 MREQ RD | Memory read from 003 -> F1 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F2">Opcode: DD CB d F2 => SET 6,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F2 MREQ RD | Memory read from 003 -> F2 #014H T10 AB:003 DB:F2 MREQ RD | Memory read from 003 -> F2 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F3">Opcode: DD CB d F3 => SET 6,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F3 MREQ RD | Memory read from 003 -> F3 #014H T10 AB:003 DB:F3 MREQ RD | Memory read from 003 -> F3 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F4">Opcode: DD CB d F4 => SET 6,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F4 MREQ RD | Memory read from 003 -> F4 #014H T10 AB:003 DB:F4 MREQ RD | Memory read from 003 -> F4 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F5">Opcode: DD CB d F5 => SET 6,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F5 MREQ RD | Memory read from 003 -> F5 #014H T10 AB:003 DB:F5 MREQ RD | Memory read from 003 -> F5 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F6">Opcode: DD CB d F6 => SET 6,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F6 MREQ RD | Memory read from 003 -> F6 #014H T10 AB:003 DB:F6 MREQ RD | Memory read from 003 -> F6 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F7">Opcode: DD CB d F7 => SET 6,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F7 MREQ RD | Memory read from 003 -> F7 #014H T10 AB:003 DB:F7 MREQ RD | Memory read from 003 -> F7 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F8">Opcode: DD CB d F8 => SET 7,(IX+d),B*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F8 MREQ RD | Memory read from 003 -> F8 #014H T10 AB:003 DB:F8 MREQ RD | Memory read from 003 -> F8 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="F9">Opcode: DD CB d F9 => SET 7,(IX+d),C*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:F9 MREQ RD | Memory read from 003 -> F9 #014H T10 AB:003 DB:F9 MREQ RD | Memory read from 003 -> F9 #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="FA">Opcode: DD CB d FA => SET 7,(IX+d),D*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:FA MREQ RD | Memory read from 003 -> FA #014H T10 AB:003 DB:FA MREQ RD | Memory read from 003 -> FA #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="FB">Opcode: DD CB d FB => SET 7,(IX+d),E*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:FB MREQ RD | Memory read from 003 -> FB #014H T10 AB:003 DB:FB MREQ RD | Memory read from 003 -> FB #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="FC">Opcode: DD CB d FC => SET 7,(IX+d),H*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:FC MREQ RD | Memory read from 003 -> FC #014H T10 AB:003 DB:FC MREQ RD | Memory read from 003 -> FC #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="FD">Opcode: DD CB d FD => SET 7,(IX+d),L*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:FD MREQ RD | Memory read from 003 -> FD #014H T10 AB:003 DB:FD MREQ RD | Memory read from 003 -> FD #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="FE">Opcode: DD CB d FE => SET 7,(IX+d)</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:FE MREQ RD | Memory read from 003 -> FE #014H T10 AB:003 DB:FE MREQ RD | Memory read from 003 -> FE #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> <H3 id="FF">Opcode: DD CB d FF => SET 7,(IX+d),A*</H3> <PRE> -----------------------------------------------------------+ #001H T1 AB:000 DB:-- M1 | #002H T2 AB:000 DB:DD M1 MREQ RD | Opcode read from 000 -> DD #003H T3 AB:000 DB:-- RFSH | #004H T4 AB:000 DB:-- RFSH MREQ | Refresh address 000 -----------------------------------------------------------+ #005H T1 AB:001 DB:-- M1 | #006H T2 AB:001 DB:CB M1 MREQ RD | Opcode read from 001 -> CB #007H T3 AB:001 DB:-- RFSH | #008H T4 AB:001 DB:-- RFSH MREQ | Refresh address 001 #009H T5 AB:002 DB:-- | #010H T6 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #011H T7 AB:002 DB:01 MREQ RD | Memory read from 002 -> 01 #012H T8 AB:003 DB:-- | #013H T9 AB:003 DB:FF MREQ RD | Memory read from 003 -> FF #014H T10 AB:003 DB:FF MREQ RD | Memory read from 003 -> FF #015H T11 AB:003 DB:-- | #016H T12 AB:003 DB:-- | #017H T13 AB:000 DB:-- | #018H T14 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #019H T15 AB:000 DB:DD MREQ RD | Memory read from 000 -> DD #020H T16 AB:000 DB:-- | #021H T17 AB:000 DB:-- | #022H T18 AB:000 DB:DD MREQ | #023H T19 AB:000 DB:DD MREQ WR | Memory write to 000 <- DD -----------------------------------------------------------+ </PRE> </BODY></HTML>