URL
https://opencores.org/ocsvn/aes-128-ecb-encoder/aes-128-ecb-encoder/trunk
Subversion Repositories aes-128-ecb-encoder
[/] [aes-128-ecb-encoder/] [trunk/] [fpga/] [aes128_ecb_2017/] [aes128_ecb.ip_user_files/] [sim_scripts/] [clk_gen/] [vcs/] [clk_gen.sh] - Rev 2
Compare with Previous | Blame | View Log
#!/bin/bash -f #********************************************************************************************************* # Vivado (TM) v2017.4 (64-bit) # # Filename : clk_gen.sh # Simulator : Synopsys Verilog Compiler Simulator # Description : Simulation script for compiling, elaborating and verifying the project source files. # The script will automatically create the design libraries sub-directories in the run # directory, add the library logical mappings in the simulator setup file, create default # 'do/prj' file, execute compilation, elaboration and simulation steps. # # Generated by Vivado on Thu Jul 23 09:42:11 MSK 2020 # SW Build 2086221 on Fri Dec 15 20:54:30 MST 2017 # # Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. # # usage: clk_gen.sh [-help] # usage: clk_gen.sh [-lib_map_path] # usage: clk_gen.sh [-noclean_files] # usage: clk_gen.sh [-reset_run] # # Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the # 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the # Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch # that points to these libraries and rerun export_simulation. For more information about this switch please # type 'export_simulation -help' in the Tcl shell. # # You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this # script with the compiled library directory path or specify this path with the '-lib_map_path' switch when # executing this script. Please type 'clk_gen.sh -help' for more information. # # Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)' # #********************************************************************************************************* # Directory path for design sources and include directories (if any) wrt this path ref_dir="." # Override directory with 'export_sim_ref_dir' env path value if set in the shell if [[ (! -z "$export_sim_ref_dir") && ($export_sim_ref_dir != "") ]]; then ref_dir="$export_sim_ref_dir" fi # Command line options vlogan_opts="-full64" vhdlan_opts="-full64" vcs_elab_opts="-full64 -debug_pp -t ps -licqueue -l elaborate.log" vcs_sim_opts="-ucli -licqueue -l simulate.log" # Design libraries design_libs=(xil_defaultlib xpm) # Simulation root library directory sim_lib_dir="vcs_lib" # Script info echo -e "clk_gen.sh - Script generated by export_simulation (Vivado v2017.4 (64-bit)-id)\n" # Main steps run() { check_args $# $1 setup $1 $2 compile elaborate simulate } # RUN_STEP: <compile> compile() { # Compile design files vlogan -work xil_defaultlib $vlogan_opts -sverilog +incdir+"$ref_dir/../../../ipstatic" +incdir+"/opt/cad/xilinx/Vivado2017/Vivado/2017.4/data/xilinx_vip/include" \ "/opt/cad/xilinx/Vivado2017/Vivado/2017.4/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv" \ 2>&1 | tee -a vlogan.log vhdlan -work xpm $vhdlan_opts \ "/opt/cad/xilinx/Vivado2017/Vivado/2017.4/data/ip/xpm/xpm_VCOMP.vhd" \ 2>&1 | tee -a vhdlan.log vlogan -work xil_defaultlib $vlogan_opts +v2k +incdir+"$ref_dir/../../../ipstatic" +incdir+"/opt/cad/xilinx/Vivado2017/Vivado/2017.4/data/xilinx_vip/include" \ "$ref_dir/../../../../aes128_ecb.srcs/sources_1/ip/clk_gen/clk_gen_clk_wiz.v" \ "$ref_dir/../../../../aes128_ecb.srcs/sources_1/ip/clk_gen/clk_gen.v" \ 2>&1 | tee -a vlogan.log vlogan -work xil_defaultlib $vlogan_opts +v2k \ glbl.v \ 2>&1 | tee -a vlogan.log } # RUN_STEP: <elaborate> elaborate() { vcs $vcs_elab_opts xil_defaultlib.clk_gen xil_defaultlib.glbl -o clk_gen_simv } # RUN_STEP: <simulate> simulate() { ./clk_gen_simv $vcs_sim_opts -do simulate.do } # STEP: setup setup() { case $1 in "-lib_map_path" ) if [[ ($2 == "") ]]; then echo -e "ERROR: Simulation library directory path not specified (type \"./clk_gen.sh -help\" for more information)\n" exit 1 fi create_lib_mappings $2 ;; "-reset_run" ) reset_run echo -e "INFO: Simulation run files deleted.\n" exit 0 ;; "-noclean_files" ) # do not remove previous data ;; * ) create_lib_mappings $2 esac create_lib_dir # Add any setup/initialization commands here:- # <user specific commands> } # Define design library mappings create_lib_mappings() { file="synopsys_sim.setup" if [[ -e $file ]]; then if [[ ($1 == "") ]]; then return else rm -rf $file fi fi touch $file lib_map_path="<SPECIFY_COMPILED_LIB_PATH>" if [[ ($1 != "" && -e $1) ]]; then lib_map_path="$1" else echo -e "ERROR: Compiled simulation library directory path not specified or does not exist (type "./top.sh -help" for more information)\n" fi for (( i=0; i<${#design_libs[*]}; i++ )); do lib="${design_libs[i]}" mapping="$lib:$sim_lib_dir/$lib" echo $mapping >> $file done if [[ ($lib_map_path != "") ]]; then incl_ref="OTHERS=$lib_map_path/synopsys_sim.setup" echo $incl_ref >> $file fi } # Create design library directory paths create_lib_dir() { if [[ -e $sim_lib_dir ]]; then rm -rf $sim_lib_dir fi for (( i=0; i<${#design_libs[*]}; i++ )); do lib="${design_libs[i]}" lib_dir="$sim_lib_dir/$lib" if [[ ! -e $lib_dir ]]; then mkdir -p $lib_dir fi done } # Delete generated data from the previous run reset_run() { files_to_remove=(ucli.key clk_gen_simv vlogan.log vhdlan.log compile.log elaborate.log simulate.log .vlogansetup.env .vlogansetup.args .vcs_lib_lock scirocco_command.log 64 AN.DB csrc clk_gen_simv.daidir) for (( i=0; i<${#files_to_remove[*]}; i++ )); do file="${files_to_remove[i]}" if [[ -e $file ]]; then rm -rf $file fi done create_lib_dir } # Check command line arguments check_args() { if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then echo -e "ERROR: Unknown option specified '$2' (type \"./clk_gen.sh -help\" for more information)\n" exit 1 fi if [[ ($2 == "-help" || $2 == "-h") ]]; then usage fi } # Script usage usage() { msg="Usage: clk_gen.sh [-help]\n\ Usage: clk_gen.sh [-lib_map_path]\n\ Usage: clk_gen.sh [-reset_run]\n\ Usage: clk_gen.sh [-noclean_files]\n\n\ [-help] -- Print help information for this script\n\n\ [-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\ using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\ [-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\ from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\ -noclean_files switch.\n\n\ [-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n" echo -e $msg exit 1 } # Launch script run $1 $2