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[/] [aes-128_pipelined_encryption/] [trunk/] [reports/] [Top_PipelinedCipher_map.mrp] - Rev 2
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Release 12.1 Map M.53d (nt64)Xilinx Mapping Report File for Design 'Top_PipelinedCipher'Design Information------------------Command Line : map -intstyle ise -p xc6vcx240t-ff784-2 -w -ol high -t 1 -xt 0-register_duplication off -global_opt off -ir off -pr off -lc off -power off -oTop_PipelinedCipher_map.ncd Top_PipelinedCipher.ngd Top_PipelinedCipher.pcfTarget Device : xc6vcx240tTarget Package : ff784Target Speed : -2Mapper Version : virtex6 -- $Revision: 1.52 $Mapped Date : Wed Jul 17 15:14:08 2013Design Summary--------------Number of errors: 0Number of warnings: 0Slice Logic Utilization:Number of Slice Registers: 10,769 out of 301,440 3%Number used as Flip Flops: 10,769Number used as Latches: 0Number used as Latch-thrus: 0Number used as AND/OR logics: 0Number of Slice LUTs: 12,475 out of 150,720 8%Number used as logic: 9,842 out of 150,720 6%Number using O6 output only: 9,081Number using O5 output only: 0Number using O5 and O6: 761Number used as ROM: 0Number used as Memory: 0 out of 58,400 0%Number used exclusively as route-thrus: 2,633Number with same-slice register load: 2,633Number with same-slice carry load: 0Number with other load: 0Slice Logic Distribution:Number of occupied Slices: 3,214 out of 37,680 8%Number of LUT Flip Flop pairs used: 12,527Number with an unused Flip Flop: 5,031 out of 12,527 40%Number with an unused LUT: 52 out of 12,527 1%Number of fully used LUT-FF pairs: 7,444 out of 12,527 59%Number of unique control sets: 82Number of slice register sites lostto control set restrictions: 7 out of 301,440 1%A LUT Flip Flop pair for this architecture represents one LUT paired withone Flip Flop within a slice. A control set is a unique combination ofclock, reset, set, and enable signals for a registered element.The Slice Logic Distribution report is not meaningful if the design isover-mapped for a non-slice resource or if Placement fails.OVERMAPPING of BRAM resources should be ignored if the design isover-mapped for a non-BRAM resource or if placement fails.IO Utilization:Number of bonded IOBs: 389 out of 400 97%Specific Feature Utilization:Number of RAMB36E1/FIFO36E1s: 0 out of 416 0%Number of RAMB18E1/FIFO18E1s: 0 out of 832 0%Number of BUFG/BUFGCTRLs: 2 out of 32 6%Number used as BUFGs: 2Number used as BUFGCTRLs: 0Number of ILOGICE1/ISERDESE1s: 0 out of 720 0%Number of OLOGICE1/OSERDESE1s: 0 out of 720 0%Number of BSCANs: 0 out of 4 0%Number of BUFHCEs: 0 out of 144 0%Number of BUFOs: 0 out of 36 0%Number of BUFIODQSs: 0 out of 72 0%Number of BUFRs: 0 out of 36 0%Number of CAPTUREs: 0 out of 1 0%Number of DSP48E1s: 0 out of 768 0%Number of EFUSE_USRs: 0 out of 1 0%Number of GTXE1s: 0 out of 12 0%Number of IBUFDS_GTXE1s: 0 out of 8 0%Number of ICAPs: 0 out of 2 0%Number of IDELAYCTRLs: 0 out of 18 0%Number of IODELAYE1s: 0 out of 720 0%Number of MMCM_ADVs: 0 out of 12 0%Number of PCIE_2_0s: 0 out of 2 0%Number of STARTUPs: 1 out of 1 100%Number of SYSMONs: 0 out of 1 0%Number of TEMAC_SINGLEs: 0 out of 1 0%Average Fanout of Non-Clock Nets: 7.45Peak Memory Usage: 1019 MBTotal REAL time to MAP completion: 3 mins 28 secsTotal CPU time to MAP completion: 3 mins 19 secsTable of Contents-----------------Section 1 - ErrorsSection 2 - WarningsSection 3 - InformationalSection 4 - Removed Logic SummarySection 5 - Removed LogicSection 6 - IOB PropertiesSection 7 - RPMsSection 8 - Guide ReportSection 9 - Area Group and Partition SummarySection 10 - Timing ReportSection 11 - Configuration String InformationSection 12 - Control Set InformationSection 13 - Utilization by HierarchySection 1 - Errors------------------Section 2 - Warnings--------------------WARNING:Security:42 - Your software subscription period has lapsed. Your currentversion of Xilinx tools will continue to function, but you no longer qualify forXilinx software updates or new releases.Section 3 - Informational-------------------------INFO:Security:56 - Part 'xc6vcx240t' is not a WebPack part.INFO:MapLib:562 - No environment variables are currently set.INFO:LIT:244 - All of the single ended outputs in this design are using slewrate limited output drivers. The delay on speed critical single ended outputscan be dramatically reduced by designating them as fast outputs.INFO:Pack:1716 - Initializing temperature to 85.000 Celsius. (default - Range:0.000 to 85.000 Celsius)INFO:Pack:1720 - Initializing voltage to 0.950 Volts. (default - Range: 0.950 to1.050 Volts)INFO:Map:215 - The Interim Design Summary has been generated in the MAP Report(.mrp).INFO:Pack:1650 - Map created a placed design.Section 4 - Removed Logic Summary---------------------------------Section 5 - Removed Logic-------------------------Section 6 - IOB Properties--------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------+| IOB Name | Type | Direction | IO Standard | Diff | Drive | Slew | Reg (s) | Resistor | IOB || | | | | Term | Strength | Rate | | | Delay |+---------------------------------------------------------------------------------------------------------------------------------------------------------+| cipher_key<0> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<1> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<2> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<3> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<4> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<5> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<6> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<7> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<8> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<9> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<10> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<11> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<12> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<13> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<14> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<15> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<16> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<17> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<18> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<19> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<20> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<21> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<22> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<23> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<24> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<25> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<26> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<27> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<28> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<29> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<30> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<31> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<32> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<33> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<34> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<35> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<36> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<37> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<38> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<39> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<40> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<41> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<42> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<43> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<44> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<45> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<46> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<47> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<48> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<49> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<50> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<51> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<52> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<53> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<54> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<55> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<56> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<57> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<58> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<59> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<60> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<61> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<62> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<63> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<64> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<65> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<66> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<67> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<68> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<69> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<70> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<71> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<72> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<73> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<74> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<75> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<76> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<77> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<78> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<79> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<80> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<81> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<82> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<83> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<84> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<85> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<86> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<87> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<88> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<89> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<90> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<91> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<92> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<93> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<94> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<95> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<96> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<97> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<98> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<99> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<100> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<101> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<102> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<103> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<104> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<105> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<106> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<107> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<108> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<109> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<110> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<111> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<112> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<113> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<114> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<115> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<116> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<117> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<118> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<119> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<120> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<121> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<122> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<123> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<124> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<125> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<126> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_key<127> | IOB | INPUT | LVCMOS25 | | | | | | || cipher_text<0> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<1> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<2> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<3> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<4> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<5> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<6> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<7> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<8> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<9> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<10> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<11> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<12> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<13> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<14> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<15> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<16> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<17> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<18> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<19> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<20> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<21> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<22> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<23> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<24> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<25> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<26> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<27> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<28> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<29> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<30> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<31> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<32> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<33> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<34> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<35> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<36> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<37> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<38> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<39> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<40> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<41> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<42> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<43> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<44> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<45> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<46> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<47> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<48> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<49> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<50> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<51> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<52> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<53> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<54> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<55> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<56> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<57> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<58> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<59> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<60> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<61> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<62> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<63> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<64> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<65> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<66> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<67> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<68> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<69> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<70> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<71> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<72> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<73> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<74> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<75> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<76> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<77> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<78> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<79> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<80> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<81> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<82> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<83> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<84> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<85> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<86> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<87> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<88> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<89> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<90> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<91> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<92> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<93> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<94> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<95> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<96> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<97> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<98> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<99> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<100> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<101> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<102> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<103> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<104> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<105> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<106> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<107> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<108> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<109> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<110> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<111> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<112> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<113> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<114> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<115> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<116> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<117> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<118> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<119> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<120> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<121> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<122> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<123> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<124> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<125> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<126> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipher_text<127> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | || cipherkey_valid_in | IOB | INPUT | LVCMOS25 | | | | | | || clk | IOB | INPUT | LVCMOS25 | | | | | | || data_valid_in | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<0> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<1> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<2> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<3> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<4> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<5> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<6> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<7> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<8> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<9> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<10> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<11> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<12> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<13> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<14> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<15> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<16> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<17> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<18> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<19> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<20> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<21> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<22> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<23> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<24> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<25> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<26> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<27> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<28> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<29> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<30> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<31> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<32> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<33> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<34> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<35> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<36> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<37> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<38> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<39> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<40> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<41> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<42> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<43> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<44> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<45> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<46> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<47> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<48> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<49> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<50> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<51> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<52> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<53> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<54> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<55> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<56> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<57> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<58> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<59> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<60> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<61> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<62> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<63> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<64> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<65> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<66> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<67> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<68> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<69> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<70> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<71> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<72> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<73> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<74> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<75> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<76> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<77> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<78> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<79> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<80> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<81> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<82> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<83> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<84> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<85> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<86> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<87> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<88> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<89> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<90> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<91> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<92> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<93> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<94> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<95> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<96> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<97> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<98> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<99> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<100> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<101> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<102> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<103> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<104> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<105> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<106> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<107> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<108> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<109> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<110> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<111> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<112> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<113> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<114> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<115> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<116> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<117> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<118> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<119> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<120> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<121> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<122> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<123> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<124> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<125> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<126> | IOB | INPUT | LVCMOS25 | | | | | | || plain_text<127> | IOB | INPUT | LVCMOS25 | | | | | | || reset | IOB | INPUT | LVCMOS25 | | | | | | || valid_out | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | |+---------------------------------------------------------------------------------------------------------------------------------------------------------+Section 7 - RPMs----------------Section 8 - Guide Report------------------------Guide not run on this design.Section 9 - Area Group and Partition Summary--------------------------------------------Partition Implementation Status-------------------------------No Partitions were found in this design.-------------------------------Area Group Information----------------------No area groups were found in this design.----------------------Section 10 - Timing Report--------------------------A logic-level (pre-route) timing report can be generated by using Xilinx statictiming analysis tools, Timing Analyzer (GUI) or TRCE (command line), with themapped NCD and PCF files. Please note that this timing report will be generatedusing estimated delay information. For accurate numbers, please generate atiming report with the post Place and Route NCD file.For more information about the Timing Analyzer, consult the Xilinx TimingAnalyzer Reference Manual; for more information about TRCE, consult the XilinxCommand Line Tools User Guide "TRACE" chapter.Section 11 - Configuration String Details-----------------------------------------Use the "-detail" map option to print out Configuration StringsSection 12 - Control Set Information------------------------------------Use the "-detail" map option to print out Control Set Information.Section 13 - Utilization by Hierarchy-------------------------------------Use the "-detail" map option to print out the Utilization by Hierarchy section.