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// ********************************************************************
// Actel Corporation Proprietary and Confidential
//  Copyright 2010 Actel Corporation.  All rights reserved.
//
// ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN
// ACCORDANCE WITH THE ACTEL LICENSE AGREEMENT AND MUST BE APPROVED
// IN ADVANCE IN WRITING.
//
// Description: User testbench AHBLite master 2 BFM script for CoreAHBLite
//
// Revision Information:
// Date     Description
// 10Feb10              Production Release Version 3.1
//
// SVN Revision Information:
// SVN $Revision: 21356 $
// SVN $Date: 2013-10-24 00:02:49 +0530 (Thu, 24 Oct 2013) $
//
// Resolved SARs
// SAR      Date     Who   Description
//
// Notes:
// 1. best viewed with tabstops set to "4"
// 2. Most of the behavior is driven from the BFM script for the AHBLite master.
//    Consult the Actel AMBA BFM documentation for more information.
// 3. All procedures, variables, and constants used by the 'main' procedure
//    are declared in the include file "coreahblite_usertb_include.bfm"
//
// History:             11/05/08  - TFB created
//
// *********************************************************************

// include constants, and miscellaneous procedures used in this main file
include "coreahblite_usertb_include.bfm"

procedure main
        int i
        int j
        int k
        int dtmp[4]
        int atmp
    int slot_incr

        header "User Testbench for CoreAHBLite: BFM AHBLite Master 2 Test Harness"
        print "(c) Copyright 2010 Actel Corporation. All rights reserved."
        call pr_underscores

        debug 1                 // only text strings printed
        timeout 2000    // timeout in cycles, in case BFM stalls
        wait 400

        // initialize local variables passed from testbench HDL to the
        // ARGVALUE* BFM parameters
        call init_parameter_vars

        wait 2

# Set slot increment based on MEMSPACE parameter
if MEMSPACE == 0
        call pr_underscores
        print "Master 2, memory space: 16 64KB slave slots, one huge slave slot, testing beginning at: %0d ns." $TIME
        call pr_underscores
    set slot_incr       0x00010000;
endif
if MEMSPACE == 1
        call pr_underscores
        print "Master 2, memory space = 4GB, 16 256MB slave slots, testing beginning at: %0d ns." $TIME
        call pr_underscores
    set slot_incr       0x10000000;
endif
if MEMSPACE == 2
        call pr_underscores
        print "Master 2, memory space = 256MB, 16 16MB slave slots, testing beginning at: %0d ns." $TIME
        call pr_underscores
    set slot_incr       0x01000000;
endif
if MEMSPACE == 3
        call pr_underscores
        print "Master 2, memory space = 16MB, 16 1MB slave slots, testing beginning at: %0d ns." $TIME
        call pr_underscores
    set slot_incr       0x00100000;
endif
if MEMSPACE == 4
        call pr_underscores
        print "Master 2, memory space = 1MB, 16 64KB slave slots, testing beginning at: %0d ns." $TIME
        call pr_underscores
    set slot_incr       0x00010000;
endif
if MEMSPACE == 5
        call pr_underscores
        print "Master 2, memory space = 64KB, 16 4KB slave slots, testing beginning at: %0d ns." $TIME
        call pr_underscores
    set slot_incr       0x00001000;
endif
if MEMSPACE == 6
        call pr_underscores
        print "Master 2, memory space = 4KB, 16 256B slave slots, testing beginning at: %0d ns." $TIME
        call pr_underscores
    set slot_incr       0x00000100;
endif

//=========================================================================
# Test byte/halfword/word writes and reads for all enabled slots
        loop i 0 15 1
      if SC[i] == 0
                if M2_AHBSLOTENABLE[i]
                        call pr_underscores
                        print "Master 2 testing AHBLite slot:%0d at: %0d ns." i $TIME
                        call pr_underscores
                        // write/read 32-bit word
                        set atmp i * slot_incr + 0x0
                        set dtmp[0] 0x12345678
                        print "Master 2 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
                        write w BASE atmp dtmp[0]
                        print "Master 2 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
                        readcheck w BASE atmp dtmp[0]
                        wait 8
                        // write/read 16-bit halfwords
                        set dtmp[0] 0xdead
                        set dtmp[1] 0xbeef
                        loop j 0 1 1
                                set k j * 2
                                set atmp i * slot_incr + k
                                print "Master 2 writes:%04x to AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
                                write h BASE atmp dtmp[j]
                        endloop
                        loop j 0 1 1
                                set k j * 2
                                set atmp i * slot_incr + k
                                print "Master 2 verifying (reading):%04x from AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
                                readcheck h BASE atmp dtmp[j]
                        endloop
                        wait 8
                        // write/read 8-bit bytes
                        set dtmp[0] 0x9a
                        set dtmp[1] 0x56
                        set dtmp[2] 0x34
                        set dtmp[3] 0x12
                        loop j 0 3 1
                                set k j * 1
                                set atmp i * slot_incr + k
                                print "Master 2 writes:%02x to AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
                                write b BASE atmp dtmp[j]
                        endloop
                        loop j 0 3 1
                                set k j * 1
                                set atmp i * slot_incr + k
                                print "Master 2 verifying (reading):%02x from AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
                                readcheck b BASE atmp dtmp[j]
                        endloop
                        wait 8
                        // write/read 32-bit word 0xaaaaaaaa
                        set atmp i * slot_incr + 0x0
                        set dtmp[0] 0xaaaaaaaa
                        print "Master 2 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
                        write w BASE atmp dtmp[0]
                        print "Master 2 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
                        readcheck w BASE atmp dtmp[0]
                        wait 8
                        // write/read 32-bit word 0x55555555
                        set atmp i * slot_incr + 0x0
                        set dtmp[0] 0x55555555
                        print "Master 2 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
                        write w BASE atmp dtmp[0]
                        print "Master 2 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
                        readcheck w BASE atmp dtmp[0]
                        wait 8
                        print "Master 2 done testing AHBLite slot:%0d at: %0d ns." i $TIME
                        call pr_underscores
                else
                        call pr_underscores
                        print "Master 2 skipping test of AHBLite slot:%0d at: %0d ns." i $TIME
                        call pr_underscores
                endif
      else
        call pr_underscores
        print "Master 2 skipping test of AHBLite slot:%0d at: %0d ns." i $TIME
        call pr_underscores
      endif
                // wait here between loops
        endloop
//=========================================================================
    quit
return