Subversion Repositories astron_ram

hdl_lib_name = astron_ram
hdl_library_clause_name = astron_ram_lib
hdl_lib_uses_synth = common_pkg common_components 
#ip_stratixiv_ram

hdl_lib_uses_sim = 
hdl_lib_technology = 
#hdl_lib_disclose_library_clause_names =
#    ip_stratixiv_ram      ip_stratixiv_ram_lib

synth_files =
    altera_mf_components.vhd
    altera_mf.vhd
    ip_stratixiv_ram_crw_crw.vhd
    ip_stratixiv_ram_cr_cw.vhd
    tech_memory_component_pkg.vhd
    tech_memory_ram_cr_cw.vhd
    tech_memory_ram_crw_crw.vhd
    tech_memory_ram_crwk_crw.vhd

    common_ram_pkg.vhd
    common_ram_crw_crw.vhd
    common_paged_ram_crw_crw.vhd
    common_paged_ram_rw_rw.vhd
    common_paged_ram_r_w.vhd
    common_ram_rw_rw.vhd
    common_ram_r_w.vhd
    common_ram_crw_crw_ratio.vhd

test_bench_files =
  tb_common_paged_ram_crw_crw.vhd

regression_test_vhdl = 
    # no self checking tb available yet


[modelsim_project_file]


[quartus_project_file]