Subversion Repositories audio

Flow report for HD_ADPCM_Codec
Tue May 11 23:50:10 2010
Quartus II Version 9.0 Build 132 02/25/2009 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Flow Summary
  3. Flow Settings
  4. Flow Non-Default Global Settings
  5. Flow Elapsed Time
  6. Flow OS Summary
  7. Flow Log



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+------------------------------------------------------------------------------+
; Flow Summary                                                                 ;
+------------------------------------+-----------------------------------------+
; Flow Status                        ; Successful - Tue May 11 23:50:10 2010   ;
; Quartus II Version                 ; 9.0 Build 132 02/25/2009 SJ Web Edition ;
; Revision Name                      ; HD_ADPCM_Codec                          ;
; Top-level Entity Name              ; HD_ADPCM_Codec                          ;
; Family                             ; Cyclone II                              ;
; Device                             ; EP2C20F484C7                            ;
; Timing Models                      ; Final                                   ;
; Met timing requirements            ; No                                      ;
; Total logic elements               ; 1,663 / 18,752 ( 9 % )                  ;
;     Total combinational functions  ; 1,635 / 18,752 ( 9 % )                  ;
;     Dedicated logic registers      ; 364 / 18,752 ( 2 % )                    ;
; Total registers                    ; 364                                     ;
; Total pins                         ; 82 / 315 ( 26 % )                       ;
; Total virtual pins                 ; 0                                       ;
; Total memory bits                  ; 0 / 239,616 ( 0 % )                     ;
; Embedded Multiplier 9-bit elements ; 4 / 52 ( 8 % )                          ;
; Total PLLs                         ; 0 / 4 ( 0 % )                           ;
+------------------------------------+-----------------------------------------+


+-----------------------------------------+
; Flow Settings                           ;
+-------------------+---------------------+
; Option            ; Setting             ;
+-------------------+---------------------+
; Start date & time ; 05/11/2010 23:49:20 ;
; Main task         ; Compilation         ;
; Revision Name     ; HD_ADPCM_Codec      ;
+-------------------+---------------------+


+----------------------------------------------------------------------------------------------------------------------------------------+
; Flow Non-Default Global Settings                                                                                                       ;
+------------------------------------+----------------------------------------------------+---------------+-------------+----------------+
; Assignment Name                    ; Value                                              ; Default Value ; Entity Name ; Section Id     ;
+------------------------------------+----------------------------------------------------+---------------+-------------+----------------+
; COMPILER_SIGNATURE_ID              ; 117965952028.127360556005096                       ; --            ; --          ; --             ;
; CYCLONEII_OPTIMIZATION_TECHNIQUE   ; Area                                               ; Balanced      ; --          ; --             ;
; EDA_OUTPUT_DATA_FORMAT             ; Vhdl                                               ; --            ; --          ; eda_simulation ;
; EDA_SIMULATION_TOOL                ; ModelSim (VHDL)                                    ; <None>        ; --          ; --             ;
; MAX_CORE_JUNCTION_TEMP             ; 85                                                 ; --            ; --          ; --             ;
; MIN_CORE_JUNCTION_TEMP             ; 0                                                  ; --            ; --          ; --             ;
; MISC_FILE                          ; D:/Projects/FPGA/HD_ADPCM_Codec/HD_ADPCM_Codec.dpf ; --            ; --          ; --             ;
; PARTITION_COLOR                    ; 16764057                                           ; --            ; --          ; Top            ;
; PARTITION_NETLIST_TYPE             ; SOURCE                                             ; --            ; --          ; Top            ;
; POWER_BOARD_THERMAL_MODEL          ; None (CONSERVATIVE)                                ; --            ; --          ; --             ;
; POWER_PRESET_COOLING_SOLUTION      ; 23 MM HEAT SINK WITH 200 LFPM AIRFLOW              ; --            ; --          ; --             ;
; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off                                                ; --            ; --          ; eda_blast_fpga ;
+------------------------------------+----------------------------------------------------+---------------+-------------+----------------+


+-----------------------------------------------------------------------------------------------------------------------------+
; Flow Elapsed Time                                                                                                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name             ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis    ; 00:00:15     ; 1.0                     ; 202 MB              ; 00:00:14                           ;
; Fitter                  ; 00:00:15     ; 1.0                     ; 211 MB              ; 00:00:15                           ;
; Assembler               ; 00:00:07     ; 1.0                     ; 189 MB              ; 00:00:07                           ;
; Classic Timing Analyzer ; 00:00:01     ; 1.0                     ; 133 MB              ; 00:00:01                           ;
; EDA Netlist Writer      ; 00:00:02     ; 1.0                     ; 136 MB              ; 00:00:02                           ;
; Total                   ; 00:00:40     ; --                      ; --                  ; 00:00:39                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+


+---------------------------------------------------------------------------------------+
; Flow OS Summary                                                                       ;
+-------------------------+------------------+------------+------------+----------------+
; Module Name             ; Machine Hostname ; OS Name    ; OS Version ; Processor type ;
+-------------------------+------------------+------------+------------+----------------+
; Analysis & Synthesis    ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
; Fitter                  ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
; Assembler               ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
; Classic Timing Analyzer ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
; EDA Netlist Writer      ; jupiter-1328e1a  ; Windows XP ; 5.1        ; i686           ;
+-------------------------+------------------+------------+------------+----------------+


------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec
quartus_fit --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec
quartus_asm --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec
quartus_tan --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec --timing_analysis_only
quartus_eda --read_settings_files=off --write_settings_files=off HD_ADPCM_Codec -c HD_ADPCM_Codec